{"id":2196202,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196202/?format=json","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.0/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260213040852.3340547-4-sherry.sun@nxp.com>","date":"2026-02-13T04:08:43","name":"[V5,03/12] PCI: dwc: Allow external allocation of pci_host_bridge","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"fea745241e68aa0b6854bd52d1246e3fc2d534d4","submitter":{"id":77063,"url":"http://patchwork.ozlabs.org/api/1.0/people/77063/?format=json","name":"Sherry Sun","email":"sherry.sun@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260213040852.3340547-4-sherry.sun@nxp.com/mbox/","series":[{"id":492056,"url":"http://patchwork.ozlabs.org/api/1.0/series/492056/?format=json","date":"2026-02-13T04:08:40","name":"pci-imx6: Add support for parsing the reset property in new Root Port binding","version":5,"mbox":"http://patchwork.ozlabs.org/series/492056/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2196202/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256\n header.s=selector1 header.b=eCCSP2gJ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n 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b=eCCSP2gJFcDP+ZOnGid81Yv/9rdVXwBO2nAuLmyWzBA7x1HI5/PcSc4tR0jdQMHdHPXeWafaOe3JJ9MDLHAEfJVvPy0ynqReywi5sLsNJDNNZKjE6PmIQWNpdojD7jAVD/vMs+Lspk0YqZ4M7PYp6+035nZjLoVocfFcZ7H6Hm/LW8LsHuMvaEgFr6hon1FAMS1hjR2fdP519056v0wZ2KZRRwsEfFbsJdHYfMnIj4aJx/OiZIp2ziBbmby0wG129xNJxsevocGvwHL2lmaVfiUG96TTTtVsUEkMpurogNSxkHAknpqHdooBZpNbHoF4p1fTkIMEunzZKAw4TiEzkA==","From":"Sherry Sun ","To":"hongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de,\n\tFrank.Li@nxp.com,\n\tbhelgaas@google.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\trobh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\ts.hauer@pengutronix.de,\n\tfestevam@gmail.com","Cc":"imx@lists.linux.dev,\n\tkernel@pengutronix.de,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH V5 03/12] PCI: dwc: Allow external allocation of\n pci_host_bridge","Date":"Fri, 13 Feb 2026 12:08:43 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Ge3nlijjMxYWhc2m7vnVRLMRmJmoeQyYlhVtL8od1/i0e3I6eogcphOZDK2e+VwTxe/3xJ2s9167A4Rx+qU3UUHTlYWaOpfdJHU5JvoKCb47/V5SYSEdUTfqGmpsO7ObIitxuE1GatHCNNNe7P982TJbLc1x+DUHfZos+u/54in6xFhdc4ws2G9CdN2qRz0M7mPepvsqa7pYf1FH4fyy4obEjf0C5hR5ywPnfcySnuAXKdvNZ+8fdcG6ZoKbto7gQlAttJab43sFeTzHdn1TiujiEtiCZ8Ak2Tjzf8EIvKGFI5w+7mahoypBUzz1lb6W30cthGKwaB/AKDzMbHAhrfzGmllVM9yiBYo79f1l1/KxBw6e7LeifcbsYTx39WCFX8/6CHxi/Cs7A8uotfWRp09XUgNb0Vu7e0x5tRl3oh6QdHnBadcw8BjQf+6P6/dKU2U3y/w/Yzsz+n5oIYQ5Ax7NxUjVRqJG6mawkM4iJHKalwjedciRl1K7Efs2YlLlPTW0SA3PfrAV+ABeWtGoaWg+KpRzHKswur1k5XIDNeysWsQhiLNO4ATPJVy/DifUdJ7LNxRS7tI6RMIz/1MCuHvWvGFsoYyT374WQPjsOeYza+F9UVsCLg8EFCoVK6dmRwz0ZPh/GppyVlliseUdm+9zz2j7wM6LhLqZNnF5H4ron76u2iXJF+6axKA5SNZAB6NNWM7N2YH+OSP5veWaW+tHfMW7as6E9B18d1hkBn51O20pUuho6BFZv2s0Jn+uYuAq7ea6bconSi3l1HCIh7hGC0mGUY19sfKp2iPvIq3hEYneMFIF8VKGo423a4VlshvFjWNcTp1l5suXGokjS79MPau8CboPqwELJ7im5qsbe0CTtr3dhYwjajwX67+HrmzdJupxFYMvywnIyp274wOyI8Km2chSG9/u1qUzUnXqKY3kGqWhRj6K7mTvlR6cJO4juK1lThRybSE/ki6RlR8tQ8cieNbpr7oAZqo6TnnbkbeJc2t0vC8hSQxpgsVES4AU7fNPlVvmcXiak83BHkrB3oisFA1QBFWyKnAONIrtKxdwDKODEskjEx8lcij524VYKmCIsERYdSdbaTdRJR/8y+DGUvbtqrDBELXJxu1QjNrjGhXRI1tR6dbmVa/09zpRMZlGSLIV0DgTY6jePN3rTgmvqLFmM2eZME6VQn2A35ttSExoK4yiyY/4AIXQQYD4eP7v09+qQEvT2Al/EVsS5XRGNt8vweSTNQe5/iMpG130fuZi2aLCuyuYDxIuwQn+oA7S3QnBCR4EPTEPQipjnjmf5c9fb7wcRVsaAz474LKwA4HKCMnrsVs8DNg1m6522/TW4GnZVdi1xFzweM99CGxTemg83+ZzgE9jioBsVpGK+3Oq0QSH6zycEtbkLD4rD0g260vHiK6W3tylZnRIdy7QbqocBtLwZEFJBiPWyPbPEfe2QVuGd3Va6Rm9Q5tkIlIbkeluavbJbGRxDCfOMaobyslxRKHBwI4jgLggz7QO5wpL5PjTWOc3/SZ1OxlMjnBmSpz+CPK6DNoHXmmKUmEMvZRRaJRcNzj0J5miba72BXjPFORvcBQY+oEhFl3bldf2UDOSYjO6pcCfZpQuEvmnhx6Ab21sx8FEZcbHqllUzPCpiCzw9GGyv7nVwtF4Ht8sbYffOEUw5Wd6C3ZgGbti6Igw1485bvgtws3GJbNwvCL3CSRm+3sNNHJZktAnkgiukLDtN/J8dtfJfg==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n f600322b-908e-42f5-049b-08de6ab57deb","X-MS-Exchange-CrossTenant-AuthSource":"VI0PR04MB12114.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"13 Feb 2026 04:08:06.8663\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n JJ1+xaZVK0DyVVhEUMU532dQziZoVk9lPxkD0EyVL4cEsu3ZtuTD6XnvfnCKGvEd4KBoyF5xYmKqJ1alWiBJ9g==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DBBPR04MB7929"},"content":"Currently, dw_pcie_host_init() always allocates a new pci_host_bridge\nstructure internally using devm_pci_alloc_host_bridge(). This prevents\ndrivers from pre-allocating the bridge structure when needed.\n\nModify dw_pcie_host_init() to check if pp->bridge is already set. If\nset, use the pre-allocated bridge instead of allocating a new one. This\nmaintains backward compatibility with existing drivers that don't set\npp->bridge, while allowing new drivers to pre-allocate when needed.\n\nSigned-off-by: Sherry Sun \n---\n drivers/pci/controller/dwc/pcie-designware-host.c | 12 ++++++++----\n 1 file changed, 8 insertions(+), 4 deletions(-)","diff":"diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c\nindex 6ae6189e9b8a..c2de9830e1e9 100644\n--- a/drivers/pci/controller/dwc/pcie-designware-host.c\n+++ b/drivers/pci/controller/dwc/pcie-designware-host.c\n@@ -575,11 +575,15 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)\n \n \traw_spin_lock_init(&pp->lock);\n \n-\tbridge = devm_pci_alloc_host_bridge(dev, 0);\n-\tif (!bridge)\n-\t\treturn -ENOMEM;\n+\tif (!pp->bridge) {\n+\t\tbridge = devm_pci_alloc_host_bridge(dev, 0);\n+\t\tif (!bridge)\n+\t\t\treturn -ENOMEM;\n \n-\tpp->bridge = bridge;\n+\t\tpp->bridge = bridge;\n+\t} else {\n+\t\tbridge = pp->bridge;\n+\t}\n \n \tret = dw_pcie_host_get_resources(pp);\n \tif (ret)\n","prefixes":["V5","03/12"]}