{"id":2175784,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175784/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20251218221457.73341-5-philmd@linaro.org>","date":"2025-12-18T22:14:55","name":"[4/6] target/sparc: Use address_space_ld/st[n]_be() in ld/st_asi helpers","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"a489425218f343940f528bbc62f49d4d98f7e759","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/1.0/people/85046/?format=json","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20251218221457.73341-5-philmd@linaro.org/mbox/","series":[{"id":485925,"url":"http://patchwork.ozlabs.org/api/1.0/series/485925/?format=json","date":"2025-12-18T22:14:52","name":"target/sparc64: Stop using the legacy native-endian APIs","version":1,"mbox":"http://patchwork.ozlabs.org/series/485925/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175784/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=Y0RYmoVh;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::329;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Do not open-code address_space_{ld,st}n(), use it passing\nthe access size as argument. Directly expand to the big-endian\nvariant (with the '_be' suffix) since we only build the SPARC\ntargets as big-endian.\n\nSigned-off-by: Philippe Mathieu-Daudé \n---\n target/sparc/ldst_helper.c | 42 ++++----------------------------------\n 1 file changed, 4 insertions(+), 38 deletions(-)","diff":"diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c\nindex 2c63eb9e036..052608c02d8 100644\n--- a/target/sparc/ldst_helper.c\n+++ b/target/sparc/ldst_helper.c\n@@ -701,25 +701,8 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,\n MemTxResult result;\n hwaddr access_addr = (hwaddr)addr | ((hwaddr)(asi & 0xf) << 32);\n \n- switch (size) {\n- case 1:\n- ret = address_space_ldub(cs->as, access_addr,\n- MEMTXATTRS_UNSPECIFIED, &result);\n- break;\n- case 2:\n- ret = address_space_lduw(cs->as, access_addr,\n- MEMTXATTRS_UNSPECIFIED, &result);\n- break;\n- default:\n- case 4:\n- ret = address_space_ldl(cs->as, access_addr,\n- MEMTXATTRS_UNSPECIFIED, &result);\n- break;\n- case 8:\n- ret = address_space_ldq(cs->as, access_addr,\n- MEMTXATTRS_UNSPECIFIED, &result);\n- break;\n- }\n+ ret = address_space_ldn_be(cs->as, access_addr, size,\n+ MEMTXATTRS_UNSPECIFIED, &result);\n \n if (result != MEMTX_OK) {\n sparc_raise_mmu_fault(cs, access_addr, false, false, false,\n@@ -1066,25 +1049,8 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val,\n MemTxResult result;\n hwaddr access_addr = (hwaddr)addr | ((hwaddr)(asi & 0xf) << 32);\n \n- switch (size) {\n- case 1:\n- address_space_stb(cs->as, access_addr, val,\n- MEMTXATTRS_UNSPECIFIED, &result);\n- break;\n- case 2:\n- address_space_stw(cs->as, access_addr, val,\n- MEMTXATTRS_UNSPECIFIED, &result);\n- break;\n- case 4:\n- default:\n- address_space_stl(cs->as, access_addr, val,\n- MEMTXATTRS_UNSPECIFIED, &result);\n- break;\n- case 8:\n- address_space_stq(cs->as, access_addr, val,\n- MEMTXATTRS_UNSPECIFIED, &result);\n- break;\n- }\n+ address_space_stn_be(cs->as, access_addr, val, size,\n+ MEMTXATTRS_UNSPECIFIED, &result);\n if (result != MEMTX_OK) {\n sparc_raise_mmu_fault(cs, access_addr, true, false, false,\n size, GETPC());\n","prefixes":["4/6"]}