{"id":2175695,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175695/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20251218183122.408690-7-sergeev0xef@gmail.com>","date":"2025-12-18T18:31:21","name":"[RFC,6/6] target/riscv/machine: Add smcntrpmf registers to VMStateDescription","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"8c4cf8f9c25dd99061d8f4b99f991e9ffc97cae4","submitter":{"id":92294,"url":"http://patchwork.ozlabs.org/api/1.0/people/92294/?format=json","name":"Aleksandr Sergeev","email":"sergeev0xef@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20251218183122.408690-7-sergeev0xef@gmail.com/mbox/","series":[{"id":485896,"url":"http://patchwork.ozlabs.org/api/1.0/series/485896/?format=json","date":"2025-12-18T18:31:20","name":"More extendable PMU subsystem.","version":1,"mbox":"http://patchwork.ozlabs.org/series/485896/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175695/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20230601 header.b=cd+x5FMM;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-lf1-x133.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-Mailman-Approved-At":"Thu, 18 Dec 2025 13:32:44 -0500","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Signed-off-by: Aleksandr Sergeev \nReviewed-by: Alexei Filippov \n---\n target/riscv/machine.c | 4 ++++\n 1 file changed, 4 insertions(+)","diff":"diff --git a/target/riscv/machine.c b/target/riscv/machine.c\nindex 5083bbb1f2..2f6a5fc25c 100644\n--- a/target/riscv/machine.c\n+++ b/target/riscv/machine.c\n@@ -474,6 +474,10 @@ const VMStateDescription vmstate_riscv_cpu = {\n VMSTATE_UINT32(env.mcounteren, RISCVCPU),\n VMSTATE_UINT32(env.scountinhibit, RISCVCPU),\n VMSTATE_UINT32(env.mcountinhibit, RISCVCPU),\n+ VMSTATE_UINTTL(env.mcyclecfg, RISCVCPU),\n+ VMSTATE_UINTTL(env.mcyclecfgh, RISCVCPU),\n+ VMSTATE_UINTTL(env.minstretcfg, RISCVCPU),\n+ VMSTATE_UINTTL(env.minstretcfgh, RISCVCPU),\n VMSTATE_STRUCT_ARRAY(env.pmu_ctrs, RISCVCPU, RV_MAX_MHPMCOUNTERS, 0,\n vmstate_pmu_ctr_state, PMUCTRState),\n VMSTATE_UINTTL_ARRAY(env.mhpmevent_val, RISCVCPU, RV_MAX_MHPMEVENTS),\n","prefixes":["RFC","6/6"]}