{"id":2175681,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175681/?format=json","project":{"id":10,"url":"http://patchwork.ozlabs.org/api/1.0/projects/10/?format=json","name":"Linux SPARC Development ","link_name":"sparclinux","list_id":"sparclinux.vger.kernel.org","list_email":"sparclinux@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20251218174749.45965-4-pilgrimtao@gmail.com>","date":"2025-12-18T17:47:49","name":"[v3,3/3] sparc: Remove unnecessary whitespace","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"6b4cbe24bcb7a36a4e1c1a7ebd8c6782a8259380","submitter":{"id":92282,"url":"http://patchwork.ozlabs.org/api/1.0/people/92282/?format=json","name":"Chengkaitao","email":"pilgrimtao@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/sparclinux/patch/20251218174749.45965-4-pilgrimtao@gmail.com/mbox/","series":[{"id":485892,"url":"http://patchwork.ozlabs.org/api/1.0/series/485892/?format=json","date":"2025-12-18T17:47:46","name":"Generalize vmemmap_populate_hugepages to sparc","version":3,"mbox":"http://patchwork.ozlabs.org/series/485892/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175681/checks/","tags":{},"headers":{"Return-Path":"\n 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Thu, 18 Dec 2025 09:48:16 -0800 (PST)","From":"chengkaitao ","To":"davem@davemloft.net,\n\tandreas@gaisler.com,\n\takpm@linux-foundation.org,\n\tdavid@kernel.org,\n\tlorenzo.stoakes@oracle.com,\n\tLiam.Howlett@oracle.com,\n\tvbabka@suse.cz,\n\trppt@kernel.org,\n\tsurenb@google.com,\n\tmhocko@suse.com","Cc":"kevin.brodsky@arm.com,\n\tdave.hansen@linux.intel.com,\n\tziy@nvidia.com,\n\tchengkaitao@kylinos.cn,\n\twilly@infradead.org,\n\tzhengqi.arch@bytedance.com,\n\tsparclinux@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tlinux-mm@kvack.org","Subject":"[PATCH v3 3/3] sparc: Remove unnecessary whitespace","Date":"Fri, 19 Dec 2025 01:47:49 +0800","Message-ID":"<20251218174749.45965-4-pilgrimtao@gmail.com>","X-Mailer":"git-send-email 2.50.1","In-Reply-To":"<20251218174749.45965-1-pilgrimtao@gmail.com>","References":"<20251218174749.45965-1-pilgrimtao@gmail.com>","Precedence":"bulk","X-Mailing-List":"sparclinux@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Spam-Status":"No, score=-1.1 required=5.0 tests=ARC_SIGNED,ARC_VALID,\n\tDKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DMARC_PASS,\n\tFREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,\n\tMAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=disabled\n\tversion=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on gandalf.ozlabs.org"},"content":"From: Chengkaitao \n\nThis is purely a code formatting change with no functional impact.\n\nSigned-off-by: Chengkaitao \n---\n arch/sparc/mm/fault_64.c | 4 ++--\n arch/sparc/mm/hypersparc.S | 4 ++--\n arch/sparc/mm/init_64.c | 6 +++---\n arch/sparc/mm/io-unit.c | 12 ++++++------\n arch/sparc/mm/iommu.c | 2 +-\n arch/sparc/mm/swift.S | 2 +-\n arch/sparc/mm/ultra.S | 4 ++--\n 7 files changed, 17 insertions(+), 17 deletions(-)","diff":"diff --git a/arch/sparc/mm/fault_64.c b/arch/sparc/mm/fault_64.c\nindex e326caf708c6..963b2c4c87e2 100644\n--- a/arch/sparc/mm/fault_64.c\n+++ b/arch/sparc/mm/fault_64.c\n@@ -201,7 +201,7 @@ static void __kprobes do_kernel_fault(struct pt_regs *regs, int si_code,\n \t\t\t\t unsigned long address)\n {\n \tunsigned char asi = ASI_P;\n- \n+\n \tif ((!insn) && (regs->tstate & TSTATE_PRIV))\n \t\tgoto cannot_handle;\n \n@@ -229,7 +229,7 @@ static void __kprobes do_kernel_fault(struct pt_regs *regs, int si_code,\n \t\t\treturn;\n \t\t}\n \t}\n-\t\t\n+\n \t/* Is this in ex_table? */\n \tif (regs->tstate & TSTATE_PRIV) {\n \t\tconst struct exception_table_entry *entry;\ndiff --git a/arch/sparc/mm/hypersparc.S b/arch/sparc/mm/hypersparc.S\nindex 6c2521e85a42..bac194982498 100644\n--- a/arch/sparc/mm/hypersparc.S\n+++ b/arch/sparc/mm/hypersparc.S\n@@ -30,7 +30,7 @@ hypersparc_flush_cache_all:\n \tld\t[%g4 + %lo(vac_cache_size)], %g5\n \tsethi\t%hi(vac_line_size), %g1\n \tld\t[%g1 + %lo(vac_line_size)], %g2\n-1:\t\n+1:\n \tsubcc\t%g5, %g2, %g5\t\t\t! hyper_flush_unconditional_combined\n \tbne\t1b\n \t sta\t%g0, [%g5] ASI_M_FLUSH_CTX\n@@ -325,7 +325,7 @@ hypersparc_flush_tlb_page_out:\n \t sta\t%g5, [%g1] ASI_M_MMUREGS\n \n \t__INIT\n-\t\n+\n \t/* High speed page clear/copy. */\n hypersparc_bzero_1page:\n /* NOTE: This routine has to be shorter than 40insns --jj */\ndiff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c\nindex f477ab1b4f08..1c36448b95eb 100644\n--- a/arch/sparc/mm/init_64.c\n+++ b/arch/sparc/mm/init_64.c\n@@ -5,7 +5,7 @@\n * Copyright (C) 1996-1999 David S. Miller (davem@caip.rutgers.edu)\n * Copyright (C) 1997-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)\n */\n- \n+\n #include \n #include \n #include \n@@ -2397,11 +2397,11 @@ void __init paging_init(void)\n \t * work.\n \t */\n \tinit_mm.pgd += ((shift) / (sizeof(pgd_t)));\n-\t\n+\n \tmemset(swapper_pg_dir, 0, sizeof(swapper_pg_dir));\n \n \tinherit_prom_mappings();\n-\t\n+\n \t/* Ok, we can use our TLB miss and window trap handlers safely. */\n \tsetup_tba();\n \ndiff --git a/arch/sparc/mm/io-unit.c b/arch/sparc/mm/io-unit.c\nindex d409cb450de4..15f83e6d21e2 100644\n--- a/arch/sparc/mm/io-unit.c\n+++ b/arch/sparc/mm/io-unit.c\n@@ -4,7 +4,7 @@\n *\n * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)\n */\n- \n+\n #include \n #include \n #include \n@@ -62,7 +62,7 @@ static void __init iounit_iommu_init(struct platform_device *op)\n \t\tprom_printf(\"SUN4D: Cannot map External Page Table.\");\n \t\tprom_halt();\n \t}\n-\t\n+\n \top->dev.archdata.iommu = iounit;\n \tiounit->page_table = xpt;\n \tspin_lock_init(&iounit->lock);\n@@ -109,9 +109,9 @@ static dma_addr_t iounit_get_area(struct iounit_struct *iounit,\n \tcase 2: i = 0x0132; break;\n \tdefault: i = 0x0213; break;\n \t}\n-\t\n+\n \tIOD((\"%s(%pa,%d[%d])=\", __func__, &phys, size, npages));\n-\t\n+\n next:\tj = (i & 15);\n \trotor = iounit->rotor[j - 1];\n \tlimit = iounit->limit[j];\n@@ -150,7 +150,7 @@ static dma_addr_t iounit_map_phys(struct device *dev, phys_addr_t phys,\n \tstruct iounit_struct *iounit = dev->archdata.iommu;\n \tunsigned long flags;\n \tdma_addr_t ret;\n-\t\n+\n \t/* XXX So what is maxphys for us and how do drivers know it? */\n \tif (!len || len > 256 * 1024)\n \t\treturn DMA_MAPPING_ERROR;\n@@ -185,7 +185,7 @@ static void iounit_unmap_phys(struct device *dev, dma_addr_t vaddr, size_t len,\n {\n \tstruct iounit_struct *iounit = dev->archdata.iommu;\n \tunsigned long flags;\n-\t\n+\n \tspin_lock_irqsave(&iounit->lock, flags);\n \tlen = ((vaddr & ~PAGE_MASK) + len + (PAGE_SIZE-1)) >> PAGE_SHIFT;\n \tvaddr = (vaddr - IOUNIT_DMA_BASE) >> PAGE_SHIFT;\ndiff --git a/arch/sparc/mm/iommu.c b/arch/sparc/mm/iommu.c\nindex f48adf62724a..f43163a9a812 100644\n--- a/arch/sparc/mm/iommu.c\n+++ b/arch/sparc/mm/iommu.c\n@@ -89,7 +89,7 @@ static void __init sbus_iommu_init(struct platform_device *op)\n \tiommu->end = 0xffffffff;\n \n \t/* Allocate IOMMU page table */\n-\t/* Stupid alignment constraints give me a headache. \n+\t/* Stupid alignment constraints give me a headache.\n \t We need 256K or 512K or 1M or 2M area aligned to\n its size and current gfp will fortunately give\n it to us. */\ndiff --git a/arch/sparc/mm/swift.S b/arch/sparc/mm/swift.S\nindex f414bfd8d899..cfcc48b6c5c7 100644\n--- a/arch/sparc/mm/swift.S\n+++ b/arch/sparc/mm/swift.S\n@@ -243,7 +243,7 @@ swift_flush_tlb_page:\n \t nop\n #if 1\n \tmov\t0x400, %o1\n-\tsta\t%g0, [%o1] ASI_M_FLUSH_PROBE\t\n+\tsta\t%g0, [%o1] ASI_M_FLUSH_PROBE\n #else\n \tlda\t[%g1] ASI_M_MMUREGS, %g5\n \tsta\t%o3, [%g1] ASI_M_MMUREGS\ndiff --git a/arch/sparc/mm/ultra.S b/arch/sparc/mm/ultra.S\nindex 70e658d107e0..66cbfbb1d3cd 100644\n--- a/arch/sparc/mm/ultra.S\n+++ b/arch/sparc/mm/ultra.S\n@@ -284,7 +284,7 @@ __cheetah_flush_tlb_page:\t/* 22 insns */\n \tbe,pn\t\t%icc, 1f\n \t andn\t\t%o1, 1, %o3\n \tstxa\t\t%g0, [%o3] ASI_IMMU_DEMAP\n-1:\tstxa\t\t%g0, [%o3] ASI_DMMU_DEMAP\t\n+1:\tstxa\t\t%g0, [%o3] ASI_DMMU_DEMAP\n \tmembar\t\t#Sync\n \tstxa\t\t%g2, [%o4] ASI_DMMU\n \tsethi\t\t%hi(KERNBASE), %o4\n@@ -312,7 +312,7 @@ __cheetah_flush_tlb_pending:\t/* 27 insns */\n \tbe,pn\t\t%icc, 2f\n \t andn\t\t%o3, 1, %o3\n \tstxa\t\t%g0, [%o3] ASI_IMMU_DEMAP\n-2:\tstxa\t\t%g0, [%o3] ASI_DMMU_DEMAP\t\n+2:\tstxa\t\t%g0, [%o3] ASI_DMMU_DEMAP\n \tmembar\t\t#Sync\n \tbrnz,pt\t\t%o1, 1b\n \t nop\n","prefixes":["v3","3/3"]}