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Tests for the binary_za_m shape are added.\n\ngcc:\n\t* config/aarch64/aarch64-sme.md\n\t(@aarch64_sme_): Add\n\tnew define_insn.\n\t* config/aarch64/aarch64-sve-builtins-shapes.cc\n\t(struct binary_za_m_base): Support fpm argument.\n\t* config/aarch64/aarch64-sve-builtins-sme.cc (svmopa_za): Extend for\n\tfp8.\n\t* config/aarch64/aarch64-sve-builtins-sme.def (svmopa): Add new\n\tDEF_SME_ZA_FUNCTION_GS_FPM entries.\n\ngcc/testsuite:\n\n\t* gcc.target/aarch64/sme/acle-asm/test_sme_acle.h: (TEST_UNIFORM_ZA):\n\tAdd fpm0 parameter.\n\t* gcc.target/aarch64/sve/acle/general-c/binary_za_m_1.c: Add tests for\n\tvariants accepting fpm.\n\t* gcc.target/aarch64/sme2/acle-asm/mopa_za16_mf8.c: New test.\n\t* gcc.target/aarch64/sme2/acle-asm/mopa_za32_mf8.c: Likewise.\n---\n gcc/config/aarch64/aarch64-sme.md | 20 +++++++++++\n .../aarch64/aarch64-sve-builtins-shapes.cc | 2 +-\n .../aarch64/aarch64-sve-builtins-sme.cc | 2 +-\n .../aarch64/aarch64-sve-builtins-sme.def | 2 ++\n gcc/config/aarch64/aarch64-sve2.md | 2 +-\n .../aarch64/sme/acle-asm/test_sme_acle.h | 2 +-\n .../aarch64/sme2/acle-asm/mopa_za16_mf8.c | 36 +++++++++++++++++++\n .../aarch64/sme2/acle-asm/mopa_za32_mf8.c | 36 +++++++++++++++++++\n .../sve/acle/general-c/binary_za_m_1.c | 14 ++++++++\n 9 files changed, 112 insertions(+), 4 deletions(-)\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mopa_za16_mf8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mopa_za32_mf8.c","diff":"diff --git a/gcc/config/aarch64/aarch64-sme.md b/gcc/config/aarch64/aarch64-sme.md\nindex e8301ae72a7..0e1cdafb6dc 100644\n--- a/gcc/config/aarch64/aarch64-sme.md\n+++ b/gcc/config/aarch64/aarch64-sme.md\n@@ -2378,6 +2378,8 @@ (define_insn \"*aarch64_sme_lane_\"\n ;; - BFMOPS (SME_B16B16)\n ;; - FMOPA\n ;; - FMOPS\n+;; - FMOPA (SME_F8F16)\n+;; - FMOPA (SME_F8F32)\n ;; -------------------------------------------------------------------------\n \n (define_insn \"@aarch64_sme_\"\n@@ -2410,6 +2412,24 @@ (define_insn \"@aarch64_sme_\"\n \"\\tza%0., %1/m, %2/m, %3., %4.\"\n )\n \n+(define_insn \"@aarch64_sme_\"\n+ [(set (reg:SME_ZA_F8F16_32 ZA_REGNUM)\n+\t(unspec:SME_ZA_F8F16_32\n+\t [(reg:SME_ZA_F8F16_32 ZA_REGNUM)\n+\t (reg:DI SME_STATE_REGNUM)\n+\t (match_operand:DI 0 \"const_int_operand\")\n+\t (match_operand: 1 \"register_operand\" \"Upl\")\n+\t (match_operand: 2 \"register_operand\" \"Upl\")\n+\t (match_operand:VNx16QI_ONLY 3 \"register_operand\" \"w\")\n+\t (match_operand:VNx16QI_ONLY 4 \"register_operand\" \"w\")\n+\t (reg:DI FPM_REGNUM)]\n+\t SME_FP_MOP))]\n+ \"mode == VNx8HImode\n+ ? TARGET_STREAMING_SME_F8F16\n+ : TARGET_STREAMING_SME_F8F32\"\n+ \"\\tza%0., %1/m, %2/m, %3.b, %4.b\"\n+)\n+\n ;; =========================================================================\n ;; == Table lookup\n ;; =========================================================================\ndiff --git a/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc b/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc\nindex 59f313d08f2..ea4be3733c2 100644\n--- a/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc\n+++ b/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc\n@@ -692,7 +692,7 @@ struct binary_za_m_base : public overloaded_base<1>\n resolve (function_resolver &r) const override\n {\n type_suffix_index type;\n- if (!r.check_num_arguments (5)\n+ if (!r.check_num_arguments (r.fpm_mode == FPM_set ? 6: 5)\n \t|| !r.require_integer_immediate (0)\n \t|| !r.require_vector_type (1, VECTOR_TYPE_svbool_t)\n \t|| !r.require_vector_type (2, VECTOR_TYPE_svbool_t)\ndiff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc\nindex 43ef05c673a..20a6ebc4059 100644\n--- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc\n+++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc\n@@ -651,7 +651,7 @@ FUNCTION (svmls_lane_za, sme_2mode_lane_function, (UNSPEC_SME_SMLS,\n \t\t\t\t\t\t UNSPEC_SME_UMLS,\n \t\t\t\t\t\t UNSPEC_SME_FMLS))\n FUNCTION (svmopa_za, sme_2mode_function, (UNSPEC_SME_SMOPA, UNSPEC_SME_UMOPA,\n-\t\t\t\t\t UNSPEC_SME_FMOPA))\n+\t\t\t\t\t UNSPEC_SME_FMOPA, UNSPEC_SME_FMOPA))\n FUNCTION (svmops_za, sme_2mode_function, (UNSPEC_SME_SMOPS, UNSPEC_SME_UMOPS,\n \t\t\t\t\t UNSPEC_SME_FMOPS))\n FUNCTION (svread_za, svread_za_impl,)\ndiff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.def b/gcc/config/aarch64/aarch64-sve-builtins-sme.def\nindex f9ad6837f44..6306ee33a14 100644\n--- a/gcc/config/aarch64/aarch64-sve-builtins-sme.def\n+++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.def\n@@ -270,6 +270,7 @@ DEF_SME_ZA_FUNCTION_GS_FPM (svmla_lane, binary_za_slice_lane, za_h_mf8,\n \t\t\t vg2, none, set)\n DEF_SME_ZA_FUNCTION_GS_FPM (svmla, binary_za_slice_opt_single, za_h_mf8, vg2, none, set)\n DEF_SME_ZA_FUNCTION_GS_FPM (svmla, binary_za_slice_opt_single, za_h_mf8, vg1x24, none, set)\n+DEF_SME_ZA_FUNCTION_GS_FPM (svmopa, binary_za_m, za_h_mf8, none, za_m, set)\n #undef REQUIRED_EXTENSIONS\n \n #define REQUIRED_EXTENSIONS streaming_only (AARCH64_FL_SME_F8F32)\n@@ -277,6 +278,7 @@ DEF_SME_ZA_FUNCTION_GS_FPM (svmla_lane, binary_za_slice_lane, za_s_mf8,\n \t\t\t vg4, none, set)\n DEF_SME_ZA_FUNCTION_GS_FPM (svmla, binary_za_slice_opt_single, za_s_mf8, vg4, none, set)\n DEF_SME_ZA_FUNCTION_GS_FPM (svmla, binary_za_slice_opt_single, za_s_mf8, vg1x24, none, set)\n+DEF_SME_ZA_FUNCTION_GS_FPM (svmopa, binary_za_m, za_s_mf8, none, za_m, set)\n #undef REQUIRED_EXTENSIONS\n \n #undef DEF_SME_ZA_FUNCTION\ndiff --git a/gcc/config/aarch64/aarch64-sve2.md b/gcc/config/aarch64/aarch64-sve2.md\nindex 11cc53bbb50..407f1698c41 100644\n--- a/gcc/config/aarch64/aarch64-sve2.md\n+++ b/gcc/config/aarch64/aarch64-sve2.md\n@@ -3666,7 +3666,7 @@ (define_insn \"@aarch64_sve2_fp8_cvtn\"\n \t [(match_operand:VNx16F_NARROW 1 \"aligned_register_operand\" \"Uw\")\n \t (reg:DI FPM_REGNUM)]\n \t UNSPEC_FP8FCVTN))]\n- \"mode == VNx16SFmode ? TARGET_SSME2_FP8 : TARGET_STREAMING_SME2\"\n+ \"mode == VNx16SFmode ? TARGET_SSME2_FP8 : TARGET_SSVE_FP8\"\n \"fcvtn\\t%0.b, %1\"\n [(set_attr \"sve_type\" \"sve_fp_cvt\")]\n )\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/test_sme_acle.h b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/test_sme_acle.h\nindex aaadab2f773..75e3413768e 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/test_sme_acle.h\n+++ b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/test_sme_acle.h\n@@ -46,7 +46,7 @@\n \n #define TEST_UNIFORM_ZA(NAME, TYPE, CODE1, CODE2)\t\t\\\n PROTO (NAME, void, (TYPE z0, TYPE z1, svbool_t p0,\t\t\\\n-\t\t svbool_t p1))\t\t\t\t\\\n+\t\t svbool_t p1, fpm_t fpm0))\t\t\t\\\n {\t\t\t\t\t\t\t\t\\\n INVOKE (CODE1, CODE2);\t\t\t\t\t\\\n }\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mopa_za16_mf8.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mopa_za16_mf8.c\nnew file mode 100644\nindex 00000000000..e88b7a4814c\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mopa_za16_mf8.c\n@@ -0,0 +1,36 @@\n+/* { dg-do assemble { target aarch64_asm_sme-f8f16_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_sme-f8f16_ok } } } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+#pragma GCC target \"+sme-f8f16\"\n+/*\n+** mopa_za16_mf8_0_p0_p1_z0_z1:\n+** \tmsr\tfpmr, x0\n+**\tfmopa\tza0\\.h, p0/m, p1/m, z0\\.b, z1\\.b\n+**\tret\n+*/\n+TEST_UNIFORM_ZA (mopa_za16_mf8_0_p0_p1_z0_z1, svmfloat8_t,\n+\t\t svmopa_za16_mf8_m_fpm (0, p0, p1, z0, z1, fpm0),\n+\t\t svmopa_za16_m_fpm (0, p0, p1, z0, z1, fpm0))\n+\n+/*\n+** mopa_za16_mf8_0_p1_p0_z1_z0:\n+** \tmsr\tfpmr, x0\n+**\tfmopa\tza0\\.h, p1/m, p0/m, z1\\.b, z0\\.b\n+**\tret\n+*/\n+TEST_UNIFORM_ZA (mopa_za16_mf8_0_p1_p0_z1_z0, svmfloat8_t,\n+\t\t svmopa_za16_mf8_m_fpm (0, p1, p0, z1, z0, fpm0),\n+\t\t svmopa_za16_m_fpm (0, p1, p0, z1, z0, fpm0))\n+\n+/*\n+** mopa_za16_mf8_1_p0_p1_z0_z1:\n+** \tmsr\tfpmr, x0\n+**\tfmopa\tza1\\.h, p0/m, p1/m, z0\\.b, z1\\.b\n+**\tret\n+*/\n+TEST_UNIFORM_ZA (mopa_za16_mf8_1_p0_p1_z0_z1, svmfloat8_t,\n+\t\t svmopa_za16_mf8_m_fpm (1, p0, p1, z0, z1, fpm0),\n+\t\t svmopa_za16_m_fpm (1, p0, p1, z0, z1, fpm0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mopa_za32_mf8.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mopa_za32_mf8.c\nnew file mode 100644\nindex 00000000000..74a665fea6b\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mopa_za32_mf8.c\n@@ -0,0 +1,36 @@\n+/* { dg-do assemble { target aarch64_asm_sme-f8f32_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_sme-f8f32_ok } } } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+#pragma GCC target \"+sme-f8f32\"\n+/*\n+** mopa_za32_mf8_0_p0_p1_z0_z1:\n+** \tmsr\tfpmr, x0\n+**\tfmopa\tza0\\.s, p0/m, p1/m, z0\\.b, z1\\.b\n+**\tret\n+*/\n+TEST_UNIFORM_ZA (mopa_za32_mf8_0_p0_p1_z0_z1, svmfloat8_t,\n+\t\t svmopa_za32_mf8_m_fpm (0, p0, p1, z0, z1, fpm0),\n+\t\t svmopa_za32_m_fpm (0, p0, p1, z0, z1, fpm0))\n+\n+/*\n+** mopa_za32_mf8_0_p1_p0_z1_z0:\n+** \tmsr\tfpmr, x0\n+**\tfmopa\tza0\\.s, p1/m, p0/m, z1\\.b, z0\\.b\n+**\tret\n+*/\n+TEST_UNIFORM_ZA (mopa_za32_mf8_0_p1_p0_z1_z0, svmfloat8_t,\n+\t\t svmopa_za32_mf8_m_fpm (0, p1, p0, z1, z0, fpm0),\n+\t\t svmopa_za32_m_fpm (0, p1, p0, z1, z0, fpm0))\n+\n+/*\n+** mopa_za32_mf8_1_p0_p1_z0_z1:\n+** \tmsr\tfpmr, x0\n+**\tfmopa\tza1\\.s, p0/m, p1/m, z0\\.b, z1\\.b\n+**\tret\n+*/\n+TEST_UNIFORM_ZA (mopa_za32_mf8_1_p0_p1_z0_z1, svmfloat8_t,\n+\t\t svmopa_za32_mf8_m_fpm (1, p0, p1, z0, z1, fpm0),\n+\t\t svmopa_za32_m_fpm (1, p0, p1, z0, z1, fpm0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_m_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_m_1.c\nindex 44c3e48e916..5f013bd4194 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_m_1.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_m_1.c\n@@ -46,3 +46,17 @@ f4 (svbool_t pg, svint16_t s16) __arm_streaming __arm_inout(\"za\")\n svmopa_za64_m (-1, pg, pg, s16, s16); /* { dg-error {passing -1 to argument 1 of 'svmopa_za64_m', which expects a value in the range \\[0, 7\\]} } */\n svmopa_za64_m (8, pg, pg, s16, s16); /* { dg-error {passing 8 to argument 1 of 'svmopa_za64_m', which expects a value in the range \\[0, 7\\]} } */\n }\n+\n+#pragma GCC target (\"arch=armv9-a+sme-f8f16+sme-f8f32\")\n+\n+void\n+f5 (svbool_t pg, svmfloat8_t mf8, fpm_t fpm) __arm_streaming __arm_inout(\"za\")\n+{\n+ svmopa_za16_mf8_m_fpm(0, pg, pg, mf8, mf8); /* { dg-error {too few arguments to function 'svmopa_za16_mf8_m_fpm'} } */\n+ svmopa_za16_mf8_m_fpm(0, pg, pg, mf8, mf8, fpm);\n+ svmopa_za16_mf8_m_fpm(0, pg, pg, mf8, mf8, fpm, fpm); /* { dg-error {too many arguments to function 'svmopa_za16_mf8_m_fpm'; expected 6, have 7} } */\n+\n+ svmopa_za16_mf8_m_fpm(-1, pg, pg, mf8, mf8, fpm); /* { dg-error {passing -1 to argument 1 of 'svmopa_za16_mf8_m_fpm', which expects a value in the range \\[0, 1\\]} } */\n+ svmopa_za16_mf8_m_fpm(2, pg, pg, mf8, mf8, fpm); /* { dg-error {passing 2 to argument 1 of 'svmopa_za16_mf8_m_fpm', which expects a value in the range \\[0, 1\\]} } */\n+ svmopa_za32_mf8_m_fpm(4, pg, pg, mf8, mf8, fpm); /* { dg-error {passing 4 to argument 1 of 'svmopa_za32_mf8_m_fpm', which expects a value in the range \\[0, 3\\]} } */\n+}\n","prefixes":["v5","8/9"]}