{"id":2175649,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175649/?format=json","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/1.0/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/"},"msgid":"<20251219-pgtable_check_v18rebase-v18-12-755bc151a50b@linux.ibm.com>","date":"2025-12-18T17:09:44","name":"[v18,12/12] powerpc/mm: Support page table check","commit_ref":null,"pull_url":null,"state":"handled-elsewhere","archived":false,"hash":"189570fe164fd92721316b1a8c825fda54013b14","submitter":{"id":76551,"url":"http://patchwork.ozlabs.org/api/1.0/people/76551/?format=json","name":"Andrew Donnellan","email":"ajd@linux.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20251219-pgtable_check_v18rebase-v18-12-755bc151a50b@linux.ibm.com/mbox/","series":[{"id":485885,"url":"http://patchwork.ozlabs.org/api/1.0/series/485885/?format=json","date":"2025-12-18T17:09:32","name":"Support page table check on PowerPC","version":18,"mbox":"http://patchwork.ozlabs.org/series/485885/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175649/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=ZmfaEqiD;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=112.213.38.117; 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"\n <20251219-pgtable_check_v18rebase-v18-12-755bc151a50b@linux.ibm.com>","References":"\n <20251219-pgtable_check_v18rebase-v18-0-755bc151a50b@linux.ibm.com>","In-Reply-To":"\n <20251219-pgtable_check_v18rebase-v18-0-755bc151a50b@linux.ibm.com>","To":"linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org,\n Pasha Tatashin ,\n Andrew Morton ,\n Madhavan Srinivasan ,\n Nicholas Piggin ,\n Rohan McLure ,\n Christophe Leroy ","Cc":"Alexandre Ghiti , x86@kernel.org,\n Nicholas Miehlbradt ,\n Sweet Tea Dorminy ,\n Andrew Donnellan ,\n Srish Srinivasan ,\n linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n linux-riscv@lists.infradead.org","X-Mailer":"b4 0.14.2","X-TM-AS-GCONF":"00","X-Proofpoint-ORIG-GUID":"eNu2e127LIQy4aY2YrSIfr7iDjsVBUpr","X-Authority-Analysis":"v=2.4 cv=CLgnnBrD c=1 sm=1 tr=0 ts=694435bc cx=c_pps\n a=AfN7/Ok6k8XGzOShvHwTGQ==:117 a=AfN7/Ok6k8XGzOShvHwTGQ==:17\n a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=VkNPw1HP01LnGYTKEx00:22\n a=VnNF1IyMAAAA:8 a=1UX6Do5GAAAA:8 a=7ipKWUHlAAAA:8 a=4bd5X8VpKi2lnJFIGqUA:9\n a=QEXdDO2ut3YA:10 a=Et2XPkok5AAZYJIKzHr1:22 a=gpc5p9EgBqZVLdJeV_V1:22","X-Proofpoint-GUID":"XG2VG8GP17OvRjJpZ3lNl1K6nBOipRVT","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjUxMjEzMDAwOSBTYWx0ZWRfX3gv6siLY5ojd\n d3c8VhUgacjdKodkvhOIBFQmtPF6r4ub/+2R3HGWICHxXRs9PM0vcdalmUHtSKh/wR2QHL0owkM\n AWHUuUVMYs71Tf4T7Zr6Qkg7gQcbbE62Oc3RUImO5e294NdNxK4t+gHtbe6XlZFuifuzawt8Vwf\n TfBK9xn6OjnNPSnpsu0hmJ6oMpd4XJaJXEKM0CTtEpTXsE1PvW4Or7zmKnl5L3GXFfVX85KeiU2\n YhhYEH7NXmx6CN1AD08uWBJ9NaQLpNOgwFCPksUlhVhBd1unnaJ614GfUUrVITkqEiMDgf10GFi\n aqVqf0HBPSCKoZ/tuUFiyooLt3BigdE5dAR4hl3wYTmUJPUyZWVyZiBBSnRtpykxeyy4QPKUUgE\n dApJRaiL/sZR6knvtm3sCE/NNWrBCw==","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49\n definitions=2025-12-18_02,2025-12-17_02,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n spamscore=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 suspectscore=0\n phishscore=0 priorityscore=1501 bulkscore=0 impostorscore=0 adultscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.19.0-2510240000 definitions=main-2512130009","X-Spam-Status":"No, score=-0.7 required=3.0 tests=DKIM_SIGNED,DKIM_VALID,\n\tRCVD_IN_DNSWL_LOW,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,\n\tSPF_PASS autolearn=disabled version=4.0.1 OzLabs 8","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"},"content":"From: Rohan McLure \n\nOn creation and clearing of a page table mapping, instrument such calls\nby invoking page_table_check_pte_set and page_table_check_pte_clear\nrespectively. These calls serve as a sanity check against illegal\nmappings.\n\nEnable ARCH_SUPPORTS_PAGE_TABLE_CHECK on powerpc, except when HUGETLB_PAGE\nis enabled (powerpc has some weirdness in how it implements\nset_huge_pte_at(), which may require some further work).\n\nSee also:\n\nriscv support in commit 3fee229a8eb9 (\"riscv/mm: enable\nARCH_SUPPORTS_PAGE_TABLE_CHECK\")\narm64 in commit 42b2547137f5 (\"arm64/mm: enable\nARCH_SUPPORTS_PAGE_TABLE_CHECK\")\nx86_64 in commit d283d422c6c4 (\"x86: mm: add x86_64 support for page table\ncheck\")\n\n[ajd@linux.ibm.com: rebase, add additional instrumentation, misc fixes]\nReviewed-by: Christophe Leroy \nSigned-off-by: Rohan McLure \nReviewed-by: Pasha Tatashin \nSigned-off-by: Andrew Donnellan \nAcked-by: Madhavan Srinivasan \n---\nv18:\n- instrument the new pudp_invalidate()\n- don't allow with HUGETLB_PAGE, for now\n---\n arch/powerpc/Kconfig | 1 +\n arch/powerpc/include/asm/book3s/32/pgtable.h | 7 ++++-\n arch/powerpc/include/asm/book3s/64/pgtable.h | 45 +++++++++++++++++++++-------\n arch/powerpc/include/asm/nohash/pgtable.h | 8 ++++-\n arch/powerpc/mm/book3s64/hash_pgtable.c | 4 +++\n arch/powerpc/mm/book3s64/pgtable.c | 19 ++++++++----\n arch/powerpc/mm/book3s64/radix_pgtable.c | 3 ++\n arch/powerpc/mm/pgtable.c | 4 +++\n 8 files changed, 73 insertions(+), 18 deletions(-)","diff":"diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig\nindex 9537a61ebae02dbfe44918232eb6114c2b763387..271690445a454b642041e47b0d73cc3fe7d38ae5 100644\n--- a/arch/powerpc/Kconfig\n+++ b/arch/powerpc/Kconfig\n@@ -172,6 +172,7 @@ config PPC\n \tselect ARCH_STACKWALK\n \tselect ARCH_SUPPORTS_ATOMIC_RMW\n \tselect ARCH_SUPPORTS_DEBUG_PAGEALLOC\tif PPC_BOOK3S || PPC_8xx\n+\tselect ARCH_SUPPORTS_PAGE_TABLE_CHECK\tif !HUGETLB_PAGE\n \tselect ARCH_SUPPORTS_SCHED_MC\t\tif SMP\n \tselect ARCH_SUPPORTS_SCHED_SMT\t\tif PPC64 && SMP\n \tselect SCHED_MC\t\t\t\tif ARCH_SUPPORTS_SCHED_MC\ndiff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h\nindex 2edca1068b6f31e64ddc4f39f594bb3ac27a8435..dcbae85218304f9062e4414db17f589246733819 100644\n--- a/arch/powerpc/include/asm/book3s/32/pgtable.h\n+++ b/arch/powerpc/include/asm/book3s/32/pgtable.h\n@@ -202,6 +202,7 @@ void unmap_kernel_page(unsigned long va);\n #ifndef __ASSEMBLER__\n #include \n #include \n+#include \n \n /* Bits to mask out from a PGD to get to the PUD page */\n #define PGD_MASKED_BITS\t\t0\n@@ -315,7 +316,11 @@ static inline int __ptep_test_and_clear_young(struct mm_struct *mm,\n static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,\n \t\t\t\t pte_t *ptep)\n {\n-\treturn __pte(pte_update(mm, addr, ptep, ~_PAGE_HASHPTE, 0, 0));\n+\tpte_t old_pte = __pte(pte_update(mm, addr, ptep, ~_PAGE_HASHPTE, 0, 0));\n+\n+\tpage_table_check_pte_clear(mm, addr, old_pte);\n+\n+\treturn old_pte;\n }\n \n #define __HAVE_ARCH_PTEP_SET_WRPROTECT\ndiff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h\nindex 2d69a827594f3c8593283fa11acd4750577e71a7..1a91762b455d9380481eef01f7f86ba5f856e375 100644\n--- a/arch/powerpc/include/asm/book3s/64/pgtable.h\n+++ b/arch/powerpc/include/asm/book3s/64/pgtable.h\n@@ -144,6 +144,8 @@\n #define PAGE_KERNEL_ROX\t__pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)\n \n #ifndef __ASSEMBLER__\n+#include \n+\n /*\n * page table defines\n */\n@@ -416,8 +418,11 @@ static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,\n static inline pte_t ptep_get_and_clear(struct mm_struct *mm,\n \t\t\t\t unsigned long addr, pte_t *ptep)\n {\n-\tunsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);\n-\treturn __pte(old);\n+\tpte_t old_pte = __pte(pte_update(mm, addr, ptep, ~0UL, 0, 0));\n+\n+\tpage_table_check_pte_clear(mm, addr, old_pte);\n+\n+\treturn old_pte;\n }\n \n #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL\n@@ -426,11 +431,16 @@ static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,\n \t\t\t\t\t pte_t *ptep, int full)\n {\n \tif (full && radix_enabled()) {\n+\t\tpte_t old_pte;\n+\n \t\t/*\n \t\t * We know that this is a full mm pte clear and\n \t\t * hence can be sure there is no parallel set_pte.\n \t\t */\n-\t\treturn radix__ptep_get_and_clear_full(mm, addr, ptep, full);\n+\t\told_pte = radix__ptep_get_and_clear_full(mm, addr, ptep, full);\n+\t\tpage_table_check_pte_clear(mm, addr, old_pte);\n+\n+\t\treturn old_pte;\n \t}\n \treturn ptep_get_and_clear(mm, addr, ptep);\n }\n@@ -1301,19 +1311,34 @@ extern int pudp_test_and_clear_young(struct vm_area_struct *vma,\n static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,\n \t\t\t\t\t unsigned long addr, pmd_t *pmdp)\n {\n-\tif (radix_enabled())\n-\t\treturn radix__pmdp_huge_get_and_clear(mm, addr, pmdp);\n-\treturn hash__pmdp_huge_get_and_clear(mm, addr, pmdp);\n+\tpmd_t old_pmd;\n+\n+\tif (radix_enabled()) {\n+\t\told_pmd = radix__pmdp_huge_get_and_clear(mm, addr, pmdp);\n+\t} else {\n+\t\told_pmd = hash__pmdp_huge_get_and_clear(mm, addr, pmdp);\n+\t}\n+\n+\tpage_table_check_pmd_clear(mm, addr, old_pmd);\n+\n+\treturn old_pmd;\n }\n \n #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR\n static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,\n \t\t\t\t\t unsigned long addr, pud_t *pudp)\n {\n-\tif (radix_enabled())\n-\t\treturn radix__pudp_huge_get_and_clear(mm, addr, pudp);\n-\tBUG();\n-\treturn *pudp;\n+\tpud_t old_pud;\n+\n+\tif (radix_enabled()) {\n+\t\told_pud = radix__pudp_huge_get_and_clear(mm, addr, pudp);\n+\t} else {\n+\t\tBUG();\n+\t}\n+\n+\tpage_table_check_pud_clear(mm, addr, old_pud);\n+\n+\treturn old_pud;\n }\n \n static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,\ndiff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h\nindex 9bf3e40f27b645da660cbeeb561f08eeef180b1b..e6da5eaccff632a353139f27bf54472e716ac246 100644\n--- a/arch/powerpc/include/asm/nohash/pgtable.h\n+++ b/arch/powerpc/include/asm/nohash/pgtable.h\n@@ -29,6 +29,8 @@ static inline pte_basic_t pte_update(struct mm_struct *mm, unsigned long addr, p\n \n #ifndef __ASSEMBLER__\n \n+#include \n+\n extern int icache_44x_need_flush;\n \n #ifndef pte_huge_size\n@@ -122,7 +124,11 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,\n static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,\n \t\t\t\t pte_t *ptep)\n {\n-\treturn __pte(pte_update(mm, addr, ptep, ~0UL, 0, 0));\n+\tpte_t old_pte = __pte(pte_update(mm, addr, ptep, ~0UL, 0, 0));\n+\n+\tpage_table_check_pte_clear(mm, addr, old_pte);\n+\n+\treturn old_pte;\n }\n #define __HAVE_ARCH_PTEP_GET_AND_CLEAR\n \ndiff --git a/arch/powerpc/mm/book3s64/hash_pgtable.c b/arch/powerpc/mm/book3s64/hash_pgtable.c\nindex 82d31177630b810a70c9e7797f1f163fa97ccfaf..ac2a24d15d2e3733bd013eb168b2656ad61e7af7 100644\n--- a/arch/powerpc/mm/book3s64/hash_pgtable.c\n+++ b/arch/powerpc/mm/book3s64/hash_pgtable.c\n@@ -8,6 +8,7 @@\n #include \n #include \n #include \n+#include \n #include \n \n #include \n@@ -230,6 +231,9 @@ pmd_t hash__pmdp_collapse_flush(struct vm_area_struct *vma, unsigned long addres\n \n \tpmd = *pmdp;\n \tpmd_clear(pmdp);\n+\n+\tpage_table_check_pmd_clear(vma->vm_mm, address, pmd);\n+\n \t/*\n \t * Wait for all pending hash_page to finish. This is needed\n \t * in case of subpage collapse. When we collapse normal pages\ndiff --git a/arch/powerpc/mm/book3s64/pgtable.c b/arch/powerpc/mm/book3s64/pgtable.c\nindex 97db2f42ea3d3bd476d0ef03da47ff325eb73db9..4b09c04654a8f26e84f811df61461d83ae71f299 100644\n--- a/arch/powerpc/mm/book3s64/pgtable.c\n+++ b/arch/powerpc/mm/book3s64/pgtable.c\n@@ -10,6 +10,7 @@\n #include \n #include \n #include \n+#include \n \n #include \n #include \n@@ -127,6 +128,7 @@ void set_pmd_at(struct mm_struct *mm, unsigned long addr,\n \tWARN_ON(!(pmd_leaf(pmd)));\n #endif\n \ttrace_hugepage_set_pmd(addr, pmd_val(pmd));\n+\tpage_table_check_pmd_set(mm, addr, pmdp, pmd);\n \treturn set_pte_at_unchecked(mm, addr, pmdp_ptep(pmdp), pmd_pte(pmd));\n }\n \n@@ -144,6 +146,7 @@ void set_pud_at(struct mm_struct *mm, unsigned long addr,\n \tWARN_ON(!(pud_leaf(pud)));\n #endif\n \ttrace_hugepage_set_pud(addr, pud_val(pud));\n+\tpage_table_check_pud_set(mm, addr, pudp, pud);\n \treturn set_pte_at_unchecked(mm, addr, pudp_ptep(pudp), pud_pte(pud));\n }\n \n@@ -179,23 +182,27 @@ void serialize_against_pte_lookup(struct mm_struct *mm)\n pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,\n \t\t pmd_t *pmdp)\n {\n-\tunsigned long old_pmd;\n+\tpmd_t old_pmd;\n \n \tVM_WARN_ON_ONCE(!pmd_present(*pmdp));\n-\told_pmd = pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT, _PAGE_INVALID);\n+\told_pmd = __pmd(pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT, _PAGE_INVALID));\n \tflush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);\n-\treturn __pmd(old_pmd);\n+\tpage_table_check_pmd_clear(vma->vm_mm, address, old_pmd);\n+\n+\treturn old_pmd;\n }\n \n pud_t pudp_invalidate(struct vm_area_struct *vma, unsigned long address,\n \t\t pud_t *pudp)\n {\n-\tunsigned long old_pud;\n+\tpud_t old_pud;\n \n \tVM_WARN_ON_ONCE(!pud_present(*pudp));\n-\told_pud = pud_hugepage_update(vma->vm_mm, address, pudp, _PAGE_PRESENT, _PAGE_INVALID);\n+\told_pud = __pud(pud_hugepage_update(vma->vm_mm, address, pudp, _PAGE_PRESENT, _PAGE_INVALID));\n \tflush_pud_tlb_range(vma, address, address + HPAGE_PUD_SIZE);\n-\treturn __pud(old_pud);\n+\tpage_table_check_pud_clear(vma->vm_mm, address, old_pud);\n+\n+\treturn old_pud;\n }\n \n pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,\ndiff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c\nindex b2541bf33d01cbb59562866d844354b39b14a86c..10aced261cff4d39e64407e31ac05e9eb340007b 100644\n--- a/arch/powerpc/mm/book3s64/radix_pgtable.c\n+++ b/arch/powerpc/mm/book3s64/radix_pgtable.c\n@@ -14,6 +14,7 @@\n #include \n #include \n #include \n+#include \n #include \n #include \n #include \n@@ -1474,6 +1475,8 @@ pmd_t radix__pmdp_collapse_flush(struct vm_area_struct *vma, unsigned long addre\n \tpmd = *pmdp;\n \tpmd_clear(pmdp);\n \n+\tpage_table_check_pmd_clear(vma->vm_mm, address, pmd);\n+\n \tradix__flush_tlb_collapsed_pmd(vma->vm_mm, address);\n \n \treturn pmd;\ndiff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c\nindex 7b69cd16e011c31fffac2439a76ba20e00fc9a78..a9be337be3e461fdffa7181a87376cd8329aa9e0 100644\n--- a/arch/powerpc/mm/pgtable.c\n+++ b/arch/powerpc/mm/pgtable.c\n@@ -22,6 +22,7 @@\n #include \n #include \n #include \n+#include \n #include \n #include \n #include \n@@ -206,6 +207,9 @@ void set_ptes(struct mm_struct *mm, unsigned long addr, pte_t *ptep,\n \t * and not hw_valid ptes. Hence there is no translation cache flush\n \t * involved that need to be batched.\n \t */\n+\n+\tpage_table_check_ptes_set(mm, addr, ptep, pte, nr);\n+\n \tfor (;;) {\n \n \t\t/*\n","prefixes":["v18","12/12"]}