{"id":2175639,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175639/?format=json","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/1.0/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/"},"msgid":"<20251219-pgtable_check_v18rebase-v18-1-755bc151a50b@linux.ibm.com>","date":"2025-12-18T17:09:33","name":"[v18,01/12] arm64/mm: Add addr parameter to __set_ptes_anysz()","commit_ref":null,"pull_url":null,"state":"handled-elsewhere","archived":false,"hash":"2c273521c2316744ca4ae04c163ebc4d58513a3a","submitter":{"id":76551,"url":"http://patchwork.ozlabs.org/api/1.0/people/76551/?format=json","name":"Andrew Donnellan","email":"ajd@linux.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20251219-pgtable_check_v18rebase-v18-1-755bc151a50b@linux.ibm.com/mbox/","series":[{"id":485885,"url":"http://patchwork.ozlabs.org/api/1.0/series/485885/?format=json","date":"2025-12-18T17:09:32","name":"Support page table check on PowerPC","version":18,"mbox":"http://patchwork.ozlabs.org/series/485885/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175639/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=CVUP9NfG;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"\n <20251219-pgtable_check_v18rebase-v18-1-755bc151a50b@linux.ibm.com>","References":"\n <20251219-pgtable_check_v18rebase-v18-0-755bc151a50b@linux.ibm.com>","In-Reply-To":"\n <20251219-pgtable_check_v18rebase-v18-0-755bc151a50b@linux.ibm.com>","To":"linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org,\n Pasha Tatashin ,\n Andrew Morton ,\n Madhavan Srinivasan ,\n Nicholas Piggin ,\n Rohan McLure ,\n Christophe Leroy ","Cc":"Alexandre Ghiti , x86@kernel.org,\n Nicholas Miehlbradt ,\n Sweet Tea Dorminy ,\n Andrew Donnellan ,\n Srish Srinivasan ,\n linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n linux-riscv@lists.infradead.org","X-Mailer":"b4 0.14.2","X-TM-AS-GCONF":"00","X-Proofpoint-GUID":"FBTOwGWFchBwemRmIEWG1lzy85XJ1ZSC","X-Proofpoint-ORIG-GUID":"4g7xWkc1F-jljt0yG9QNKRSDr-vmSUiU","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjUxMjEzMDAyMyBTYWx0ZWRfXxyUOycSYTLr9\n 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phishscore=0 malwarescore=0 adultscore=0 priorityscore=1501\n clxscore=1011 lowpriorityscore=0 bulkscore=0 spamscore=0 suspectscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.19.0-2510240000 definitions=main-2512130023","X-Spam-Status":"No, score=-0.7 required=3.0 tests=DKIM_SIGNED,DKIM_VALID,\n\tRCVD_IN_DNSWL_LOW,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,\n\tSPF_PASS autolearn=disabled version=4.0.1 OzLabs 8","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"},"content":"To provide support for page table check on powerpc, we need to reinstate the\naddress parameter in several functions, including\npage_table_check_{ptes,pmds,puds}_set().\n\nIn preparation for this, add the addr parameter to arm64's __set_ptes_anysz()\nand change its callsites accordingly.\n\nSigned-off-by: Andrew Donnellan \n---\nv15: new patch\nv16: rebase\n---\n arch/arm64/include/asm/pgtable.h | 19 ++++++++-----------\n arch/arm64/mm/hugetlbpage.c | 10 +++++-----\n 2 files changed, 13 insertions(+), 16 deletions(-)","diff":"diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h\nindex 445e18e92221c98eef717888aeac71d1d6b1da06..52f3ea07427cef399e68bea0dbab39d03ea83060 100644\n--- a/arch/arm64/include/asm/pgtable.h\n+++ b/arch/arm64/include/asm/pgtable.h\n@@ -673,8 +673,8 @@ static inline pgprot_t pud_pgprot(pud_t pud)\n \treturn __pgprot(pud_val(pfn_pud(pfn, __pgprot(0))) ^ pud_val(pud));\n }\n \n-static inline void __set_ptes_anysz(struct mm_struct *mm, pte_t *ptep,\n-\t\t\t\t pte_t pte, unsigned int nr,\n+static inline void __set_ptes_anysz(struct mm_struct *mm, unsigned long addr,\n+\t\t\t\t pte_t *ptep, pte_t pte, unsigned int nr,\n \t\t\t\t unsigned long pgsize)\n {\n \tunsigned long stride = pgsize >> PAGE_SHIFT;\n@@ -709,26 +709,23 @@ static inline void __set_ptes_anysz(struct mm_struct *mm, pte_t *ptep,\n \t__set_pte_complete(pte);\n }\n \n-static inline void __set_ptes(struct mm_struct *mm,\n-\t\t\t unsigned long __always_unused addr,\n+static inline void __set_ptes(struct mm_struct *mm, unsigned long addr,\n \t\t\t pte_t *ptep, pte_t pte, unsigned int nr)\n {\n-\t__set_ptes_anysz(mm, ptep, pte, nr, PAGE_SIZE);\n+\t__set_ptes_anysz(mm, addr, ptep, pte, nr, PAGE_SIZE);\n }\n \n-static inline void __set_pmds(struct mm_struct *mm,\n-\t\t\t unsigned long __always_unused addr,\n+static inline void __set_pmds(struct mm_struct *mm, unsigned long addr,\n \t\t\t pmd_t *pmdp, pmd_t pmd, unsigned int nr)\n {\n-\t__set_ptes_anysz(mm, (pte_t *)pmdp, pmd_pte(pmd), nr, PMD_SIZE);\n+\t__set_ptes_anysz(mm, addr, (pte_t *)pmdp, pmd_pte(pmd), nr, PMD_SIZE);\n }\n #define set_pmd_at(mm, addr, pmdp, pmd) __set_pmds(mm, addr, pmdp, pmd, 1)\n \n-static inline void __set_puds(struct mm_struct *mm,\n-\t\t\t unsigned long __always_unused addr,\n+static inline void __set_puds(struct mm_struct *mm, unsigned long addr,\n \t\t\t pud_t *pudp, pud_t pud, unsigned int nr)\n {\n-\t__set_ptes_anysz(mm, (pte_t *)pudp, pud_pte(pud), nr, PUD_SIZE);\n+\t__set_ptes_anysz(mm, addr, (pte_t *)pudp, pud_pte(pud), nr, PUD_SIZE);\n }\n #define set_pud_at(mm, addr, pudp, pud) __set_puds(mm, addr, pudp, pud, 1)\n \ndiff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c\nindex 1d90a7e753336d86314fee0f753e8779d6a6bc12..1003b502075208d4252c27ffdacb1aaf4928639b 100644\n--- a/arch/arm64/mm/hugetlbpage.c\n+++ b/arch/arm64/mm/hugetlbpage.c\n@@ -225,8 +225,8 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,\n \tncontig = num_contig_ptes(sz, &pgsize);\n \n \tif (!pte_present(pte)) {\n-\t\tfor (i = 0; i < ncontig; i++, ptep++)\n-\t\t\t__set_ptes_anysz(mm, ptep, pte, 1, pgsize);\n+\t\tfor (i = 0; i < ncontig; i++, ptep++, addr += pgsize)\n+\t\t\t__set_ptes_anysz(mm, addr, ptep, pte, 1, pgsize);\n \t\treturn;\n \t}\n \n@@ -234,7 +234,7 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,\n \tif (pte_cont(pte) && pte_valid(__ptep_get(ptep)))\n \t\tclear_flush(mm, addr, ptep, pgsize, ncontig);\n \n-\t__set_ptes_anysz(mm, ptep, pte, ncontig, pgsize);\n+\t__set_ptes_anysz(mm, addr, ptep, pte, ncontig, pgsize);\n }\n \n pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,\n@@ -449,7 +449,7 @@ int huge_ptep_set_access_flags(struct vm_area_struct *vma,\n \tif (pte_young(orig_pte))\n \t\tpte = pte_mkyoung(pte);\n \n-\t__set_ptes_anysz(mm, ptep, pte, ncontig, pgsize);\n+\t__set_ptes_anysz(mm, addr, ptep, pte, ncontig, pgsize);\n \treturn 1;\n }\n \n@@ -473,7 +473,7 @@ void huge_ptep_set_wrprotect(struct mm_struct *mm,\n \tpte = get_clear_contig_flush(mm, addr, ptep, pgsize, ncontig);\n \tpte = pte_wrprotect(pte);\n \n-\t__set_ptes_anysz(mm, ptep, pte, ncontig, pgsize);\n+\t__set_ptes_anysz(mm, addr, ptep, pte, ncontig, pgsize);\n }\n \n pte_t huge_ptep_clear_flush(struct vm_area_struct *vma,\n","prefixes":["v18","01/12"]}