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AM4PEPF00027A6A.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"This patch extends the following intrinsics to support svmfloat8_t types and\nadds tests based on the equivalent ones for svuint8_t.\n\nSME:\n- svread_hor_za8[_mf8]_m, svread_hor_za128[_mf8]_m and related ver.\n- svwrite_hor_za8[_mf8]_m, svwrite_hor_za128[_mf8]_m and related ver.\n\nSME2:\n- svread_hor_za8_mf8_vg2, svread_hor_za8_mf8_vg4 and related ver.\n- svwrite_hor_za8[_mf8]_vg2, svwrite_hor_za8[_mf8]_vg4 and related ver.\n- svread_za8[_mf8]_vg1x2, svread_za8[_mf8]_vg1x4.\n- svwrite_za8[_mf8]_vg1x2, svwrite_za8[_mf8]_vg1x4.\n- svsel[_mf8_x2], svsel[_mf8_x4].\n- svzip[_mf8_x2], svzip[_mf8_x4].\n- svzipq[_mf8_x2], svzipq[_mf8_x4].\n- svuzp[_mf8_x2], svuzp[_mf8_x4].\n- svuzpq[_mf8_x2], svuzpq[_mf8_x4].\n- svld1[_mf8]_x2, svld1[_mf8]_x4.\n- svld1_vnum[_mf8]_x2, svld1_vnum[_mf8]_x4.\n\nSVE2.1/SME2:\n- svldnt1[_mf8]_x2, svldnt1[_mf8]_x4.\n- svldnt1_vnum[_mf8]_x2, svldnt1_vnum[_mf8]_x4.\n- svrevd[_mf8]_m, svrevd[_mf8]_z, svrevd[_mf8]_x.\n- svst1[_mf8_x2], svst1[_mf8_x4].\n- svst1_vnum[_mf8_x2], svst1_vnum[_mf8_x4].\n- svstnt1[_mf8_x2], svstnt1[_mf8_x4].\n- svstnt1_vnum[_mf8_x2], svstnt1_vnum[_mf8_x4].\n\nSME2.1:\n- svreadz_hor_za8_u8, svreadz_hor_za8_u8_vg2, svreadz_hor_za8_u8_vg4 and related\n ver.\n- svreadz_hor_za128_u8, svreadz_ver_za128_u8.\n- svreadz_za8_u8_vg1x2, svreadz_za8_u8_vg1x4.\n\nThis change follows ACLE 2024Q4.\n\ngcc/\n\t* config/aarch64/aarch64-sve-builtins.cc (TYPES_za_bhsd_data): Add\n\tD (za8, mf8) combination to za_bhsd_data.\n\ngcc/testsuite/\n\t* gcc.target/aarch64/sme/acle-asm/revd_mf8.c: Added test file.\n\t* gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/readz_ver_za128.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/sel_mf8_x2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/sel_mf8_x4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/st1_mf8_x2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/st1_mf8_x4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/zip_mf8_x2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/zip_mf8_x4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x4.c: Likewise.\n\t* gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x2.c: Likewise.\n\t* gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x4.c: Likewise.\n\t* gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x2.c: Likewise.\n\t* gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x4.c: Likewise.\n\t* gcc.target/aarch64/sve2/acle/asm/revd_mf8.c: Likewise.\n\t* gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x2.c: Likewise.\n\t* gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x4.c: Likewise.\n\t* gcc.target/aarch64/sme/acle-asm/read_hor_za128.c: Added mf8 tests.\n\t* gcc.target/aarch64/sme/acle-asm/read_hor_za8.c: Likewise.\n\t* gcc.target/aarch64/sme/acle-asm/read_ver_za128.c: Likewise.\n\t* gcc.target/aarch64/sme/acle-asm/read_ver_za8.c: Likewise.\n\t* gcc.target/aarch64/sme/acle-asm/write_hor_za128.c: Likewise.\n\t* gcc.target/aarch64/sme/acle-asm/write_hor_za8.c: Likewise.\n\t* gcc.target/aarch64/sme/acle-asm/write_ver_za128.c: Likewise.\n\t* gcc.target/aarch64/sme/acle-asm/write_ver_za8.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/read_hor_za8_vg2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/read_hor_za8_vg4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/read_ver_za8_vg2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/read_ver_za8_vg4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/read_za8_vg1x2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/read_za8_vg1x4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/readz_hor_za128.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/readz_hor_za8_vg2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/readz_hor_za8_vg4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/readz_hor_za8.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/readz_ver_za8_vg2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/readz_ver_za8_vg4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/readz_ver_za8.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/readz_za8_vg1x2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/readz_za8_vg1x4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/write_hor_za8_vg2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/write_hor_za8_vg4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/write_ver_za8_vg2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/write_ver_za8_vg4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/write_za8_vg1x2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/write_za8_vg1x4.c: Likewise.\n---\n gcc/config/aarch64/aarch64-sve-builtins.cc | 4 +-\n .../aarch64/sme/acle-asm/read_hor_za128.c | 31 ++\n .../aarch64/sme/acle-asm/read_hor_za8.c | 31 ++\n .../aarch64/sme/acle-asm/read_ver_za128.c | 31 ++\n .../aarch64/sme/acle-asm/read_ver_za8.c | 31 ++\n .../aarch64/sme/acle-asm/revd_mf8.c | 76 ++++\n .../aarch64/sme/acle-asm/write_hor_za128.c | 10 +\n .../aarch64/sme/acle-asm/write_hor_za8.c | 10 +\n .../aarch64/sme/acle-asm/write_ver_za128.c | 10 +\n .../aarch64/sme/acle-asm/write_ver_za8.c | 10 +\n .../aarch64/sme2/acle-asm/ld1_mf8_x2.c | 262 +++++++++++++\n .../aarch64/sme2/acle-asm/ld1_mf8_x4.c | 354 +++++++++++++++++\n .../aarch64/sme2/acle-asm/ldnt1_mf8_x2.c | 262 +++++++++++++\n .../aarch64/sme2/acle-asm/ldnt1_mf8_x4.c | 354 +++++++++++++++++\n .../aarch64/sme2/acle-asm/read_hor_za8_vg2.c | 78 ++++\n .../aarch64/sme2/acle-asm/read_hor_za8_vg4.c | 91 +++++\n .../aarch64/sme2/acle-asm/read_ver_za8_vg2.c | 78 ++++\n .../aarch64/sme2/acle-asm/read_ver_za8_vg4.c | 91 +++++\n .../aarch64/sme2/acle-asm/read_za8_vg1x2.c | 48 +++\n .../aarch64/sme2/acle-asm/read_za8_vg1x4.c | 54 +++\n .../aarch64/sme2/acle-asm/readz_hor_za128.c | 10 +\n .../aarch64/sme2/acle-asm/readz_hor_za8.c | 10 +\n .../aarch64/sme2/acle-asm/readz_hor_za8_vg2.c | 78 ++++\n .../aarch64/sme2/acle-asm/readz_hor_za8_vg4.c | 91 +++++\n .../aarch64/sme2/acle-asm/readz_ver_za128.c | 197 ++++++++++\n .../aarch64/sme2/acle-asm/readz_ver_za8.c | 10 +\n .../aarch64/sme2/acle-asm/readz_ver_za8_vg2.c | 77 ++++\n .../aarch64/sme2/acle-asm/readz_ver_za8_vg4.c | 90 +++++\n .../aarch64/sme2/acle-asm/readz_za8_vg1x2.c | 48 +++\n .../aarch64/sme2/acle-asm/readz_za8_vg1x4.c | 56 +++\n .../aarch64/sme2/acle-asm/sel_mf8_x2.c | 92 +++++\n .../aarch64/sme2/acle-asm/sel_mf8_x4.c | 92 +++++\n .../aarch64/sme2/acle-asm/st1_mf8_x2.c | 262 +++++++++++++\n .../aarch64/sme2/acle-asm/st1_mf8_x4.c | 354 +++++++++++++++++\n .../aarch64/sme2/acle-asm/stnt1_mf8_x2.c | 262 +++++++++++++\n .../aarch64/sme2/acle-asm/stnt1_mf8_x4.c | 354 +++++++++++++++++\n .../aarch64/sme2/acle-asm/uzp_mf8_x2.c | 77 ++++\n .../aarch64/sme2/acle-asm/uzp_mf8_x4.c | 73 ++++\n .../aarch64/sme2/acle-asm/uzpq_mf8_x2.c | 77 ++++\n .../aarch64/sme2/acle-asm/uzpq_mf8_x4.c | 73 ++++\n .../aarch64/sme2/acle-asm/write_hor_za8_vg2.c | 78 ++++\n .../aarch64/sme2/acle-asm/write_hor_za8_vg4.c | 91 +++++\n .../aarch64/sme2/acle-asm/write_ver_za8_vg2.c | 78 ++++\n .../aarch64/sme2/acle-asm/write_ver_za8_vg4.c | 91 +++++\n .../aarch64/sme2/acle-asm/write_za8_vg1x2.c | 48 +++\n .../aarch64/sme2/acle-asm/write_za8_vg1x4.c | 54 +++\n .../aarch64/sme2/acle-asm/zip_mf8_x2.c | 77 ++++\n .../aarch64/sme2/acle-asm/zip_mf8_x4.c | 73 ++++\n .../aarch64/sme2/acle-asm/zipq_mf8_x2.c | 77 ++++\n .../aarch64/sme2/acle-asm/zipq_mf8_x4.c | 73 ++++\n .../aarch64/sve2/acle/asm/ld1_mf8_x2.c | 269 +++++++++++++\n .../aarch64/sve2/acle/asm/ld1_mf8_x4.c | 361 ++++++++++++++++++\n .../aarch64/sve2/acle/asm/ldnt1_mf8_x2.c | 269 +++++++++++++\n .../aarch64/sve2/acle/asm/ldnt1_mf8_x4.c | 361 ++++++++++++++++++\n .../aarch64/sve2/acle/asm/revd_mf8.c | 80 ++++\n .../aarch64/sve2/acle/asm/stnt1_mf8_x2.c | 269 +++++++++++++\n .../aarch64/sve2/acle/asm/stnt1_mf8_x4.c | 361 ++++++++++++++++++\n 57 files changed, 7007 insertions(+), 2 deletions(-)\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme/acle-asm/revd_mf8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za128.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/sel_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/sel_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/st1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/st1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zip_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zip_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/revd_mf8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x4.c","diff":"diff --git a/gcc/config/aarch64/aarch64-sve-builtins.cc b/gcc/config/aarch64/aarch64-sve-builtins.cc\nindex dbd80cab627..e8eeedb4d36 100644\n--- a/gcc/config/aarch64/aarch64-sve-builtins.cc\n+++ b/gcc/config/aarch64/aarch64-sve-builtins.cc\n@@ -640,7 +640,7 @@ CONSTEXPR const group_suffix_info group_suffixes[] = {\n #define TYPES_d_za(S, D) \\\n S (za64)\n \n-/* { _za8 } x { _s8 _u8 }\n+/* { _za8 } x { _mf8 _s8 _u8 }\n \n { _za16 } x { _bf16 _f16 _s16 _u16 }\n \n@@ -648,7 +648,7 @@ CONSTEXPR const group_suffix_info group_suffixes[] = {\n \n { _za64 } x { _f64 _s64 _u64 }. */\n #define TYPES_za_bhsd_data(S, D) \\\n- D (za8, s8), D (za8, u8), \\\n+ D (za8, mf8), D (za8, s8), D (za8, u8), \\\n D (za16, bf16), D (za16, f16), D (za16, s16), D (za16, u16), \\\n D (za32, f32), D (za32, s32), D (za32, u32), \\\n D (za64, f64), D (za64, s64), D (za64, u64)\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_hor_za128.c b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_hor_za128.c\nindex c8eef3b16fd..fedefe5b824 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_hor_za128.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_hor_za128.c\n@@ -103,6 +103,16 @@ TEST_READ_ZA (read_za128_u8_0_w0_tied, svuint8_t,\n \t z0 = svread_hor_za128_u8_m (z0, p0, 0, w0),\n \t z0 = svread_hor_za128_m (z0, p0, 0, w0))\n \n+/*\n+** read_za128_mf8_0_w0_tied:\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tz0\\.q, p0/m, za0h\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (read_za128_mf8_0_w0_tied, svmfloat8_t,\n+\t z0 = svread_hor_za128_mf8_m (z0, p0, 0, w0),\n+\t z0 = svread_hor_za128_m (z0, p0, 0, w0))\n+\n /*\n ** read_za128_u8_0_w0_untied:\n ** (\n@@ -124,6 +134,27 @@ TEST_READ_ZA (read_za128_u8_0_w0_untied, svuint8_t,\n \t z0 = svread_hor_za128_u8_m (z1, p0, 0, w0),\n \t z0 = svread_hor_za128_m (z1, p0, 0, w0))\n \n+/*\n+** read_za128_mf8_0_w0_untied:\n+** (\n+**\tmov\t(w1[2-5]), w0\n+**\tmov\tz0\\.d, z1\\.d\n+**\tmova\tz0\\.q, p0/m, za0h\\.q\\[\\1, 0\\]\n+** |\n+**\tmov\tz0\\.d, z1\\.d\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tz0\\.q, p0/m, za0h\\.q\\[\\2, 0\\]\n+** |\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tz1\\.q, p0/m, za0h\\.q\\[\\3, 0\\]\n+**\tmov\tz0\\.d, z1\\.d\n+** )\n+**\tret\n+*/\n+TEST_READ_ZA (read_za128_mf8_0_w0_untied, svmfloat8_t,\n+\t z0 = svread_hor_za128_mf8_m (z1, p0, 0, w0),\n+\t z0 = svread_hor_za128_m (z1, p0, 0, w0))\n+\n /*\n ** read_za128_s16_0_w0_tied:\n **\tmov\t(w1[2-5]), w0\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_hor_za8.c b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_hor_za8.c\nindex 0ad5a953f6b..7c04ef30fd0 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_hor_za8.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_hor_za8.c\n@@ -103,6 +103,16 @@ TEST_READ_ZA (read_za8_u8_0_w0_tied, svuint8_t,\n \t z0 = svread_hor_za8_u8_m (z0, p0, 0, w0),\n \t z0 = svread_hor_za8_m (z0, p0, 0, w0))\n \n+/*\n+** read_za8_mf8_0_w0_tied:\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tz0\\.b, p0/m, za0h\\.b\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (read_za8_mf8_0_w0_tied, svmfloat8_t,\n+\t z0 = svread_hor_za8_mf8_m (z0, p0, 0, w0),\n+\t z0 = svread_hor_za8_m (z0, p0, 0, w0))\n+\n /*\n ** read_za8_u8_0_w0_untied:\n ** (\n@@ -123,3 +133,24 @@ TEST_READ_ZA (read_za8_u8_0_w0_tied, svuint8_t,\n TEST_READ_ZA (read_za8_u8_0_w0_untied, svuint8_t,\n \t z0 = svread_hor_za8_u8_m (z1, p0, 0, w0),\n \t z0 = svread_hor_za8_m (z1, p0, 0, w0))\n+\n+/*\n+** read_za8_mf8_0_w0_untied:\n+** (\n+**\tmov\t(w1[2-5]), w0\n+**\tmov\tz0\\.d, z1\\.d\n+**\tmova\tz0\\.b, p0/m, za0h\\.b\\[\\1, 0\\]\n+** |\n+**\tmov\tz0\\.d, z1\\.d\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tz0\\.b, p0/m, za0h\\.b\\[\\2, 0\\]\n+** |\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tz1\\.b, p0/m, za0h\\.b\\[\\3, 0\\]\n+**\tmov\tz0\\.d, z1\\.d\n+** )\n+**\tret\n+*/\n+TEST_READ_ZA (read_za8_mf8_0_w0_untied, svmfloat8_t,\n+\t z0 = svread_hor_za8_mf8_m (z1, p0, 0, w0),\n+\t z0 = svread_hor_za8_m (z1, p0, 0, w0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_ver_za128.c b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_ver_za128.c\nindex 93d5d60ea57..c4214d19e5d 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_ver_za128.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_ver_za128.c\n@@ -103,6 +103,16 @@ TEST_READ_ZA (read_za128_u8_0_w0_tied, svuint8_t,\n \t z0 = svread_ver_za128_u8_m (z0, p0, 0, w0),\n \t z0 = svread_ver_za128_m (z0, p0, 0, w0))\n \n+/*\n+** read_za128_mf8_0_w0_tied:\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tz0\\.q, p0/m, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (read_za128_mf8_0_w0_tied, svmfloat8_t,\n+\t z0 = svread_ver_za128_mf8_m (z0, p0, 0, w0),\n+\t z0 = svread_ver_za128_m (z0, p0, 0, w0))\n+\n /*\n ** read_za128_u8_0_w0_untied:\n ** (\n@@ -124,6 +134,27 @@ TEST_READ_ZA (read_za128_u8_0_w0_untied, svuint8_t,\n \t z0 = svread_ver_za128_u8_m (z1, p0, 0, w0),\n \t z0 = svread_ver_za128_m (z1, p0, 0, w0))\n \n+/*\n+** read_za128_mf8_0_w0_untied:\n+** (\n+**\tmov\t(w1[2-5]), w0\n+**\tmov\tz0\\.d, z1\\.d\n+**\tmova\tz0\\.q, p0/m, za0v\\.q\\[\\1, 0\\]\n+** |\n+**\tmov\tz0\\.d, z1\\.d\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tz0\\.q, p0/m, za0v\\.q\\[\\2, 0\\]\n+** |\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tz1\\.q, p0/m, za0v\\.q\\[\\3, 0\\]\n+**\tmov\tz0\\.d, z1\\.d\n+** )\n+**\tret\n+*/\n+TEST_READ_ZA (read_za128_mf8_0_w0_untied, svmfloat8_t,\n+\t z0 = svread_ver_za128_mf8_m (z1, p0, 0, w0),\n+\t z0 = svread_ver_za128_m (z1, p0, 0, w0))\n+\n /*\n ** read_za128_s16_0_w0_tied:\n **\tmov\t(w1[2-5]), w0\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_ver_za8.c b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_ver_za8.c\nindex 87564d1fa68..3859b2351fb 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_ver_za8.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/read_ver_za8.c\n@@ -103,6 +103,16 @@ TEST_READ_ZA (read_za8_u8_0_w0_tied, svuint8_t,\n \t z0 = svread_ver_za8_u8_m (z0, p0, 0, w0),\n \t z0 = svread_ver_za8_m (z0, p0, 0, w0))\n \n+/*\n+** read_za8_mf8_0_w0_tied:\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tz0\\.b, p0/m, za0v\\.b\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (read_za8_mf8_0_w0_tied, svmfloat8_t,\n+\t z0 = svread_ver_za8_mf8_m (z0, p0, 0, w0),\n+\t z0 = svread_ver_za8_m (z0, p0, 0, w0))\n+\n /*\n ** read_za8_u8_0_w0_untied:\n ** (\n@@ -123,3 +133,24 @@ TEST_READ_ZA (read_za8_u8_0_w0_tied, svuint8_t,\n TEST_READ_ZA (read_za8_u8_0_w0_untied, svuint8_t,\n \t z0 = svread_ver_za8_u8_m (z1, p0, 0, w0),\n \t z0 = svread_ver_za8_m (z1, p0, 0, w0))\n+\n+/*\n+** read_za8_mf8_0_w0_untied:\n+** (\n+**\tmov\t(w1[2-5]), w0\n+**\tmov\tz0\\.d, z1\\.d\n+**\tmova\tz0\\.b, p0/m, za0v\\.b\\[\\1, 0\\]\n+** |\n+**\tmov\tz0\\.d, z1\\.d\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tz0\\.b, p0/m, za0v\\.b\\[\\2, 0\\]\n+** |\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tz1\\.b, p0/m, za0v\\.b\\[\\3, 0\\]\n+**\tmov\tz0\\.d, z1\\.d\n+** )\n+**\tret\n+*/\n+TEST_READ_ZA (read_za8_mf8_0_w0_untied, svmfloat8_t,\n+\t z0 = svread_ver_za8_mf8_m (z1, p0, 0, w0),\n+\t z0 = svread_ver_za8_m (z1, p0, 0, w0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/revd_mf8.c b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/revd_mf8.c\nnew file mode 100644\nindex 00000000000..611714b539b\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/revd_mf8.c\n@@ -0,0 +1,76 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sme_acle.h\"\n+\n+/*\n+** revd_mf8_m_tied12:\n+**\trevd\tz0\\.q, p0/m, z0\\.q\n+**\tret\n+*/\n+TEST_UNIFORM_Z (revd_mf8_m_tied12, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_m (z0, p0, z0),\n+\t\tz0 = svrevd_m (z0, p0, z0))\n+\n+/*\n+** revd_mf8_m_tied1:\n+**\trevd\tz0\\.q, p0/m, z1\\.q\n+**\tret\n+*/\n+TEST_UNIFORM_Z (revd_mf8_m_tied1, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_m (z0, p0, z1),\n+\t\tz0 = svrevd_m (z0, p0, z1))\n+\n+/*\n+** revd_mf8_m_tied2:\n+**\tmov\t(z[0-9]+)\\.d, z0\\.d\n+**\tmovprfx\tz0, z1\n+**\trevd\tz0\\.q, p0/m, \\1\\.q\n+**\tret\n+*/\n+TEST_UNIFORM_Z (revd_mf8_m_tied2, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_m (z1, p0, z0),\n+\t\tz0 = svrevd_m (z1, p0, z0))\n+\n+/*\n+** revd_mf8_m_untied:\n+**\tmovprfx\tz0, z2\n+**\trevd\tz0\\.q, p0/m, z1\\.q\n+**\tret\n+*/\n+TEST_UNIFORM_Z (revd_mf8_m_untied, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_m (z2, p0, z1),\n+\t\tz0 = svrevd_m (z2, p0, z1))\n+\n+/* Awkward register allocation. Don't require specific output. */\n+TEST_UNIFORM_Z (revd_mf8_z_tied1, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_z (p0, z0),\n+\t\tz0 = svrevd_z (p0, z0))\n+\n+/*\n+** revd_mf8_z_untied:\n+**\tmovi?\t[vdz]0\\.?(?:[0-9]*[bhsd])?, #?0\n+**\trevd\tz0\\.q, p0/m, z1\\.q\n+**\tret\n+*/\n+TEST_UNIFORM_Z (revd_mf8_z_untied, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_z (p0, z1),\n+\t\tz0 = svrevd_z (p0, z1))\n+\n+/*\n+** revd_mf8_x_tied1:\n+**\trevd\tz0\\.q, p0/m, z0\\.q\n+**\tret\n+*/\n+TEST_UNIFORM_Z (revd_mf8_x_tied1, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_x (p0, z0),\n+\t\tz0 = svrevd_x (p0, z0))\n+\n+/*\n+** revd_mf8_x_untied:\n+**\tmovprfx\tz0, z1\n+**\trevd\tz0\\.q, p0/m, z1\\.q\n+**\tret\n+*/\n+TEST_UNIFORM_Z (revd_mf8_x_untied, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_x (p0, z1),\n+\t\tz0 = svrevd_x (p0, z1))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_hor_za128.c b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_hor_za128.c\nindex 119a2535e99..09447b35619 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_hor_za128.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_hor_za128.c\n@@ -92,6 +92,16 @@ TEST_WRITE_ZA (write_za128_u8_0_w0_z0, svuint8_t,\n \t svwrite_hor_za128_u8_m (0, w0, p0, z0),\n \t svwrite_hor_za128_m (0, w0, p0, z0))\n \n+/*\n+** write_za128_mf8_0_w0_z0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tza0h\\.q\\[\\1, 0\\], p0/m, z0\\.q\n+**\tret\n+*/\n+TEST_WRITE_ZA (write_za128_mf8_0_w0_z0, svmfloat8_t,\n+\t svwrite_hor_za128_mf8_m (0, w0, p0, z0),\n+\t svwrite_hor_za128_m (0, w0, p0, z0))\n+\n /*\n ** write_za128_s16_0_w0_z0:\n **\tmov\t(w1[2-5]), w0\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_hor_za8.c b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_hor_za8.c\nindex 683e1a64ab3..6529f9597fc 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_hor_za8.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_hor_za8.c\n@@ -91,3 +91,13 @@ TEST_WRITE_ZA (write_za8_s8_0_w0_z1, svint8_t,\n TEST_WRITE_ZA (write_za8_u8_0_w0_z0, svuint8_t,\n \t svwrite_hor_za8_u8_m (0, w0, p0, z0),\n \t svwrite_hor_za8_m (0, w0, p0, z0))\n+\n+/*\n+** write_za8_mf8_0_w0_z0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tza0h\\.b\\[\\1, 0\\], p0/m, z0\\.b\n+**\tret\n+*/\n+TEST_WRITE_ZA (write_za8_mf8_0_w0_z0, svmfloat8_t,\n+\t svwrite_hor_za8_mf8_m (0, w0, p0, z0),\n+\t svwrite_hor_za8_m (0, w0, p0, z0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_ver_za128.c b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_ver_za128.c\nindex 9622e99dde1..6c0d334c3dc 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_ver_za128.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_ver_za128.c\n@@ -92,6 +92,16 @@ TEST_WRITE_ZA (write_za128_u8_0_w0_z0, svuint8_t,\n \t svwrite_ver_za128_u8_m (0, w0, p0, z0),\n \t svwrite_ver_za128_m (0, w0, p0, z0))\n \n+/*\n+** write_za128_mf8_0_w0_z0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tza0v\\.q\\[\\1, 0\\], p0/m, z0\\.q\n+**\tret\n+*/\n+TEST_WRITE_ZA (write_za128_mf8_0_w0_z0, svmfloat8_t,\n+\t svwrite_ver_za128_mf8_m (0, w0, p0, z0),\n+\t svwrite_ver_za128_m (0, w0, p0, z0))\n+\n /*\n ** write_za128_s16_0_w0_z0:\n **\tmov\t(w1[2-5]), w0\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_ver_za8.c b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_ver_za8.c\nindex dd61828219c..0e7cda809f2 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_ver_za8.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme/acle-asm/write_ver_za8.c\n@@ -91,3 +91,13 @@ TEST_WRITE_ZA (write_za8_s8_0_w0_z1, svint8_t,\n TEST_WRITE_ZA (write_za8_u8_0_w0_z0, svuint8_t,\n \t svwrite_ver_za8_u8_m (0, w0, p0, z0),\n \t svwrite_ver_za8_m (0, w0, p0, z0))\n+\n+/*\n+** write_za8_mf8_0_w0_z0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmova\tza0v\\.b\\[\\1, 0\\], p0/m, z0\\.b\n+**\tret\n+*/\n+TEST_WRITE_ZA (write_za8_mf8_0_w0_z0, svmfloat8_t,\n+\t svwrite_ver_za8_mf8_m (0, w0, p0, z0),\n+\t svwrite_ver_za8_m (0, w0, p0, z0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x2.c\nnew file mode 100644\nindex 00000000000..6891c5c009a\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x2.c\n@@ -0,0 +1,262 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" { target { ! ilp32 } } } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** ld1_mf8_base:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_base, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0),\n+\t\t z0 = svld1_x2 (pn8, x0))\n+\n+/*\n+** ld1_mf8_index:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, x1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_index, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 + x1),\n+\t\t z0 = svld1_x2 (pn8, x0 + x1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_1:\n+**\tincb\tx0\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 + svcntb ()),\n+\t\t z0 = svld1_x2 (pn8, x0 + svcntb ()))\n+\n+/*\n+** ld1_mf8_2:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 + svcntb () * 2),\n+\t\t z0 = svld1_x2 (pn8, x0 + svcntb () * 2))\n+\n+/*\n+** ld1_mf8_14:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #14, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_14, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 + svcntb () * 14),\n+\t\t z0 = svld1_x2 (pn8, x0 + svcntb () * 14))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_16:\n+**\tincb\tx0, all, mul #16\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 + svcntb () * 16),\n+\t\t z0 = svld1_x2 (pn8, x0 + svcntb () * 16))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_m1:\n+**\tdecb\tx0\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 - svcntb ()),\n+\t\t z0 = svld1_x2 (pn8, x0 - svcntb ()))\n+\n+/*\n+** ld1_mf8_m2:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 - svcntb () * 2),\n+\t\t z0 = svld1_x2 (pn8, x0 - svcntb () * 2))\n+\n+/*\n+** ld1_mf8_m16:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-16, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 - svcntb () * 16),\n+\t\t z0 = svld1_x2 (pn8, x0 - svcntb () * 16))\n+\n+/*\n+** ld1_mf8_m18:\n+**\taddvl\t(x[0-9]+), x0, #-18\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[\\1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m18, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 - svcntb () * 18),\n+\t\t z0 = svld1_x2 (pn8, x0 - svcntb () * 18))\n+\n+/*\n+** ld1_mf8_z17:\n+**\tld1b\t{z[^\\n]+}, pn8/z, \\[x0\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_z17, svmfloat8x2_t, mfloat8_t,\n+\t\t z17 = svld1_mf8_x2 (pn8, x0),\n+\t\t z17 = svld1_x2 (pn8, x0))\n+\n+/*\n+** ld1_mf8_z22:\n+**\tld1b\t{z22\\.b(?: - |, )z23\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_z22, svmfloat8x2_t, mfloat8_t,\n+\t\t z22 = svld1_mf8_x2 (pn8, x0),\n+\t\t z22 = svld1_x2 (pn8, x0))\n+\n+/*\n+** ld1_mf8_z28:\n+**\tld1b\t{z28\\.b(?: - |, )z29\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_z28, svmfloat8x2_t, mfloat8_t,\n+\t\t z28 = svld1_mf8_x2 (pn8, x0),\n+\t\t z28 = svld1_x2 (pn8, x0))\n+\n+/*\n+** ld1_mf8_pn0:\n+**\tmov\tp([89]|1[0-5])\\.b, p0\\.b\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_pn0, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn0, x0),\n+\t\t z0 = svld1_x2 (pn0, x0))\n+\n+/*\n+** ld1_mf8_pn7:\n+**\tmov\tp([89]|1[0-5])\\.b, p7\\.b\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_pn7, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn7, x0),\n+\t\t z0 = svld1_x2 (pn7, x0))\n+\n+/*\n+** ld1_mf8_pn15:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn15/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_pn15, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn15, x0),\n+\t\t z0 = svld1_x2 (pn15, x0))\n+\n+/*\n+** ld1_vnum_mf8_0:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_0, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, 0),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, 0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_1:\n+**\tincb\tx0\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, 1),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, 1))\n+\n+/*\n+** ld1_vnum_mf8_2:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, 2),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, 2))\n+\n+/*\n+** ld1_vnum_mf8_14:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #14, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_14, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, 14),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, 14))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_16:\n+**\tincb\tx0, all, mul #16\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, 16),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, 16))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_m1:\n+**\tdecb\tx0\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, -1),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, -1))\n+\n+/*\n+** ld1_vnum_mf8_m2:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, -2),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, -2))\n+\n+/*\n+** ld1_vnum_mf8_m16:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-16, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, -16),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, -16))\n+\n+/*\n+** ld1_vnum_mf8_m18:\n+**\taddvl\t(x[0-9]+), x0, #-18\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[\\1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m18, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, -18),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, -18))\n+\n+/*\n+** ld1_vnum_mf8_x1:\n+**\tcntb\t(x[0-9]+)\n+** (\n+**\tmadd\t(x[0-9]+), (?:x1, \\1|\\1, x1), x0\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[\\2\\]\n+** |\n+**\tmul\t(x[0-9]+), (?:x1, \\1|\\1, x1)\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, \\3\\]\n+** )\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_x1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, x1),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, x1))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x4.c\nnew file mode 100644\nindex 00000000000..a95a33e6665\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x4.c\n@@ -0,0 +1,354 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" { target { ! ilp32 } } } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** ld1_mf8_base:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_base, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0),\n+\t\t z0 = svld1_x4 (pn8, x0))\n+\n+/*\n+** ld1_mf8_index:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_index, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 + x1),\n+\t\t z0 = svld1_x4 (pn8, x0 + x1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_1:\n+**\tincb\tx0\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 + svcntb ()),\n+\t\t z0 = svld1_x4 (pn8, x0 + svcntb ()))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_2:\n+**\tincb\tx0, all, mul #2\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 + svcntb () * 2),\n+\t\t z0 = svld1_x4 (pn8, x0 + svcntb () * 2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_3:\n+**\tincb\tx0, all, mul #3\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 + svcntb () * 3),\n+\t\t z0 = svld1_x4 (pn8, x0 + svcntb () * 3))\n+\n+/*\n+** ld1_mf8_4:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #4, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 + svcntb () * 4),\n+\t\t z0 = svld1_x4 (pn8, x0 + svcntb () * 4))\n+\n+/*\n+** ld1_mf8_28:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #28, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_28, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 + svcntb () * 28),\n+\t\t z0 = svld1_x4 (pn8, x0 + svcntb () * 28))\n+\n+/*\n+** ld1_mf8_32:\n+**\t[^{]*\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 + svcntb () * 32),\n+\t\t z0 = svld1_x4 (pn8, x0 + svcntb () * 32))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_m1:\n+**\tdecb\tx0\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 - svcntb ()),\n+\t\t z0 = svld1_x4 (pn8, x0 - svcntb ()))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_m2:\n+**\tdecb\tx0, all, mul #2\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 - svcntb () * 2),\n+\t\t z0 = svld1_x4 (pn8, x0 - svcntb () * 2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_m3:\n+**\tdecb\tx0, all, mul #3\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 - svcntb () * 3),\n+\t\t z0 = svld1_x4 (pn8, x0 - svcntb () * 3))\n+\n+/*\n+** ld1_mf8_m4:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-4, mul vl\\]\n+**\tret\n+*/\n+ TEST_LOAD_COUNT (ld1_mf8_m4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 - svcntb () * 4),\n+\t\t z0 = svld1_x4 (pn8, x0 - svcntb () * 4))\n+\n+/*\n+** ld1_mf8_m32:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-32, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 - svcntb () * 32),\n+\t\t z0 = svld1_x4 (pn8, x0 - svcntb () * 32))\n+\n+/*\n+** ld1_mf8_m36:\n+**\t[^{]*\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m36, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 - svcntb () * 36),\n+\t\t z0 = svld1_x4 (pn8, x0 - svcntb () * 36))\n+\n+/*\n+** ld1_mf8_z17:\n+**\tld1b\t{z[^\\n]+}, pn8/z, \\[x0\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_z17, svmfloat8x4_t, mfloat8_t,\n+\t\t z17 = svld1_mf8_x4 (pn8, x0),\n+\t\t z17 = svld1_x4 (pn8, x0))\n+\n+/*\n+** ld1_mf8_z22:\n+**\tld1b\t{z[^\\n]+}, pn8/z, \\[x0\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_z22, svmfloat8x4_t, mfloat8_t,\n+\t\t z22 = svld1_mf8_x4 (pn8, x0),\n+\t\t z22 = svld1_x4 (pn8, x0))\n+\n+/*\n+** ld1_mf8_z28:\n+**\tld1b\t{z28\\.b(?: - |, )z31\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_z28, svmfloat8x4_t, mfloat8_t,\n+\t\t z28 = svld1_mf8_x4 (pn8, x0),\n+\t\t z28 = svld1_x4 (pn8, x0))\n+\n+/*\n+** ld1_mf8_pn0:\n+**\tmov\tp([89]|1[0-5])\\.b, p0\\.b\n+**\tld1b\t{z0\\.b(?: - |, )z3\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_pn0, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn0, x0),\n+\t\t z0 = svld1_x4 (pn0, x0))\n+\n+/*\n+** ld1_mf8_pn7:\n+**\tmov\tp([89]|1[0-5])\\.b, p7\\.b\n+**\tld1b\t{z0\\.b(?: - |, )z3\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_pn7, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn7, x0),\n+\t\t z0 = svld1_x4 (pn7, x0))\n+\n+/*\n+** ld1_mf8_pn15:\n+**\tld1b\t{z0\\.b(?: - |, )z3\\.b}, pn15/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_pn15, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn15, x0),\n+\t\t z0 = svld1_x4 (pn15, x0))\n+\n+/*\n+** ld1_vnum_mf8_0:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_0, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, 0),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, 0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_1:\n+**\tincb\tx0\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, 1),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, 1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_2:\n+**\tincb\tx0, all, mul #2\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, 2),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, 2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_3:\n+**\tincb\tx0, all, mul #3\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, 3),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, 3))\n+\n+/*\n+** ld1_vnum_mf8_4:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #4, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, 4),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, 4))\n+\n+/*\n+** ld1_vnum_mf8_28:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #28, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_28, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, 28),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, 28))\n+\n+/*\n+** ld1_vnum_mf8_32:\n+**\t[^{]*\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, 32),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, 32))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_m1:\n+**\tdecb\tx0\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, -1),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, -1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_m2:\n+**\tdecb\tx0, all, mul #2\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, -2),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, -2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_m3:\n+**\tdecb\tx0, all, mul #3\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, -3),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, -3))\n+\n+/*\n+** ld1_vnum_mf8_m4:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-4, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, -4),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, -4))\n+\n+/*\n+** ld1_vnum_mf8_m32:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-32, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, -32),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, -32))\n+\n+/*\n+** ld1_vnum_mf8_m36:\n+**\t[^{]*\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m36, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, -36),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, -36))\n+\n+/*\n+** ld1_vnum_mf8_x1:\n+**\tcntb\t(x[0-9]+)\n+** (\n+**\tmadd\t(x[0-9]+), (?:x1, \\1|\\1, x1), x0\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[\\2\\]\n+** |\n+**\tmul\t(x[0-9]+), (?:x1, \\1|\\1, x1)\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, \\3\\]\n+** )\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_x1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, x1),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, x1))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x2.c\nnew file mode 100644\nindex 00000000000..1855dd115c7\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x2.c\n@@ -0,0 +1,262 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" { target { ! ilp32 } } } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** ldnt1_mf8_base:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_base, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0),\n+\t\t z0 = svldnt1_x2 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_index:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, x1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_index, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 + x1),\n+\t\t z0 = svldnt1_x2 (pn8, x0 + x1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_1:\n+**\tincb\tx0\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 + svcntb ()),\n+\t\t z0 = svldnt1_x2 (pn8, x0 + svcntb ()))\n+\n+/*\n+** ldnt1_mf8_2:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 + svcntb () * 2),\n+\t\t z0 = svldnt1_x2 (pn8, x0 + svcntb () * 2))\n+\n+/*\n+** ldnt1_mf8_14:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #14, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_14, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 + svcntb () * 14),\n+\t\t z0 = svldnt1_x2 (pn8, x0 + svcntb () * 14))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_16:\n+**\tincb\tx0, all, mul #16\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 + svcntb () * 16),\n+\t\t z0 = svldnt1_x2 (pn8, x0 + svcntb () * 16))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_m1:\n+**\tdecb\tx0\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 - svcntb ()),\n+\t\t z0 = svldnt1_x2 (pn8, x0 - svcntb ()))\n+\n+/*\n+** ldnt1_mf8_m2:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 - svcntb () * 2),\n+\t\t z0 = svldnt1_x2 (pn8, x0 - svcntb () * 2))\n+\n+/*\n+** ldnt1_mf8_m16:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-16, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 - svcntb () * 16),\n+\t\t z0 = svldnt1_x2 (pn8, x0 - svcntb () * 16))\n+\n+/*\n+** ldnt1_mf8_m18:\n+**\taddvl\t(x[0-9]+), x0, #-18\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[\\1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m18, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 - svcntb () * 18),\n+\t\t z0 = svldnt1_x2 (pn8, x0 - svcntb () * 18))\n+\n+/*\n+** ldnt1_mf8_z17:\n+**\tldnt1b\t{z[^\\n]+}, pn8/z, \\[x0\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_z17, svmfloat8x2_t, mfloat8_t,\n+\t\t z17 = svldnt1_mf8_x2 (pn8, x0),\n+\t\t z17 = svldnt1_x2 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_z22:\n+**\tldnt1b\t{z22\\.b(?: - |, )z23\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_z22, svmfloat8x2_t, mfloat8_t,\n+\t\t z22 = svldnt1_mf8_x2 (pn8, x0),\n+\t\t z22 = svldnt1_x2 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_z28:\n+**\tldnt1b\t{z28\\.b(?: - |, )z29\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_z28, svmfloat8x2_t, mfloat8_t,\n+\t\t z28 = svldnt1_mf8_x2 (pn8, x0),\n+\t\t z28 = svldnt1_x2 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_pn0:\n+**\tmov\tp([89]|1[0-5])\\.b, p0\\.b\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_pn0, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn0, x0),\n+\t\t z0 = svldnt1_x2 (pn0, x0))\n+\n+/*\n+** ldnt1_mf8_pn7:\n+**\tmov\tp([89]|1[0-5])\\.b, p7\\.b\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_pn7, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn7, x0),\n+\t\t z0 = svldnt1_x2 (pn7, x0))\n+\n+/*\n+** ldnt1_mf8_pn15:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn15/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_pn15, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn15, x0),\n+\t\t z0 = svldnt1_x2 (pn15, x0))\n+\n+/*\n+** ldnt1_vnum_mf8_0:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_0, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, 0),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, 0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_1:\n+**\tincb\tx0\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, 1),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, 1))\n+\n+/*\n+** ldnt1_vnum_mf8_2:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, 2),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, 2))\n+\n+/*\n+** ldnt1_vnum_mf8_14:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #14, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_14, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, 14),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, 14))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_16:\n+**\tincb\tx0, all, mul #16\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, 16),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, 16))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_m1:\n+**\tdecb\tx0\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, -1),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, -1))\n+\n+/*\n+** ldnt1_vnum_mf8_m2:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, -2),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, -2))\n+\n+/*\n+** ldnt1_vnum_mf8_m16:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-16, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, -16),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, -16))\n+\n+/*\n+** ldnt1_vnum_mf8_m18:\n+**\taddvl\t(x[0-9]+), x0, #-18\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[\\1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m18, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, -18),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, -18))\n+\n+/*\n+** ldnt1_vnum_mf8_x1:\n+**\tcntb\t(x[0-9]+)\n+** (\n+**\tmadd\t(x[0-9]+), (?:x1, \\1|\\1, x1), x0\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[\\2\\]\n+** |\n+**\tmul\t(x[0-9]+), (?:x1, \\1|\\1, x1)\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, \\3\\]\n+** )\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_x1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, x1),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, x1))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x4.c\nnew file mode 100644\nindex 00000000000..0fad26f4616\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x4.c\n@@ -0,0 +1,354 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" { target { ! ilp32 } } } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** ldnt1_mf8_base:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_base, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0),\n+\t\t z0 = svldnt1_x4 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_index:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_index, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 + x1),\n+\t\t z0 = svldnt1_x4 (pn8, x0 + x1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_1:\n+**\tincb\tx0\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 + svcntb ()),\n+\t\t z0 = svldnt1_x4 (pn8, x0 + svcntb ()))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_2:\n+**\tincb\tx0, all, mul #2\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 + svcntb () * 2),\n+\t\t z0 = svldnt1_x4 (pn8, x0 + svcntb () * 2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_3:\n+**\tincb\tx0, all, mul #3\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 + svcntb () * 3),\n+\t\t z0 = svldnt1_x4 (pn8, x0 + svcntb () * 3))\n+\n+/*\n+** ldnt1_mf8_4:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #4, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 + svcntb () * 4),\n+\t\t z0 = svldnt1_x4 (pn8, x0 + svcntb () * 4))\n+\n+/*\n+** ldnt1_mf8_28:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #28, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_28, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 + svcntb () * 28),\n+\t\t z0 = svldnt1_x4 (pn8, x0 + svcntb () * 28))\n+\n+/*\n+** ldnt1_mf8_32:\n+**\t[^{]*\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 + svcntb () * 32),\n+\t\t z0 = svldnt1_x4 (pn8, x0 + svcntb () * 32))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_m1:\n+**\tdecb\tx0\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 - svcntb ()),\n+\t\t z0 = svldnt1_x4 (pn8, x0 - svcntb ()))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_m2:\n+**\tdecb\tx0, all, mul #2\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 - svcntb () * 2),\n+\t\t z0 = svldnt1_x4 (pn8, x0 - svcntb () * 2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_m3:\n+**\tdecb\tx0, all, mul #3\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 - svcntb () * 3),\n+\t\t z0 = svldnt1_x4 (pn8, x0 - svcntb () * 3))\n+\n+/*\n+** ldnt1_mf8_m4:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-4, mul vl\\]\n+**\tret\n+*/\n+ TEST_LOAD_COUNT (ldnt1_mf8_m4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 - svcntb () * 4),\n+\t\t z0 = svldnt1_x4 (pn8, x0 - svcntb () * 4))\n+\n+/*\n+** ldnt1_mf8_m32:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-32, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 - svcntb () * 32),\n+\t\t z0 = svldnt1_x4 (pn8, x0 - svcntb () * 32))\n+\n+/*\n+** ldnt1_mf8_m36:\n+**\t[^{]*\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m36, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 - svcntb () * 36),\n+\t\t z0 = svldnt1_x4 (pn8, x0 - svcntb () * 36))\n+\n+/*\n+** ldnt1_mf8_z17:\n+**\tldnt1b\t{z[^\\n]+}, pn8/z, \\[x0\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_z17, svmfloat8x4_t, mfloat8_t,\n+\t\t z17 = svldnt1_mf8_x4 (pn8, x0),\n+\t\t z17 = svldnt1_x4 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_z22:\n+**\tldnt1b\t{z[^\\n]+}, pn8/z, \\[x0\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_z22, svmfloat8x4_t, mfloat8_t,\n+\t\t z22 = svldnt1_mf8_x4 (pn8, x0),\n+\t\t z22 = svldnt1_x4 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_z28:\n+**\tldnt1b\t{z28\\.b(?: - |, )z31\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_z28, svmfloat8x4_t, mfloat8_t,\n+\t\t z28 = svldnt1_mf8_x4 (pn8, x0),\n+\t\t z28 = svldnt1_x4 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_pn0:\n+**\tmov\tp([89]|1[0-5])\\.b, p0\\.b\n+**\tldnt1b\t{z0\\.b(?: - |, )z3\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_pn0, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn0, x0),\n+\t\t z0 = svldnt1_x4 (pn0, x0))\n+\n+/*\n+** ldnt1_mf8_pn7:\n+**\tmov\tp([89]|1[0-5])\\.b, p7\\.b\n+**\tldnt1b\t{z0\\.b(?: - |, )z3\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_pn7, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn7, x0),\n+\t\t z0 = svldnt1_x4 (pn7, x0))\n+\n+/*\n+** ldnt1_mf8_pn15:\n+**\tldnt1b\t{z0\\.b(?: - |, )z3\\.b}, pn15/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_pn15, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn15, x0),\n+\t\t z0 = svldnt1_x4 (pn15, x0))\n+\n+/*\n+** ldnt1_vnum_mf8_0:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_0, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, 0),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, 0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_1:\n+**\tincb\tx0\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, 1),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, 1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_2:\n+**\tincb\tx0, all, mul #2\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, 2),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, 2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_3:\n+**\tincb\tx0, all, mul #3\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, 3),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, 3))\n+\n+/*\n+** ldnt1_vnum_mf8_4:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #4, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, 4),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, 4))\n+\n+/*\n+** ldnt1_vnum_mf8_28:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #28, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_28, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, 28),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, 28))\n+\n+/*\n+** ldnt1_vnum_mf8_32:\n+**\t[^{]*\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, 32),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, 32))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_m1:\n+**\tdecb\tx0\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, -1),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, -1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_m2:\n+**\tdecb\tx0, all, mul #2\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, -2),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, -2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_m3:\n+**\tdecb\tx0, all, mul #3\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, -3),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, -3))\n+\n+/*\n+** ldnt1_vnum_mf8_m4:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-4, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, -4),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, -4))\n+\n+/*\n+** ldnt1_vnum_mf8_m32:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-32, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, -32),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, -32))\n+\n+/*\n+** ldnt1_vnum_mf8_m36:\n+**\t[^{]*\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m36, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, -36),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, -36))\n+\n+/*\n+** ldnt1_vnum_mf8_x1:\n+**\tcntb\t(x[0-9]+)\n+** (\n+**\tmadd\t(x[0-9]+), (?:x1, \\1|\\1, x1), x0\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[\\2\\]\n+** |\n+**\tmul\t(x[0-9]+), (?:x1, \\1|\\1, x1)\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, \\3\\]\n+** )\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_x1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, x1),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, x1))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_hor_za8_vg2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_hor_za8_vg2.c\nindex ec31a68b46e..724ba852ef4 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_hor_za8_vg2.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_hor_za8_vg2.c\n@@ -22,6 +22,16 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_1, svuint8x2_t,\n \t\t z4 = svread_hor_za8_u8_vg2 (0, 1),\n \t\t z4 = svread_hor_za8_u8_vg2 (0, 1))\n \n+/*\n+** read_za8_mf8_z4_0_1:\n+**\tmov\t(w1[2-5]), #?1\n+**\tmova\t{z4\\.b - z5\\.b}, za0h\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_1, svmfloat8x2_t,\n+\t\t z4 = svread_hor_za8_mf8_vg2 (0, 1),\n+\t\t z4 = svread_hor_za8_mf8_vg2 (0, 1))\n+\n /*\n ** read_za8_s8_z28_0_w11:\n **\tmov\t(w1[2-5]), w11\n@@ -50,6 +60,15 @@ TEST_READ_ZA_XN (read_za8_u8_z18_0_w15, svuint8x2_t,\n \t\t z18 = svread_hor_za8_u8_vg2 (0, w15),\n \t\t z18 = svread_hor_za8_u8_vg2 (0, w15))\n \n+/*\n+** read_za8_mf8_z18_0_w15:\n+**\tmova\t{z18\\.b - z19\\.b}, za0h\\.b\\[w15, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z18_0_w15, svmfloat8x2_t,\n+\t\t z18 = svread_hor_za8_mf8_vg2 (0, w15),\n+\t\t z18 = svread_hor_za8_mf8_vg2 (0, w15))\n+\n /*\n ** read_za8_s8_z23_0_w12p14:\n **\tmova\t{[^\\n]+}, za0h\\.b\\[w12, 14:15\\]\n@@ -71,6 +90,16 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w12p1, svuint8x2_t,\n \t\t z4 = svread_hor_za8_u8_vg2 (0, w12 + 1),\n \t\t z4 = svread_hor_za8_u8_vg2 (0, w12 + 1))\n \n+/*\n+** read_za8_mf8_z4_0_w12p1:\n+**\tadd\t(w[0-9]+), w12, #?1\n+**\tmova\t{z4\\.b - z5\\.b}, za0h\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_w12p1, svmfloat8x2_t,\n+\t\t z4 = svread_hor_za8_mf8_vg2 (0, w12 + 1),\n+\t\t z4 = svread_hor_za8_mf8_vg2 (0, w12 + 1))\n+\n /*\n ** read_za8_s8_z28_0_w12p2:\n **\tmova\t{z28\\.b - z29\\.b}, za0h\\.b\\[w12, 2:3\\]\n@@ -90,6 +119,16 @@ TEST_READ_ZA_XN (read_za8_u8_z0_0_w15p3, svuint8x2_t,\n \t\t z0 = svread_hor_za8_u8_vg2 (0, w15 + 3),\n \t\t z0 = svread_hor_za8_u8_vg2 (0, w15 + 3))\n \n+/*\n+** read_za8_mf8_z0_0_w15p3:\n+**\tadd\t(w[0-9]+), w15, #?3\n+**\tmova\t{z0\\.b - z1\\.b}, za0h\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z0_0_w15p3, svmfloat8x2_t,\n+\t\t z0 = svread_hor_za8_mf8_vg2 (0, w15 + 3),\n+\t\t z0 = svread_hor_za8_mf8_vg2 (0, w15 + 3))\n+\n /*\n ** read_za8_u8_z4_0_w15p12:\n **\tmova\t{z4\\.b - z5\\.b}, za0h\\.b\\[w15, 12:13\\]\n@@ -99,6 +138,15 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w15p12, svuint8x2_t,\n \t\t z4 = svread_hor_za8_u8_vg2 (0, w15 + 12),\n \t\t z4 = svread_hor_za8_u8_vg2 (0, w15 + 12))\n \n+/*\n+** read_za8_mf8_z4_0_w15p12:\n+**\tmova\t{z4\\.b - z5\\.b}, za0h\\.b\\[w15, 12:13\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_w15p12, svmfloat8x2_t,\n+\t\t z4 = svread_hor_za8_mf8_vg2 (0, w15 + 12),\n+\t\t z4 = svread_hor_za8_mf8_vg2 (0, w15 + 12))\n+\n /*\n ** read_za8_u8_z28_0_w12p15:\n **\tadd\t(w[0-9]+), w12, #?15\n@@ -109,6 +157,16 @@ TEST_READ_ZA_XN (read_za8_u8_z28_0_w12p15, svuint8x2_t,\n \t\t z28 = svread_hor_za8_u8_vg2 (0, w12 + 15),\n \t\t z28 = svread_hor_za8_u8_vg2 (0, w12 + 15))\n \n+/*\n+** read_za8_mf8_z28_0_w12p15:\n+**\tadd\t(w[0-9]+), w12, #?15\n+**\tmova\t{z28\\.b - z29\\.b}, za0h\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z28_0_w12p15, svmfloat8x2_t,\n+\t\t z28 = svread_hor_za8_mf8_vg2 (0, w12 + 15),\n+\t\t z28 = svread_hor_za8_mf8_vg2 (0, w12 + 15))\n+\n /*\n ** read_za8_s8_z0_0_w15p16:\n **\tadd\t(w[0-9]+), w15, #?16\n@@ -129,6 +187,16 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w12m1, svuint8x2_t,\n \t\t z4 = svread_hor_za8_u8_vg2 (0, w12 - 1),\n \t\t z4 = svread_hor_za8_u8_vg2 (0, w12 - 1))\n \n+/*\n+** read_za8_mf8_z4_0_w12m1:\n+**\tsub\t(w[0-9]+), w12, #?1\n+**\tmova\t{z4\\.b - z5\\.b}, za0h\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_w12m1, svmfloat8x2_t,\n+\t\t z4 = svread_hor_za8_mf8_vg2 (0, w12 - 1),\n+\t\t z4 = svread_hor_za8_mf8_vg2 (0, w12 - 1))\n+\n /*\n ** read_za8_u8_z18_0_w16:\n **\tmov\t(w1[2-5]), w16\n@@ -138,3 +206,13 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w12m1, svuint8x2_t,\n TEST_READ_ZA_XN (read_za8_u8_z18_0_w16, svuint8x2_t,\n \t\t z18 = svread_hor_za8_u8_vg2 (0, w16),\n \t\t z18 = svread_hor_za8_u8_vg2 (0, w16))\n+\n+/*\n+** read_za8_mf8_z18_0_w16:\n+**\tmov\t(w1[2-5]), w16\n+**\tmova\t{z18\\.b - z19\\.b}, za0h\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z18_0_w16, svmfloat8x2_t,\n+\t\t z18 = svread_hor_za8_mf8_vg2 (0, w16),\n+\t\t z18 = svread_hor_za8_mf8_vg2 (0, w16))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_hor_za8_vg4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_hor_za8_vg4.c\nindex 261cbead442..2c3132dc6a8 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_hor_za8_vg4.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_hor_za8_vg4.c\n@@ -22,6 +22,16 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_1, svuint8x4_t,\n \t\t z4 = svread_hor_za8_u8_vg4 (0, 1),\n \t\t z4 = svread_hor_za8_u8_vg4 (0, 1))\n \n+/*\n+** read_za8_mf8_z4_0_1:\n+**\tmov\t(w1[2-5]), #?1\n+**\tmova\t{z4\\.b - z7\\.b}, za0h\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_1, svmfloat8x4_t,\n+\t\t z4 = svread_hor_za8_mf8_vg4 (0, 1),\n+\t\t z4 = svread_hor_za8_mf8_vg4 (0, 1))\n+\n /*\n ** read_za8_s8_z28_0_w11:\n **\tmov\t(w1[2-5]), w11\n@@ -54,6 +64,19 @@ TEST_READ_ZA_XN (read_za8_u8_z18_0_w15, svuint8x4_t,\n \t\t z18 = svread_hor_za8_u8_vg4 (0, w15),\n \t\t z18 = svread_hor_za8_u8_vg4 (0, w15))\n \n+/*\n+** read_za8_mf8_z18_0_w15:\n+**\tmova\t{[^\\n]+}, za0h\\.b\\[w15, 0:3\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z18_0_w15, svmfloat8x4_t,\n+\t\t z18 = svread_hor_za8_mf8_vg4 (0, w15),\n+\t\t z18 = svread_hor_za8_mf8_vg4 (0, w15))\n+\n /*\n ** read_za8_s8_z23_0_w12p12:\n **\tmova\t{[^\\n]+}, za0h\\.b\\[w12, 12:15\\]\n@@ -77,6 +100,16 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w12p1, svuint8x4_t,\n \t\t z4 = svread_hor_za8_u8_vg4 (0, w12 + 1),\n \t\t z4 = svread_hor_za8_u8_vg4 (0, w12 + 1))\n \n+/*\n+** read_za8_mf8_z4_0_w12p1:\n+**\tadd\t(w[0-9]+), w12, #?1\n+**\tmova\t{z4\\.b - z7\\.b}, za0h\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_w12p1, svmfloat8x4_t,\n+\t\t z4 = svread_hor_za8_mf8_vg4 (0, w12 + 1),\n+\t\t z4 = svread_hor_za8_mf8_vg4 (0, w12 + 1))\n+\n /*\n ** read_za8_s8_z28_0_w12p2:\n **\tadd\t(w[0-9]+), w12, #?2\n@@ -97,6 +130,16 @@ TEST_READ_ZA_XN (read_za8_u8_z0_0_w15p3, svuint8x4_t,\n \t\t z0 = svread_hor_za8_u8_vg4 (0, w15 + 3),\n \t\t z0 = svread_hor_za8_u8_vg4 (0, w15 + 3))\n \n+/*\n+** read_za8_mf8_z0_0_w15p3:\n+**\tadd\t(w[0-9]+), w15, #?3\n+**\tmova\t{z0\\.b - z3\\.b}, za0h\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z0_0_w15p3, svmfloat8x4_t,\n+\t\t z0 = svread_hor_za8_mf8_vg4 (0, w15 + 3),\n+\t\t z0 = svread_hor_za8_mf8_vg4 (0, w15 + 3))\n+\n /*\n ** read_za8_u8_z0_0_w12p4:\n **\tmova\t{z0\\.b - z3\\.b}, za0h\\.b\\[w12, 4:7\\]\n@@ -106,6 +149,15 @@ TEST_READ_ZA_XN (read_za8_u8_z0_0_w12p4, svuint8x4_t,\n \t\t z0 = svread_hor_za8_u8_vg4 (0, w12 + 4),\n \t\t z0 = svread_hor_za8_u8_vg4 (0, w12 + 4))\n \n+/*\n+** read_za8_mf8_z0_0_w12p4:\n+**\tmova\t{z0\\.b - z3\\.b}, za0h\\.b\\[w12, 4:7\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z0_0_w12p4, svmfloat8x4_t,\n+\t\t z0 = svread_hor_za8_mf8_vg4 (0, w12 + 4),\n+\t\t z0 = svread_hor_za8_mf8_vg4 (0, w12 + 4))\n+\n /*\n ** read_za8_u8_z4_0_w15p12:\n **\tmova\t{z4\\.b - z7\\.b}, za0h\\.b\\[w15, 12:15\\]\n@@ -115,6 +167,15 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w15p12, svuint8x4_t,\n \t\t z4 = svread_hor_za8_u8_vg4 (0, w15 + 12),\n \t\t z4 = svread_hor_za8_u8_vg4 (0, w15 + 12))\n \n+/*\n+** read_za8_mf8_z4_0_w15p12:\n+**\tmova\t{z4\\.b - z7\\.b}, za0h\\.b\\[w15, 12:15\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_w15p12, svmfloat8x4_t,\n+\t\t z4 = svread_hor_za8_mf8_vg4 (0, w15 + 12),\n+\t\t z4 = svread_hor_za8_mf8_vg4 (0, w15 + 12))\n+\n /*\n ** read_za8_u8_z28_0_w12p14:\n **\tadd\t(w[0-9]+), w12, #?14\n@@ -125,6 +186,16 @@ TEST_READ_ZA_XN (read_za8_u8_z28_0_w12p14, svuint8x4_t,\n \t\t z28 = svread_hor_za8_u8_vg4 (0, w12 + 14),\n \t\t z28 = svread_hor_za8_u8_vg4 (0, w12 + 14))\n \n+/*\n+** read_za8_mf8_z28_0_w12p14:\n+**\tadd\t(w[0-9]+), w12, #?14\n+**\tmova\t{z28\\.b - z31\\.b}, za0h\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z28_0_w12p14, svmfloat8x4_t,\n+\t\t z28 = svread_hor_za8_mf8_vg4 (0, w12 + 14),\n+\t\t z28 = svread_hor_za8_mf8_vg4 (0, w12 + 14))\n+\n /*\n ** read_za8_s8_z0_0_w15p16:\n **\tadd\t(w[0-9]+), w15, #?16\n@@ -145,6 +216,16 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w12m1, svuint8x4_t,\n \t\t z4 = svread_hor_za8_u8_vg4 (0, w12 - 1),\n \t\t z4 = svread_hor_za8_u8_vg4 (0, w12 - 1))\n \n+/*\n+** read_za8_mf8_z4_0_w12m1:\n+**\tsub\t(w[0-9]+), w12, #?1\n+**\tmova\t{z4\\.b - z7\\.b}, za0h\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_w12m1, svmfloat8x4_t,\n+\t\t z4 = svread_hor_za8_mf8_vg4 (0, w12 - 1),\n+\t\t z4 = svread_hor_za8_mf8_vg4 (0, w12 - 1))\n+\n /*\n ** read_za8_u8_z28_0_w16:\n **\tmov\t(w1[2-5]), w16\n@@ -154,3 +235,13 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w12m1, svuint8x4_t,\n TEST_READ_ZA_XN (read_za8_u8_z28_0_w16, svuint8x4_t,\n \t\t z28 = svread_hor_za8_u8_vg4 (0, w16),\n \t\t z28 = svread_hor_za8_u8_vg4 (0, w16))\n+\n+/*\n+** read_za8_u8_z28_0_w16:\n+**\tmov\t(w1[2-5]), w16\n+**\tmova\t{z28\\.b - z31\\.b}, za0h\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z28_0_w16, svmfloat8x4_t,\n+\t\t z28 = svread_hor_za8_mf8_vg4 (0, w16),\n+\t\t z28 = svread_hor_za8_mf8_vg4 (0, w16))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_ver_za8_vg2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_ver_za8_vg2.c\nindex 55970616ba8..5cd101a4988 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_ver_za8_vg2.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_ver_za8_vg2.c\n@@ -22,6 +22,16 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_1, svuint8x2_t,\n \t\t z4 = svread_ver_za8_u8_vg2 (0, 1),\n \t\t z4 = svread_ver_za8_u8_vg2 (0, 1))\n \n+/*\n+** read_za8_mf8_z4_0_1:\n+**\tmov\t(w1[2-5]), #?1\n+**\tmova\t{z4\\.b - z5\\.b}, za0v\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_1, svmfloat8x2_t,\n+\t\t z4 = svread_ver_za8_mf8_vg2 (0, 1),\n+\t\t z4 = svread_ver_za8_mf8_vg2 (0, 1))\n+\n /*\n ** read_za8_s8_z28_0_w11:\n **\tmov\t(w1[2-5]), w11\n@@ -50,6 +60,15 @@ TEST_READ_ZA_XN (read_za8_u8_z18_0_w15, svuint8x2_t,\n \t\t z18 = svread_ver_za8_u8_vg2 (0, w15),\n \t\t z18 = svread_ver_za8_u8_vg2 (0, w15))\n \n+/*\n+** read_za8_mf8_z18_0_w15:\n+**\tmova\t{z18\\.b - z19\\.b}, za0v\\.b\\[w15, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z18_0_w15, svmfloat8x2_t,\n+\t\t z18 = svread_ver_za8_mf8_vg2 (0, w15),\n+\t\t z18 = svread_ver_za8_mf8_vg2 (0, w15))\n+\n /*\n ** read_za8_s8_z23_0_w12p14:\n **\tmova\t{[^\\n]+}, za0v\\.b\\[w12, 14:15\\]\n@@ -71,6 +90,16 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w12p1, svuint8x2_t,\n \t\t z4 = svread_ver_za8_u8_vg2 (0, w12 + 1),\n \t\t z4 = svread_ver_za8_u8_vg2 (0, w12 + 1))\n \n+/*\n+** read_za8_mf8_z4_0_w12p1:\n+**\tadd\t(w[0-9]+), w12, #?1\n+**\tmova\t{z4\\.b - z5\\.b}, za0v\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_w12p1, svmfloat8x2_t,\n+\t\t z4 = svread_ver_za8_mf8_vg2 (0, w12 + 1),\n+\t\t z4 = svread_ver_za8_mf8_vg2 (0, w12 + 1))\n+\n /*\n ** read_za8_s8_z28_0_w12p2:\n **\tmova\t{z28\\.b - z29\\.b}, za0v\\.b\\[w12, 2:3\\]\n@@ -90,6 +119,16 @@ TEST_READ_ZA_XN (read_za8_u8_z0_0_w15p3, svuint8x2_t,\n \t\t z0 = svread_ver_za8_u8_vg2 (0, w15 + 3),\n \t\t z0 = svread_ver_za8_u8_vg2 (0, w15 + 3))\n \n+/*\n+** read_za8_mf8_z0_0_w15p3:\n+**\tadd\t(w[0-9]+), w15, #?3\n+**\tmova\t{z0\\.b - z1\\.b}, za0v\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z0_0_w15p3, svmfloat8x2_t,\n+\t\t z0 = svread_ver_za8_mf8_vg2 (0, w15 + 3),\n+\t\t z0 = svread_ver_za8_mf8_vg2 (0, w15 + 3))\n+\n /*\n ** read_za8_u8_z4_0_w15p12:\n **\tmova\t{z4\\.b - z5\\.b}, za0v\\.b\\[w15, 12:13\\]\n@@ -99,6 +138,15 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w15p12, svuint8x2_t,\n \t\t z4 = svread_ver_za8_u8_vg2 (0, w15 + 12),\n \t\t z4 = svread_ver_za8_u8_vg2 (0, w15 + 12))\n \n+/*\n+** read_za8_mf8_z4_0_w15p12:\n+**\tmova\t{z4\\.b - z5\\.b}, za0v\\.b\\[w15, 12:13\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_w15p12, svmfloat8x2_t,\n+\t\t z4 = svread_ver_za8_mf8_vg2 (0, w15 + 12),\n+\t\t z4 = svread_ver_za8_mf8_vg2 (0, w15 + 12))\n+\n /*\n ** read_za8_u8_z28_0_w12p15:\n **\tadd\t(w[0-9]+), w12, #?15\n@@ -109,6 +157,16 @@ TEST_READ_ZA_XN (read_za8_u8_z28_0_w12p15, svuint8x2_t,\n \t\t z28 = svread_ver_za8_u8_vg2 (0, w12 + 15),\n \t\t z28 = svread_ver_za8_u8_vg2 (0, w12 + 15))\n \n+/*\n+** read_za8_mf8_z28_0_w12p15:\n+**\tadd\t(w[0-9]+), w12, #?15\n+**\tmova\t{z28\\.b - z29\\.b}, za0v\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z28_0_w12p15, svmfloat8x2_t,\n+\t\t z28 = svread_ver_za8_mf8_vg2 (0, w12 + 15),\n+\t\t z28 = svread_ver_za8_mf8_vg2 (0, w12 + 15))\n+\n /*\n ** read_za8_s8_z0_0_w15p16:\n **\tadd\t(w[0-9]+), w15, #?16\n@@ -129,6 +187,16 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w12m1, svuint8x2_t,\n \t\t z4 = svread_ver_za8_u8_vg2 (0, w12 - 1),\n \t\t z4 = svread_ver_za8_u8_vg2 (0, w12 - 1))\n \n+/*\n+** read_za8_mf8_z4_0_w12m1:\n+**\tsub\t(w[0-9]+), w12, #?1\n+**\tmova\t{z4\\.b - z5\\.b}, za0v\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_w12m1, svmfloat8x2_t,\n+\t\t z4 = svread_ver_za8_mf8_vg2 (0, w12 - 1),\n+\t\t z4 = svread_ver_za8_mf8_vg2 (0, w12 - 1))\n+\n /*\n ** read_za8_u8_z18_0_w16:\n **\tmov\t(w1[2-5]), w16\n@@ -138,3 +206,13 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w12m1, svuint8x2_t,\n TEST_READ_ZA_XN (read_za8_u8_z18_0_w16, svuint8x2_t,\n \t\t z18 = svread_ver_za8_u8_vg2 (0, w16),\n \t\t z18 = svread_ver_za8_u8_vg2 (0, w16))\n+\n+/*\n+** read_za8_mf8_z18_0_w16:\n+**\tmov\t(w1[2-5]), w16\n+**\tmova\t{z18\\.b - z19\\.b}, za0v\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z18_0_w16, svmfloat8x2_t,\n+\t\t z18 = svread_ver_za8_mf8_vg2 (0, w16),\n+\t\t z18 = svread_ver_za8_mf8_vg2 (0, w16))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_ver_za8_vg4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_ver_za8_vg4.c\nindex 6fd8a976d4f..daae8bc7285 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_ver_za8_vg4.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_ver_za8_vg4.c\n@@ -22,6 +22,16 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_1, svuint8x4_t,\n \t\t z4 = svread_ver_za8_u8_vg4 (0, 1),\n \t\t z4 = svread_ver_za8_u8_vg4 (0, 1))\n \n+/*\n+** read_za8_mf8_z4_0_1:\n+**\tmov\t(w1[2-5]), #?1\n+**\tmova\t{z4\\.b - z7\\.b}, za0v\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_1, svmfloat8x4_t,\n+\t\t z4 = svread_ver_za8_mf8_vg4 (0, 1),\n+\t\t z4 = svread_ver_za8_mf8_vg4 (0, 1))\n+\n /*\n ** read_za8_s8_z28_0_w11:\n **\tmov\t(w1[2-5]), w11\n@@ -54,6 +64,19 @@ TEST_READ_ZA_XN (read_za8_u8_z18_0_w15, svuint8x4_t,\n \t\t z18 = svread_ver_za8_u8_vg4 (0, w15),\n \t\t z18 = svread_ver_za8_u8_vg4 (0, w15))\n \n+/*\n+** read_za8_mf8_z18_0_w15:\n+**\tmova\t{[^\\n]+}, za0v\\.b\\[w15, 0:3\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z18_0_w15, svmfloat8x4_t,\n+\t\t z18 = svread_ver_za8_mf8_vg4 (0, w15),\n+\t\t z18 = svread_ver_za8_mf8_vg4 (0, w15))\n+\n /*\n ** read_za8_s8_z23_0_w12p12:\n **\tmova\t{[^\\n]+}, za0v\\.b\\[w12, 12:15\\]\n@@ -77,6 +100,16 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w12p1, svuint8x4_t,\n \t\t z4 = svread_ver_za8_u8_vg4 (0, w12 + 1),\n \t\t z4 = svread_ver_za8_u8_vg4 (0, w12 + 1))\n \n+/*\n+** read_za8_mf8_z4_0_w12p1:\n+**\tadd\t(w[0-9]+), w12, #?1\n+**\tmova\t{z4\\.b - z7\\.b}, za0v\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_w12p1, svmfloat8x4_t,\n+\t\t z4 = svread_ver_za8_mf8_vg4 (0, w12 + 1),\n+\t\t z4 = svread_ver_za8_mf8_vg4 (0, w12 + 1))\n+\n /*\n ** read_za8_s8_z28_0_w12p2:\n **\tadd\t(w[0-9]+), w12, #?2\n@@ -97,6 +130,16 @@ TEST_READ_ZA_XN (read_za8_u8_z0_0_w15p3, svuint8x4_t,\n \t\t z0 = svread_ver_za8_u8_vg4 (0, w15 + 3),\n \t\t z0 = svread_ver_za8_u8_vg4 (0, w15 + 3))\n \n+/*\n+** read_za8_mf8_z0_0_w15p3:\n+**\tadd\t(w[0-9]+), w15, #?3\n+**\tmova\t{z0\\.b - z3\\.b}, za0v\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z0_0_w15p3, svmfloat8x4_t,\n+\t\t z0 = svread_ver_za8_mf8_vg4 (0, w15 + 3),\n+\t\t z0 = svread_ver_za8_mf8_vg4 (0, w15 + 3))\n+\n /*\n ** read_za8_u8_z0_0_w12p4:\n **\tmova\t{z0\\.b - z3\\.b}, za0v\\.b\\[w12, 4:7\\]\n@@ -106,6 +149,15 @@ TEST_READ_ZA_XN (read_za8_u8_z0_0_w12p4, svuint8x4_t,\n \t\t z0 = svread_ver_za8_u8_vg4 (0, w12 + 4),\n \t\t z0 = svread_ver_za8_u8_vg4 (0, w12 + 4))\n \n+/*\n+** read_za8_mf8_z0_0_w12p4:\n+**\tmova\t{z0\\.b - z3\\.b}, za0v\\.b\\[w12, 4:7\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z0_0_w12p4, svmfloat8x4_t,\n+\t\t z0 = svread_ver_za8_mf8_vg4 (0, w12 + 4),\n+\t\t z0 = svread_ver_za8_mf8_vg4 (0, w12 + 4))\n+\n /*\n ** read_za8_u8_z4_0_w15p12:\n **\tmova\t{z4\\.b - z7\\.b}, za0v\\.b\\[w15, 12:15\\]\n@@ -115,6 +167,15 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w15p12, svuint8x4_t,\n \t\t z4 = svread_ver_za8_u8_vg4 (0, w15 + 12),\n \t\t z4 = svread_ver_za8_u8_vg4 (0, w15 + 12))\n \n+/*\n+** read_za8_mf8_z4_0_w15p12:\n+**\tmova\t{z4\\.b - z7\\.b}, za0v\\.b\\[w15, 12:15\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_w15p12, svmfloat8x4_t,\n+\t\t z4 = svread_ver_za8_mf8_vg4 (0, w15 + 12),\n+\t\t z4 = svread_ver_za8_mf8_vg4 (0, w15 + 12))\n+\n /*\n ** read_za8_u8_z28_0_w12p14:\n **\tadd\t(w[0-9]+), w12, #?14\n@@ -125,6 +186,16 @@ TEST_READ_ZA_XN (read_za8_u8_z28_0_w12p14, svuint8x4_t,\n \t\t z28 = svread_ver_za8_u8_vg4 (0, w12 + 14),\n \t\t z28 = svread_ver_za8_u8_vg4 (0, w12 + 14))\n \n+/*\n+** read_za8_mf8_z28_0_w12p14:\n+**\tadd\t(w[0-9]+), w12, #?14\n+**\tmova\t{z28\\.b - z31\\.b}, za0v\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z28_0_w12p14, svmfloat8x4_t,\n+\t\t z28 = svread_ver_za8_mf8_vg4 (0, w12 + 14),\n+\t\t z28 = svread_ver_za8_mf8_vg4 (0, w12 + 14))\n+\n /*\n ** read_za8_s8_z0_0_w15p16:\n **\tadd\t(w[0-9]+), w15, #?16\n@@ -145,6 +216,16 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w12m1, svuint8x4_t,\n \t\t z4 = svread_ver_za8_u8_vg4 (0, w12 - 1),\n \t\t z4 = svread_ver_za8_u8_vg4 (0, w12 - 1))\n \n+/*\n+** read_za8_mf8_z4_0_w12m1:\n+**\tsub\t(w[0-9]+), w12, #?1\n+**\tmova\t{z4\\.b - z7\\.b}, za0v\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z4_0_w12m1, svmfloat8x4_t,\n+\t\t z4 = svread_ver_za8_mf8_vg4 (0, w12 - 1),\n+\t\t z4 = svread_ver_za8_mf8_vg4 (0, w12 - 1))\n+\n /*\n ** read_za8_u8_z28_0_w16:\n **\tmov\t(w1[2-5]), w16\n@@ -154,3 +235,13 @@ TEST_READ_ZA_XN (read_za8_u8_z4_0_w12m1, svuint8x4_t,\n TEST_READ_ZA_XN (read_za8_u8_z28_0_w16, svuint8x4_t,\n \t\t z28 = svread_ver_za8_u8_vg4 (0, w16),\n \t\t z28 = svread_ver_za8_u8_vg4 (0, w16))\n+\n+/*\n+** read_za8_mf8_z28_0_w16:\n+**\tmov\t(w1[2-5]), w16\n+**\tmova\t{z28\\.b - z31\\.b}, za0v\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_za8_mf8_z28_0_w16, svmfloat8x4_t,\n+\t\t z28 = svread_ver_za8_mf8_vg4 (0, w16),\n+\t\t z28 = svread_ver_za8_mf8_vg4 (0, w16))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_za8_vg1x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_za8_vg1x2.c\nindex 9b151abf4fa..819bf786a4f 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_za8_vg1x2.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_za8_vg1x2.c\n@@ -32,6 +32,16 @@ TEST_READ_ZA_XN (read_w7_z0, svuint8x2_t,\n \t\t z0 = svread_za8_u8_vg1x2 (w7),\n \t\t z0 = svread_za8_u8_vg1x2 (w7))\n \n+/*\n+** read_mf8_w7_z0:\n+**\tmov\t(w8|w9|w10|w11), w7\n+**\tmova\t{z0\\.d - z1\\.d}, za\\.d\\[\\1, 0, vgx2\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_mf8_w7_z0, svmfloat8x2_t,\n+\t\t z0 = svread_za8_mf8_vg1x2 (w7),\n+\t\t z0 = svread_za8_mf8_vg1x2 (w7))\n+\n /*\n ** read_w8_z0:\n **\tmova\t{z0\\.d - z1\\.d}, za\\.d\\[w8, 0, vgx2\\]\n@@ -61,6 +71,16 @@ TEST_READ_ZA_XN (read_w12_z0, svuint8x2_t,\n \t\t z0 = svread_za8_u8_vg1x2 (w12),\n \t\t z0 = svread_za8_u8_vg1x2 (w12))\n \n+/*\n+** read_mf8_w12_z0:\n+**\tmov\t(w8|w9|w10|w11), w12\n+**\tmova\t{z0\\.d - z1\\.d}, za\\.d\\[\\1, 0, vgx2\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_mf8_w12_z0, svmfloat8x2_t,\n+\t\t z0 = svread_za8_mf8_vg1x2 (w12),\n+\t\t z0 = svread_za8_mf8_vg1x2 (w12))\n+\n /*\n ** read_w8p7_z0:\n **\tmova\t{z0\\.d - z1\\.d}, za\\.d\\[w8, 7, vgx2\\]\n@@ -90,6 +110,16 @@ TEST_READ_ZA_XN (read_w8m1_z0, svuint8x2_t,\n \t\t z0 = svread_za8_u8_vg1x2 (w8 - 1),\n \t\t z0 = svread_za8_u8_vg1x2 (w8 - 1))\n \n+/*\n+** read_mf8_w8m1_z0:\n+**\tsub\t(w8|w9|w10|w11), w8, #?1\n+**\tmova\t{z0\\.d - z1\\.d}, za\\.d\\[\\1, 0, vgx2\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_mf8_w8m1_z0, svmfloat8x2_t,\n+\t\t z0 = svread_za8_mf8_vg1x2 (w8 - 1),\n+\t\t z0 = svread_za8_mf8_vg1x2 (w8 - 1))\n+\n /*\n ** read_w8_z18:\n **\tmova\t{z18\\.d - z19\\.d}, za\\.d\\[w8, 0, vgx2\\]\n@@ -99,6 +129,15 @@ TEST_READ_ZA_XN (read_w8_z18, svuint8x2_t,\n \t\t z18 = svread_za8_u8_vg1x2 (w8),\n \t\t z18 = svread_za8_u8_vg1x2 (w8))\n \n+/*\n+** read_mf8_w8_z18:\n+**\tmova\t{z18\\.d - z19\\.d}, za\\.d\\[w8, 0, vgx2\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_mf8_w8_z18, svmfloat8x2_t,\n+\t\t z18 = svread_za8_mf8_vg1x2 (w8),\n+\t\t z18 = svread_za8_mf8_vg1x2 (w8))\n+\n /* Leave the assembler to check for correctness for misaligned registers. */\n \n /*\n@@ -120,3 +159,12 @@ TEST_READ_ZA_XN (read_w8_z23, svint8x2_t,\n TEST_READ_ZA_XN (read_w8_z28, svuint8x2_t,\n \t\t z28 = svread_za8_u8_vg1x2 (w8),\n \t\t z28 = svread_za8_u8_vg1x2 (w8))\n+\n+/*\n+** read_mf8_w8_z28:\n+**\tmova\t{z28\\.d - z29\\.d}, za\\.d\\[w8, 0, vgx2\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_mf8_w8_z28, svmfloat8x2_t,\n+\t\t z28 = svread_za8_mf8_vg1x2 (w8),\n+\t\t z28 = svread_za8_mf8_vg1x2 (w8))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_za8_vg1x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_za8_vg1x4.c\nindex 80c81dde097..f8c6d2a3d43 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_za8_vg1x4.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/read_za8_vg1x4.c\n@@ -22,6 +22,16 @@ TEST_READ_ZA_XN (read_w0_z0, svuint8x4_t,\n \t\t z0 = svread_za8_u8_vg1x4 (w0),\n \t\t z0 = svread_za8_u8_vg1x4 (w0))\n \n+/*\n+** read_mf8_w0_z0:\n+**\tmov\t(w8|w9|w10|w11), w0\n+**\tmova\t{z0\\.d - z3\\.d}, za\\.d\\[\\1, 0, vgx4\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_mf8_w0_z0, svmfloat8x4_t,\n+\t\t z0 = svread_za8_mf8_vg1x4 (w0),\n+\t\t z0 = svread_za8_mf8_vg1x4 (w0))\n+\n /*\n ** read_w7_z0:\n **\tmov\t(w8|w9|w10|w11), w7\n@@ -50,6 +60,14 @@ TEST_READ_ZA_XN (read_w11_z0, svuint8x4_t,\n \t\t z0 = svread_za8_u8_vg1x4 (w11),\n \t\t z0 = svread_za8_u8_vg1x4 (w11))\n \n+/*\n+** read_mf8_w11_z0:\n+**\tmova\t{z0\\.d - z3\\.d}, za\\.d\\[w11, 0, vgx4\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_mf8_w11_z0, svmfloat8x4_t,\n+\t\t z0 = svread_za8_mf8_vg1x4 (w11),\n+\t\t z0 = svread_za8_mf8_vg1x4 (w11))\n \n /*\n ** read_w12_z0:\n@@ -80,6 +98,16 @@ TEST_READ_ZA_XN (read_w8p8_z0, svuint8x4_t,\n \t\t z0 = svread_za8_u8_vg1x4 (w8 + 8),\n \t\t z0 = svread_za8_u8_vg1x4 (w8 + 8))\n \n+/*\n+** read_mf8_w8p8_z0:\n+**\tadd\t(w8|w9|w10|w11), w8, #?8\n+**\tmova\t{z0\\.d - z3\\.d}, za\\.d\\[\\1, 0, vgx4\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_mf8_w8p8_z0, svmfloat8x4_t,\n+\t\t z0 = svread_za8_mf8_vg1x4 (w8 + 8),\n+\t\t z0 = svread_za8_mf8_vg1x4 (w8 + 8))\n+\n /*\n ** read_w8m1_z0:\n **\tsub\t(w8|w9|w10|w11), w8, #?1\n@@ -114,6 +142,19 @@ TEST_READ_ZA_XN (read_w8_z18, svuint8x4_t,\n \t\t z18 = svread_za8_u8_vg1x4 (w8),\n \t\t z18 = svread_za8_u8_vg1x4 (w8))\n \n+/*\n+** read_mf8_w8_z18:\n+**\tmova\t[^\\n]+, za\\.d\\[w8, 0, vgx4\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_mf8_w8_z18, svmfloat8x4_t,\n+\t\t z18 = svread_za8_mf8_vg1x4 (w8),\n+\t\t z18 = svread_za8_mf8_vg1x4 (w8))\n+\n /*\n ** read_w8_z23:\n **\tmova\t[^\\n]+, za\\.d\\[w8, 0, vgx4\\]\n@@ -127,6 +168,19 @@ TEST_READ_ZA_XN (read_w8_z23, svuint8x4_t,\n \t\t z23 = svread_za8_u8_vg1x4 (w8),\n \t\t z23 = svread_za8_u8_vg1x4 (w8))\n \n+/*\n+** read_mf8_w8_z23:\n+**\tmova\t[^\\n]+, za\\.d\\[w8, 0, vgx4\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_READ_ZA_XN (read_mf8_w8_z23, svmfloat8x4_t,\n+\t\t z23 = svread_za8_mf8_vg1x4 (w8),\n+\t\t z23 = svread_za8_mf8_vg1x4 (w8))\n+\n /*\n ** read_w8_z28:\n **\tmova\t{z28\\.d - z31\\.d}, za\\.d\\[w8, 0, vgx4\\]\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za128.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za128.c\nindex 8b6644f1d6e..aa29879331e 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za128.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za128.c\n@@ -86,6 +86,16 @@ TEST_READ_ZA (readz_za128_u8_0_w0, svuint8_t,\n \t z0 = svreadz_hor_za128_u8 (0, w0),\n \t z0 = svreadz_hor_za128_u8 (0, w0))\n \n+/*\n+** readz_za128_mf8_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za0h\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_mf8_0_w0, svmfloat8_t,\n+\t z0 = svreadz_hor_za128_mf8 (0, w0),\n+\t z0 = svreadz_hor_za128_mf8 (0, w0))\n+\n /*\n ** readz_za128_s16_0_w0:\n **\tmov\t(w1[2-5]), w0\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za8.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za8.c\nindex 6fea16459e2..f6f595f5697 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za8.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za8.c\n@@ -85,3 +85,13 @@ TEST_READ_ZA (readz_za8_s8_0_w0m1, svint8_t,\n TEST_READ_ZA (readz_za8_u8_0_w0, svuint8_t,\n \t z0 = svreadz_hor_za8_u8 (0, w0),\n \t z0 = svreadz_hor_za8_u8 (0, w0))\n+\n+/*\n+** readz_za8_mf8_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.b, za0h\\.b\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za8_mf8_0_w0, svmfloat8_t,\n+\t z0 = svreadz_hor_za8_mf8 (0, w0),\n+\t z0 = svreadz_hor_za8_mf8 (0, w0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za8_vg2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za8_vg2.c\nindex a1a63104ad4..d09687e3674 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za8_vg2.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za8_vg2.c\n@@ -26,6 +26,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_1, svuint8x2_t,\n \t\t z4 = svreadz_hor_za8_u8_vg2 (0, 1),\n \t\t z4 = svreadz_hor_za8_u8_vg2 (0, 1))\n \n+/*\n+** readz_za8_mf8_z4_0_1:\n+**\tmov\t(w1[2-5]), #?1\n+**\tmovaz\t{z4\\.b - z5\\.b}, za0h\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_1, svmfloat8x2_t,\n+\t\t z4 = svreadz_hor_za8_mf8_vg2 (0, 1),\n+\t\t z4 = svreadz_hor_za8_mf8_vg2 (0, 1))\n+\n /*\n ** readz_za8_s8_z28_0_w11:\n **\tmov\t(w1[2-5]), w11\n@@ -54,6 +64,15 @@ TEST_READ_ZA_XN (readz_za8_u8_z18_0_w15, svuint8x2_t,\n \t\t z18 = svreadz_hor_za8_u8_vg2 (0, w15),\n \t\t z18 = svreadz_hor_za8_u8_vg2 (0, w15))\n \n+/*\n+** readz_za8_mf8_z18_0_w15:\n+**\tmovaz\t{z18\\.b - z19\\.b}, za0h\\.b\\[w15, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z18_0_w15, svmfloat8x2_t,\n+\t\t z18 = svreadz_hor_za8_mf8_vg2 (0, w15),\n+\t\t z18 = svreadz_hor_za8_mf8_vg2 (0, w15))\n+\n /*\n ** readz_za8_s8_z23_0_w12p14:\n **\tmovaz\t{[^\\n]+}, za0h\\.b\\[w12, 14:15\\]\n@@ -75,6 +94,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w12p1, svuint8x2_t,\n \t\t z4 = svreadz_hor_za8_u8_vg2 (0, w12 + 1),\n \t\t z4 = svreadz_hor_za8_u8_vg2 (0, w12 + 1))\n \n+/*\n+** readz_za8_mf8_z4_0_w12p1:\n+**\tadd\t(w[0-9]+), w12, #?1\n+**\tmovaz\t{z4\\.b - z5\\.b}, za0h\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_w12p1, svmfloat8x2_t,\n+\t\t z4 = svreadz_hor_za8_mf8_vg2 (0, w12 + 1),\n+\t\t z4 = svreadz_hor_za8_mf8_vg2 (0, w12 + 1))\n+\n /*\n ** readz_za8_s8_z28_0_w12p2:\n **\tmovaz\t{z28\\.b - z29\\.b}, za0h\\.b\\[w12, 2:3\\]\n@@ -94,6 +123,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z0_0_w15p3, svuint8x2_t,\n \t\t z0 = svreadz_hor_za8_u8_vg2 (0, w15 + 3),\n \t\t z0 = svreadz_hor_za8_u8_vg2 (0, w15 + 3))\n \n+/*\n+** readz_za8_mf8_z0_0_w15p3:\n+**\tadd\t(w[0-9]+), w15, #?3\n+**\tmovaz\t{z0\\.b - z1\\.b}, za0h\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z0_0_w15p3, svmfloat8x2_t,\n+\t\t z0 = svreadz_hor_za8_mf8_vg2 (0, w15 + 3),\n+\t\t z0 = svreadz_hor_za8_mf8_vg2 (0, w15 + 3))\n+\n /*\n ** readz_za8_u8_z4_0_w15p12:\n **\tmovaz\t{z4\\.b - z5\\.b}, za0h\\.b\\[w15, 12:13\\]\n@@ -103,6 +142,15 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w15p12, svuint8x2_t,\n \t\t z4 = svreadz_hor_za8_u8_vg2 (0, w15 + 12),\n \t\t z4 = svreadz_hor_za8_u8_vg2 (0, w15 + 12))\n \n+/*\n+** readz_za8_mf8_z4_0_w15p12:\n+**\tmovaz\t{z4\\.b - z5\\.b}, za0h\\.b\\[w15, 12:13\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_w15p12, svmfloat8x2_t,\n+\t\t z4 = svreadz_hor_za8_mf8_vg2 (0, w15 + 12),\n+\t\t z4 = svreadz_hor_za8_mf8_vg2 (0, w15 + 12))\n+\n /*\n ** readz_za8_u8_z28_0_w12p15:\n **\tadd\t(w[0-9]+), w12, #?15\n@@ -113,6 +161,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z28_0_w12p15, svuint8x2_t,\n \t\t z28 = svreadz_hor_za8_u8_vg2 (0, w12 + 15),\n \t\t z28 = svreadz_hor_za8_u8_vg2 (0, w12 + 15))\n \n+/*\n+** readz_za8_mf8_z28_0_w12p15:\n+**\tadd\t(w[0-9]+), w12, #?15\n+**\tmovaz\t{z28\\.b - z29\\.b}, za0h\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z28_0_w12p15, svmfloat8x2_t,\n+\t\t z28 = svreadz_hor_za8_mf8_vg2 (0, w12 + 15),\n+\t\t z28 = svreadz_hor_za8_mf8_vg2 (0, w12 + 15))\n+\n /*\n ** readz_za8_s8_z0_0_w15p16:\n **\tadd\t(w[0-9]+), w15, #?16\n@@ -133,6 +191,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w12m1, svuint8x2_t,\n \t\t z4 = svreadz_hor_za8_u8_vg2 (0, w12 - 1),\n \t\t z4 = svreadz_hor_za8_u8_vg2 (0, w12 - 1))\n \n+/*\n+** readz_za8_mf8_z4_0_w12m1:\n+**\tsub\t(w[0-9]+), w12, #?1\n+**\tmovaz\t{z4\\.b - z5\\.b}, za0h\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_w12m1, svmfloat8x2_t,\n+\t\t z4 = svreadz_hor_za8_mf8_vg2 (0, w12 - 1),\n+\t\t z4 = svreadz_hor_za8_mf8_vg2 (0, w12 - 1))\n+\n /*\n ** readz_za8_u8_z18_0_w16:\n **\tmov\t(w1[2-5]), w16\n@@ -142,3 +210,13 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w12m1, svuint8x2_t,\n TEST_READ_ZA_XN (readz_za8_u8_z18_0_w16, svuint8x2_t,\n \t\t z18 = svreadz_hor_za8_u8_vg2 (0, w16),\n \t\t z18 = svreadz_hor_za8_u8_vg2 (0, w16))\n+\n+/*\n+** readz_za8_mf8_z18_0_w16:\n+**\tmov\t(w1[2-5]), w16\n+**\tmovaz\t{z18\\.b - z19\\.b}, za0h\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z18_0_w16, svmfloat8x2_t,\n+\t\t z18 = svreadz_hor_za8_mf8_vg2 (0, w16),\n+\t\t z18 = svreadz_hor_za8_mf8_vg2 (0, w16))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za8_vg4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za8_vg4.c\nindex ca71bc513e3..eec47bf3152 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za8_vg4.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_hor_za8_vg4.c\n@@ -26,6 +26,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_1, svuint8x4_t,\n \t\t z4 = svreadz_hor_za8_u8_vg4 (0, 1),\n \t\t z4 = svreadz_hor_za8_u8_vg4 (0, 1))\n \n+/*\n+** readz_za8_mf8_z4_0_1:\n+**\tmov\t(w1[2-5]), #?1\n+**\tmovaz\t{z4\\.b - z7\\.b}, za0h\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_1, svmfloat8x4_t,\n+\t\t z4 = svreadz_hor_za8_mf8_vg4 (0, 1),\n+\t\t z4 = svreadz_hor_za8_mf8_vg4 (0, 1))\n+\n /*\n ** readz_za8_s8_z28_0_w11:\n **\tmov\t(w1[2-5]), w11\n@@ -58,6 +68,19 @@ TEST_READ_ZA_XN (readz_za8_u8_z18_0_w15, svuint8x4_t,\n \t\t z18 = svreadz_hor_za8_u8_vg4 (0, w15),\n \t\t z18 = svreadz_hor_za8_u8_vg4 (0, w15))\n \n+/*\n+** readz_za8_mf8_z18_0_w15:\n+**\tmovaz\t{[^\\n]+}, za0h\\.b\\[w15, 0:3\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z18_0_w15, svmfloat8x4_t,\n+\t\t z18 = svreadz_hor_za8_mf8_vg4 (0, w15),\n+\t\t z18 = svreadz_hor_za8_mf8_vg4 (0, w15))\n+\n /*\n ** readz_za8_s8_z23_0_w12p12:\n **\tmovaz\t{[^\\n]+}, za0h\\.b\\[w12, 12:15\\]\n@@ -81,6 +104,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w12p1, svuint8x4_t,\n \t\t z4 = svreadz_hor_za8_u8_vg4 (0, w12 + 1),\n \t\t z4 = svreadz_hor_za8_u8_vg4 (0, w12 + 1))\n \n+/*\n+** readz_za8_mf8_z4_0_w12p1:\n+**\tadd\t(w[0-9]+), w12, #?1\n+**\tmovaz\t{z4\\.b - z7\\.b}, za0h\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_w12p1, svmfloat8x4_t,\n+\t\t z4 = svreadz_hor_za8_mf8_vg4 (0, w12 + 1),\n+\t\t z4 = svreadz_hor_za8_mf8_vg4 (0, w12 + 1))\n+\n /*\n ** readz_za8_s8_z28_0_w12p2:\n **\tadd\t(w[0-9]+), w12, #?2\n@@ -101,6 +134,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z0_0_w15p3, svuint8x4_t,\n \t\t z0 = svreadz_hor_za8_u8_vg4 (0, w15 + 3),\n \t\t z0 = svreadz_hor_za8_u8_vg4 (0, w15 + 3))\n \n+/*\n+** readz_za8_mf8_z0_0_w15p3:\n+**\tadd\t(w[0-9]+), w15, #?3\n+**\tmovaz\t{z0\\.b - z3\\.b}, za0h\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z0_0_w15p3, svmfloat8x4_t,\n+\t\t z0 = svreadz_hor_za8_mf8_vg4 (0, w15 + 3),\n+\t\t z0 = svreadz_hor_za8_mf8_vg4 (0, w15 + 3))\n+\n /*\n ** readz_za8_u8_z0_0_w12p4:\n **\tmovaz\t{z0\\.b - z3\\.b}, za0h\\.b\\[w12, 4:7\\]\n@@ -110,6 +153,15 @@ TEST_READ_ZA_XN (readz_za8_u8_z0_0_w12p4, svuint8x4_t,\n \t\t z0 = svreadz_hor_za8_u8_vg4 (0, w12 + 4),\n \t\t z0 = svreadz_hor_za8_u8_vg4 (0, w12 + 4))\n \n+/*\n+** readz_za8_mf8_z0_0_w12p4:\n+**\tmovaz\t{z0\\.b - z3\\.b}, za0h\\.b\\[w12, 4:7\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z0_0_w12p4, svmfloat8x4_t,\n+\t\t z0 = svreadz_hor_za8_mf8_vg4 (0, w12 + 4),\n+\t\t z0 = svreadz_hor_za8_mf8_vg4 (0, w12 + 4))\n+\n /*\n ** readz_za8_u8_z4_0_w15p12:\n **\tmovaz\t{z4\\.b - z7\\.b}, za0h\\.b\\[w15, 12:15\\]\n@@ -119,6 +171,15 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w15p12, svuint8x4_t,\n \t\t z4 = svreadz_hor_za8_u8_vg4 (0, w15 + 12),\n \t\t z4 = svreadz_hor_za8_u8_vg4 (0, w15 + 12))\n \n+/*\n+** readz_za8_mf8_z4_0_w15p12:\n+**\tmovaz\t{z4\\.b - z7\\.b}, za0h\\.b\\[w15, 12:15\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_w15p12, svmfloat8x4_t,\n+\t\t z4 = svreadz_hor_za8_mf8_vg4 (0, w15 + 12),\n+\t\t z4 = svreadz_hor_za8_mf8_vg4 (0, w15 + 12))\n+\n /*\n ** readz_za8_u8_z28_0_w12p14:\n **\tadd\t(w[0-9]+), w12, #?14\n@@ -129,6 +190,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z28_0_w12p14, svuint8x4_t,\n \t\t z28 = svreadz_hor_za8_u8_vg4 (0, w12 + 14),\n \t\t z28 = svreadz_hor_za8_u8_vg4 (0, w12 + 14))\n \n+/*\n+** readz_za8_mf8_z28_0_w12p14:\n+**\tadd\t(w[0-9]+), w12, #?14\n+**\tmovaz\t{z28\\.b - z31\\.b}, za0h\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z28_0_w12p14, svmfloat8x4_t,\n+\t\t z28 = svreadz_hor_za8_mf8_vg4 (0, w12 + 14),\n+\t\t z28 = svreadz_hor_za8_mf8_vg4 (0, w12 + 14))\n+\n /*\n ** readz_za8_s8_z0_0_w15p16:\n **\tadd\t(w[0-9]+), w15, #?16\n@@ -149,6 +220,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w12m1, svuint8x4_t,\n \t\t z4 = svreadz_hor_za8_u8_vg4 (0, w12 - 1),\n \t\t z4 = svreadz_hor_za8_u8_vg4 (0, w12 - 1))\n \n+/*\n+** readz_za8_mf8_z4_0_w12m1:\n+**\tsub\t(w[0-9]+), w12, #?1\n+**\tmovaz\t{z4\\.b - z7\\.b}, za0h\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_w12m1, svmfloat8x4_t,\n+\t\t z4 = svreadz_hor_za8_mf8_vg4 (0, w12 - 1),\n+\t\t z4 = svreadz_hor_za8_mf8_vg4 (0, w12 - 1))\n+\n /*\n ** readz_za8_u8_z28_0_w16:\n **\tmov\t(w1[2-5]), w16\n@@ -158,3 +239,13 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w12m1, svuint8x4_t,\n TEST_READ_ZA_XN (readz_za8_u8_z28_0_w16, svuint8x4_t,\n \t\t z28 = svreadz_hor_za8_u8_vg4 (0, w16),\n \t\t z28 = svreadz_hor_za8_u8_vg4 (0, w16))\n+\n+/*\n+** readz_za8_mf8_z28_0_w16:\n+**\tmov\t(w1[2-5]), w16\n+**\tmovaz\t{z28\\.b - z31\\.b}, za0h\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z28_0_w16, svmfloat8x4_t,\n+\t\t z28 = svreadz_hor_za8_mf8_vg4 (0, w16),\n+\t\t z28 = svreadz_hor_za8_mf8_vg4 (0, w16))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za128.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za128.c\nnew file mode 100644\nindex 00000000000..401543cbbcd\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za128.c\n@@ -0,0 +1,197 @@\n+/* { dg-do assemble { target aarch64_asm_sme2p1_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_sme2p1_ok } } } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+#pragma GCC target \"+sme2p1\"\n+\n+/*\n+** readz_za128_s8_0_0:\n+**\tmov\t(w1[2-5]), (?:wzr|#?0)\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_s8_0_0, svint8_t,\n+\t z0 = svreadz_ver_za128_s8 (0, 0),\n+\t z0 = svreadz_ver_za128_s8 (0, 0))\n+\n+/*\n+** readz_za128_s8_0_1:\n+**\tmov\t(w1[2-5]), #?1\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_s8_0_1, svint8_t,\n+\t z0 = svreadz_ver_za128_s8 (0, 1),\n+\t z0 = svreadz_ver_za128_s8 (0, 1))\n+\n+/*\n+** readz_za128_s8_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_s8_0_w0, svint8_t,\n+\t z0 = svreadz_ver_za128_s8 (0, w0),\n+\t z0 = svreadz_ver_za128_s8 (0, w0))\n+\n+/*\n+** readz_za128_s8_0_w0p1:\n+**\tadd\t(w1[2-5]), w0, #?1\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_s8_0_w0p1, svint8_t,\n+\t z0 = svreadz_ver_za128_s8 (0, w0 + 1),\n+\t z0 = svreadz_ver_za128_s8 (0, w0 + 1))\n+\n+/*\n+** readz_za128_s8_0_w0m1:\n+**\tsub\t(w1[2-5]), w0, #?1\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_s8_0_w0m1, svint8_t,\n+\t z0 = svreadz_ver_za128_s8 (0, w0 - 1),\n+\t z0 = svreadz_ver_za128_s8 (0, w0 - 1))\n+\n+/*\n+** readz_za128_s8_1_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za1v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_s8_1_w0, svint8_t,\n+\t z0 = svreadz_ver_za128_s8 (1, w0),\n+\t z0 = svreadz_ver_za128_s8 (1, w0))\n+\n+/*\n+** readz_za128_s8_15_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za15v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_s8_15_w0, svint8_t,\n+\t z0 = svreadz_ver_za128_s8 (15, w0),\n+\t z0 = svreadz_ver_za128_s8 (15, w0))\n+\n+/*\n+** readz_za128_u8_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_u8_0_w0, svuint8_t,\n+\t z0 = svreadz_ver_za128_u8 (0, w0),\n+\t z0 = svreadz_ver_za128_u8 (0, w0))\n+\n+/*\n+** readz_za128_mf8_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_mf8_0_w0, svmfloat8_t,\n+\t z0 = svreadz_ver_za128_mf8 (0, w0),\n+\t z0 = svreadz_ver_za128_mf8 (0, w0))\n+\n+/*\n+** readz_za128_s16_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_s16_0_w0, svint16_t,\n+\t z0 = svreadz_ver_za128_s16 (0, w0),\n+\t z0 = svreadz_ver_za128_s16 (0, w0))\n+\n+/*\n+** readz_za128_u16_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_u16_0_w0, svuint16_t,\n+\t z0 = svreadz_ver_za128_u16 (0, w0),\n+\t z0 = svreadz_ver_za128_u16 (0, w0))\n+\n+/*\n+** readz_za128_f16_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_f16_0_w0, svfloat16_t,\n+\t z0 = svreadz_ver_za128_f16 (0, w0),\n+\t z0 = svreadz_ver_za128_f16 (0, w0))\n+\n+/*\n+** readz_za128_bf16_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_bf16_0_w0, svbfloat16_t,\n+\t z0 = svreadz_ver_za128_bf16 (0, w0),\n+\t z0 = svreadz_ver_za128_bf16 (0, w0))\n+\n+/*\n+** readz_za128_s32_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_s32_0_w0, svint32_t,\n+\t z0 = svreadz_ver_za128_s32 (0, w0),\n+\t z0 = svreadz_ver_za128_s32 (0, w0))\n+\n+/*\n+** readz_za128_u32_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_u32_0_w0, svuint32_t,\n+\t z0 = svreadz_ver_za128_u32 (0, w0),\n+\t z0 = svreadz_ver_za128_u32 (0, w0))\n+\n+/*\n+** readz_za128_f32_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_f32_0_w0, svfloat32_t,\n+\t z0 = svreadz_ver_za128_f32 (0, w0),\n+\t z0 = svreadz_ver_za128_f32 (0, w0))\n+\n+/*\n+** readz_za128_s64_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_s64_0_w0, svint64_t,\n+\t z0 = svreadz_ver_za128_s64 (0, w0),\n+\t z0 = svreadz_ver_za128_s64 (0, w0))\n+\n+/*\n+** readz_za128_u64_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_u64_0_w0, svuint64_t,\n+\t z0 = svreadz_ver_za128_u64 (0, w0),\n+\t z0 = svreadz_ver_za128_u64 (0, w0))\n+\n+/*\n+** readz_za128_f64_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.q, za0v\\.q\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za128_f64_0_w0, svfloat64_t,\n+\t z0 = svreadz_ver_za128_f64 (0, w0),\n+\t z0 = svreadz_ver_za128_f64 (0, w0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za8.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za8.c\nindex 4bd5ae783ef..66c42cecd31 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za8.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za8.c\n@@ -85,3 +85,13 @@ TEST_READ_ZA (readz_za8_s8_0_w0m1, svint8_t,\n TEST_READ_ZA (readz_za8_u8_0_w0, svuint8_t,\n \t z0 = svreadz_ver_za8_u8 (0, w0),\n \t z0 = svreadz_ver_za8_u8 (0, w0))\n+\n+/*\n+** readz_za8_mf8_0_w0:\n+**\tmov\t(w1[2-5]), w0\n+**\tmovaz\tz0\\.b, za0v\\.b\\[\\1, 0\\]\n+**\tret\n+*/\n+TEST_READ_ZA (readz_za8_mf8_0_w0, svmfloat8_t,\n+\t z0 = svreadz_ver_za8_mf8 (0, w0),\n+\t z0 = svreadz_ver_za8_mf8 (0, w0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za8_vg2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za8_vg2.c\nindex 940a5619a13..daa6b131587 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za8_vg2.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za8_vg2.c\n@@ -26,6 +26,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_1, svuint8x2_t,\n \t\t z4 = svreadz_ver_za8_u8_vg2 (0, 1),\n \t\t z4 = svreadz_ver_za8_u8_vg2 (0, 1))\n \n+/*\n+** readz_za8_mf8_z4_0_1:\n+**\tmov\t(w1[2-5]), #?1\n+**\tmovaz\t{z4\\.b - z5\\.b}, za0v\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_1, svmfloat8x2_t,\n+\t\t z4 = svreadz_ver_za8_mf8_vg2 (0, 1),\n+\t\t z4 = svreadz_ver_za8_mf8_vg2 (0, 1))\n+\n /*\n ** readz_za8_s8_z28_0_w11:\n **\tmov\t(w1[2-5]), w11\n@@ -54,6 +64,15 @@ TEST_READ_ZA_XN (readz_za8_u8_z18_0_w15, svuint8x2_t,\n \t\t z18 = svreadz_ver_za8_u8_vg2 (0, w15),\n \t\t z18 = svreadz_ver_za8_u8_vg2 (0, w15))\n \n+/*\n+** readz_za8_mf8_z18_0_w15:\n+**\tmovaz\t{z18\\.b - z19\\.b}, za0v\\.b\\[w15, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z18_0_w15, svmfloat8x2_t,\n+\t\t z18 = svreadz_ver_za8_mf8_vg2 (0, w15),\n+\t\t z18 = svreadz_ver_za8_mf8_vg2 (0, w15))\n+\n /*\n ** readz_za8_s8_z23_0_w12p14:\n **\tmovaz\t{[^\\n]+}, za0v\\.b\\[w12, 14:15\\]\n@@ -75,6 +94,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w12p1, svuint8x2_t,\n \t\t z4 = svreadz_ver_za8_u8_vg2 (0, w12 + 1),\n \t\t z4 = svreadz_ver_za8_u8_vg2 (0, w12 + 1))\n \n+/*\n+** readz_za8_mf8_z4_0_w12p1:\n+**\tadd\t(w[0-9]+), w12, #?1\n+**\tmovaz\t{z4\\.b - z5\\.b}, za0v\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_w12p1, svmfloat8x2_t,\n+\t\t z4 = svreadz_ver_za8_mf8_vg2 (0, w12 + 1),\n+\t\t z4 = svreadz_ver_za8_mf8_vg2 (0, w12 + 1))\n+\n /*\n ** readz_za8_s8_z28_0_w12p2:\n **\tmovaz\t{z28\\.b - z29\\.b}, za0v\\.b\\[w12, 2:3\\]\n@@ -94,6 +123,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z0_0_w15p3, svuint8x2_t,\n \t\t z0 = svreadz_ver_za8_u8_vg2 (0, w15 + 3),\n \t\t z0 = svreadz_ver_za8_u8_vg2 (0, w15 + 3))\n \n+/*\n+** readz_za8_mf8_z0_0_w15p3:\n+**\tadd\t(w[0-9]+), w15, #?3\n+**\tmovaz\t{z0\\.b - z1\\.b}, za0v\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z0_0_w15p3, svmfloat8x2_t,\n+\t\t z0 = svreadz_ver_za8_mf8_vg2 (0, w15 + 3),\n+\t\t z0 = svreadz_ver_za8_mf8_vg2 (0, w15 + 3))\n+\n /*\n ** readz_za8_u8_z4_0_w15p12:\n **\tmovaz\t{z4\\.b - z5\\.b}, za0v\\.b\\[w15, 12:13\\]\n@@ -103,6 +142,15 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w15p12, svuint8x2_t,\n \t\t z4 = svreadz_ver_za8_u8_vg2 (0, w15 + 12),\n \t\t z4 = svreadz_ver_za8_u8_vg2 (0, w15 + 12))\n \n+/*\n+** readz_za8_mf8_z4_0_w15p12:\n+**\tmovaz\t{z4\\.b - z5\\.b}, za0v\\.b\\[w15, 12:13\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_w15p12, svmfloat8x2_t,\n+\t\t z4 = svreadz_ver_za8_mf8_vg2 (0, w15 + 12),\n+\t\t z4 = svreadz_ver_za8_mf8_vg2 (0, w15 + 12))\n+\n /*\n ** readz_za8_u8_z28_0_w12p15:\n **\tadd\t(w[0-9]+), w12, #?15\n@@ -113,6 +161,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z28_0_w12p15, svuint8x2_t,\n \t\t z28 = svreadz_ver_za8_u8_vg2 (0, w12 + 15),\n \t\t z28 = svreadz_ver_za8_u8_vg2 (0, w12 + 15))\n \n+/*\n+** readz_za8_mf8_z28_0_w12p15:\n+**\tadd\t(w[0-9]+), w12, #?15\n+**\tmovaz\t{z28\\.b - z29\\.b}, za0v\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z28_0_w12p15, svmfloat8x2_t,\n+\t\t z28 = svreadz_ver_za8_mf8_vg2 (0, w12 + 15),\n+\t\t z28 = svreadz_ver_za8_mf8_vg2 (0, w12 + 15))\n+\n /*\n ** readz_za8_s8_z0_0_w15p16:\n **\tadd\t(w[0-9]+), w15, #?16\n@@ -133,6 +191,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w12m1, svuint8x2_t,\n \t\t z4 = svreadz_ver_za8_u8_vg2 (0, w12 - 1),\n \t\t z4 = svreadz_ver_za8_u8_vg2 (0, w12 - 1))\n \n+/*\n+** readz_za8_mf8_z4_0_w12m1:\n+**\tsub\t(w[0-9]+), w12, #?1\n+**\tmovaz\t{z4\\.b - z5\\.b}, za0v\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_w12m1, svmfloat8x2_t,\n+\t\t z4 = svreadz_ver_za8_mf8_vg2 (0, w12 - 1),\n+\t\t z4 = svreadz_ver_za8_mf8_vg2 (0, w12 - 1))\n+\n /*\n ** readz_za8_u8_z18_0_w16:\n **\tmov\t(w1[2-5]), w16\n@@ -142,3 +210,12 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w12m1, svuint8x2_t,\n TEST_READ_ZA_XN (readz_za8_u8_z18_0_w16, svuint8x2_t,\n \t\t z18 = svreadz_ver_za8_u8_vg2 (0, w16),\n \t\t z18 = svreadz_ver_za8_u8_vg2 (0, w16))\n+/*\n+** readz_za8_mf8_z18_0_w16:\n+**\tmov\t(w1[2-5]), w16\n+**\tmovaz\t{z18\\.b - z19\\.b}, za0v\\.b\\[\\1, 0:1\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z18_0_w16, svmfloat8x2_t,\n+\t\t z18 = svreadz_ver_za8_mf8_vg2 (0, w16),\n+\t\t z18 = svreadz_ver_za8_mf8_vg2 (0, w16))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za8_vg4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za8_vg4.c\nindex 9f776ded80f..f3c06d8f029 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za8_vg4.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za8_vg4.c\n@@ -26,6 +26,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_1, svuint8x4_t,\n \t\t z4 = svreadz_ver_za8_u8_vg4 (0, 1),\n \t\t z4 = svreadz_ver_za8_u8_vg4 (0, 1))\n \n+/*\n+** readz_za8_mf8_z4_0_1:\n+**\tmov\t(w1[2-5]), #?1\n+**\tmovaz\t{z4\\.b - z7\\.b}, za0v\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_1, svmfloat8x4_t,\n+\t\t z4 = svreadz_ver_za8_mf8_vg4 (0, 1),\n+\t\t z4 = svreadz_ver_za8_mf8_vg4 (0, 1))\n+\n /*\n ** readz_za8_s8_z28_0_w11:\n **\tmov\t(w1[2-5]), w11\n@@ -58,6 +68,19 @@ TEST_READ_ZA_XN (readz_za8_u8_z18_0_w15, svuint8x4_t,\n \t\t z18 = svreadz_ver_za8_u8_vg4 (0, w15),\n \t\t z18 = svreadz_ver_za8_u8_vg4 (0, w15))\n \n+/*\n+** readz_za8_mf8_z18_0_w15:\n+**\tmovaz\t{[^\\n]+}, za0v\\.b\\[w15, 0:3\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z18_0_w15, svmfloat8x4_t,\n+\t\t z18 = svreadz_ver_za8_mf8_vg4 (0, w15),\n+\t\t z18 = svreadz_ver_za8_mf8_vg4 (0, w15))\n+\n /*\n ** readz_za8_s8_z23_0_w12p12:\n **\tmovaz\t{[^\\n]+}, za0v\\.b\\[w12, 12:15\\]\n@@ -81,6 +104,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w12p1, svuint8x4_t,\n \t\t z4 = svreadz_ver_za8_u8_vg4 (0, w12 + 1),\n \t\t z4 = svreadz_ver_za8_u8_vg4 (0, w12 + 1))\n \n+/*\n+** readz_za8_mf8_z4_0_w12p1:\n+**\tadd\t(w[0-9]+), w12, #?1\n+**\tmovaz\t{z4\\.b - z7\\.b}, za0v\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_w12p1, svmfloat8x4_t,\n+\t\t z4 = svreadz_ver_za8_mf8_vg4 (0, w12 + 1),\n+\t\t z4 = svreadz_ver_za8_mf8_vg4 (0, w12 + 1))\n+\n /*\n ** readz_za8_s8_z28_0_w12p2:\n **\tadd\t(w[0-9]+), w12, #?2\n@@ -101,6 +134,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z0_0_w15p3, svuint8x4_t,\n \t\t z0 = svreadz_ver_za8_u8_vg4 (0, w15 + 3),\n \t\t z0 = svreadz_ver_za8_u8_vg4 (0, w15 + 3))\n \n+/*\n+** readz_za8_mf8_z0_0_w15p3:\n+**\tadd\t(w[0-9]+), w15, #?3\n+**\tmovaz\t{z0\\.b - z3\\.b}, za0v\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z0_0_w15p3, svmfloat8x4_t,\n+\t\t z0 = svreadz_ver_za8_mf8_vg4 (0, w15 + 3),\n+\t\t z0 = svreadz_ver_za8_mf8_vg4 (0, w15 + 3))\n+\n /*\n ** readz_za8_u8_z0_0_w12p4:\n **\tmovaz\t{z0\\.b - z3\\.b}, za0v\\.b\\[w12, 4:7\\]\n@@ -110,6 +153,15 @@ TEST_READ_ZA_XN (readz_za8_u8_z0_0_w12p4, svuint8x4_t,\n \t\t z0 = svreadz_ver_za8_u8_vg4 (0, w12 + 4),\n \t\t z0 = svreadz_ver_za8_u8_vg4 (0, w12 + 4))\n \n+/*\n+** readz_za8_mf8_z0_0_w12p4:\n+**\tmovaz\t{z0\\.b - z3\\.b}, za0v\\.b\\[w12, 4:7\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z0_0_w12p4, svmfloat8x4_t,\n+\t\t z0 = svreadz_ver_za8_mf8_vg4 (0, w12 + 4),\n+\t\t z0 = svreadz_ver_za8_mf8_vg4 (0, w12 + 4))\n+\n /*\n ** readz_za8_u8_z4_0_w15p12:\n **\tmovaz\t{z4\\.b - z7\\.b}, za0v\\.b\\[w15, 12:15\\]\n@@ -119,6 +171,15 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w15p12, svuint8x4_t,\n \t\t z4 = svreadz_ver_za8_u8_vg4 (0, w15 + 12),\n \t\t z4 = svreadz_ver_za8_u8_vg4 (0, w15 + 12))\n \n+/*\n+** readz_za8_mf8_z4_0_w15p12:\n+**\tmovaz\t{z4\\.b - z7\\.b}, za0v\\.b\\[w15, 12:15\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_w15p12, svmfloat8x4_t,\n+\t\t z4 = svreadz_ver_za8_mf8_vg4 (0, w15 + 12),\n+\t\t z4 = svreadz_ver_za8_mf8_vg4 (0, w15 + 12))\n+\n /*\n ** readz_za8_u8_z28_0_w12p14:\n **\tadd\t(w[0-9]+), w12, #?14\n@@ -129,6 +190,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z28_0_w12p14, svuint8x4_t,\n \t\t z28 = svreadz_ver_za8_u8_vg4 (0, w12 + 14),\n \t\t z28 = svreadz_ver_za8_u8_vg4 (0, w12 + 14))\n \n+/*\n+** readz_za8_mf8_z28_0_w12p14:\n+**\tadd\t(w[0-9]+), w12, #?14\n+**\tmovaz\t{z28\\.b - z31\\.b}, za0v\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z28_0_w12p14, svmfloat8x4_t,\n+\t\t z28 = svreadz_ver_za8_mf8_vg4 (0, w12 + 14),\n+\t\t z28 = svreadz_ver_za8_mf8_vg4 (0, w12 + 14))\n+\n /*\n ** readz_za8_s8_z0_0_w15p16:\n **\tadd\t(w[0-9]+), w15, #?16\n@@ -149,6 +220,16 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w12m1, svuint8x4_t,\n \t\t z4 = svreadz_ver_za8_u8_vg4 (0, w12 - 1),\n \t\t z4 = svreadz_ver_za8_u8_vg4 (0, w12 - 1))\n \n+/*\n+** readz_za8_mf8_z4_0_w12m1:\n+**\tsub\t(w[0-9]+), w12, #?1\n+**\tmovaz\t{z4\\.b - z7\\.b}, za0v\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z4_0_w12m1, svmfloat8x4_t,\n+\t\t z4 = svreadz_ver_za8_mf8_vg4 (0, w12 - 1),\n+\t\t z4 = svreadz_ver_za8_mf8_vg4 (0, w12 - 1))\n+\n /*\n ** readz_za8_u8_z28_0_w16:\n **\tmov\t(w1[2-5]), w16\n@@ -158,3 +239,12 @@ TEST_READ_ZA_XN (readz_za8_u8_z4_0_w12m1, svuint8x4_t,\n TEST_READ_ZA_XN (readz_za8_u8_z28_0_w16, svuint8x4_t,\n \t\t z28 = svreadz_ver_za8_u8_vg4 (0, w16),\n \t\t z28 = svreadz_ver_za8_u8_vg4 (0, w16))\n+/*\n+** readz_za8_mf8_z28_0_w16:\n+**\tmov\t(w1[2-5]), w16\n+**\tmovaz\t{z28\\.b - z31\\.b}, za0v\\.b\\[\\1, 0:3\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_za8_mf8_z28_0_w16, svmfloat8x4_t,\n+\t\t z28 = svreadz_ver_za8_mf8_vg4 (0, w16),\n+\t\t z28 = svreadz_ver_za8_mf8_vg4 (0, w16))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_za8_vg1x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_za8_vg1x2.c\nindex 7bdb17d7e79..f4d40315acd 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_za8_vg1x2.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_za8_vg1x2.c\n@@ -36,6 +36,16 @@ TEST_READ_ZA_XN (readz_w7_z0, svuint8x2_t,\n \t\t z0 = svreadz_za8_u8_vg1x2 (w7),\n \t\t z0 = svreadz_za8_u8_vg1x2 (w7))\n \n+/*\n+** readz_mf8_w7_z0:\n+**\tmov\t(w8|w9|w10|w11), w7\n+**\tmovaz\t{z0\\.d - z1\\.d}, za\\.d\\[\\1, 0, vgx2\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_mf8_w7_z0, svmfloat8x2_t,\n+\t\t z0 = svreadz_za8_mf8_vg1x2 (w7),\n+\t\t z0 = svreadz_za8_mf8_vg1x2 (w7))\n+\n /*\n ** readz_w8_z0:\n **\tmovaz\t{z0\\.d - z1\\.d}, za\\.d\\[w8, 0, vgx2\\]\n@@ -65,6 +75,16 @@ TEST_READ_ZA_XN (readz_w12_z0, svuint8x2_t,\n \t\t z0 = svreadz_za8_u8_vg1x2 (w12),\n \t\t z0 = svreadz_za8_u8_vg1x2 (w12))\n \n+/*\n+** readz_mf8_w12_z0:\n+**\tmov\t(w8|w9|w10|w11), w12\n+**\tmovaz\t{z0\\.d - z1\\.d}, za\\.d\\[\\1, 0, vgx2\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_mf8_w12_z0, svmfloat8x2_t,\n+\t\t z0 = svreadz_za8_mf8_vg1x2 (w12),\n+\t\t z0 = svreadz_za8_mf8_vg1x2 (w12))\n+\n /*\n ** readz_w8p7_z0:\n **\tmovaz\t{z0\\.d - z1\\.d}, za\\.d\\[w8, 7, vgx2\\]\n@@ -94,6 +114,16 @@ TEST_READ_ZA_XN (readz_w8m1_z0, svuint8x2_t,\n \t\t z0 = svreadz_za8_u8_vg1x2 (w8 - 1),\n \t\t z0 = svreadz_za8_u8_vg1x2 (w8 - 1))\n \n+/*\n+** readz_mf8_w8m1_z0:\n+**\tsub\t(w8|w9|w10|w11), w8, #?1\n+**\tmovaz\t{z0\\.d - z1\\.d}, za\\.d\\[\\1, 0, vgx2\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_mf8_w8m1_z0, svmfloat8x2_t,\n+\t\t z0 = svreadz_za8_mf8_vg1x2 (w8 - 1),\n+\t\t z0 = svreadz_za8_mf8_vg1x2 (w8 - 1))\n+\n /*\n ** readz_w8_z18:\n **\tmovaz\t{z18\\.d - z19\\.d}, za\\.d\\[w8, 0, vgx2\\]\n@@ -103,6 +133,15 @@ TEST_READ_ZA_XN (readz_w8_z18, svuint8x2_t,\n \t\t z18 = svreadz_za8_u8_vg1x2 (w8),\n \t\t z18 = svreadz_za8_u8_vg1x2 (w8))\n \n+/*\n+** readz_mf8_w8_z18:\n+**\tmovaz\t{z18\\.d - z19\\.d}, za\\.d\\[w8, 0, vgx2\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_mf8_w8_z18, svmfloat8x2_t,\n+\t\t z18 = svreadz_za8_mf8_vg1x2 (w8),\n+\t\t z18 = svreadz_za8_mf8_vg1x2 (w8))\n+\n /* Leave the assembler to check for correctness for misaligned registers. */\n \n /*\n@@ -124,3 +163,12 @@ TEST_READ_ZA_XN (readz_w8_z23, svint8x2_t,\n TEST_READ_ZA_XN (readz_w8_z28, svuint8x2_t,\n \t\t z28 = svreadz_za8_u8_vg1x2 (w8),\n \t\t z28 = svreadz_za8_u8_vg1x2 (w8))\n+\n+/*\n+** readz_mf8_w8_z28:\n+**\tmovaz\t{z28\\.d - z29\\.d}, za\\.d\\[w8, 0, vgx2\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_mf8_w8_z28, svmfloat8x2_t,\n+\t\t z28 = svreadz_za8_mf8_vg1x2 (w8),\n+\t\t z28 = svreadz_za8_mf8_vg1x2 (w8))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_za8_vg1x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_za8_vg1x4.c\nindex 02beaae85c6..d9be244c62c 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_za8_vg1x4.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_za8_vg1x4.c\n@@ -26,6 +26,16 @@ TEST_READ_ZA_XN (readz_w0_z0, svuint8x4_t,\n \t\t z0 = svreadz_za8_u8_vg1x4 (w0),\n \t\t z0 = svreadz_za8_u8_vg1x4 (w0))\n \n+/*\n+** readz_mf8_w0_z0:\n+**\tmov\t(w8|w9|w10|w11), w0\n+**\tmovaz\t{z0\\.d - z3\\.d}, za\\.d\\[\\1, 0, vgx4\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_mf8_w0_z0, svmfloat8x4_t,\n+\t\t z0 = svreadz_za8_mf8_vg1x4 (w0),\n+\t\t z0 = svreadz_za8_mf8_vg1x4 (w0))\n+\n /*\n ** readz_w7_z0:\n **\tmov\t(w8|w9|w10|w11), w7\n@@ -55,6 +65,16 @@ TEST_READ_ZA_XN (readz_w11_z0, svuint8x4_t,\n \t\t z0 = svreadz_za8_u8_vg1x4 (w11))\n \n \n+/*\n+** readz_mf8_w11_z0:\n+**\tmovaz\t{z0\\.d - z3\\.d}, za\\.d\\[w11, 0, vgx4\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_mf8_w11_z0, svmfloat8x4_t,\n+\t\t z0 = svreadz_za8_mf8_vg1x4 (w11),\n+\t\t z0 = svreadz_za8_mf8_vg1x4 (w11))\n+\n+\n /*\n ** readz_w12_z0:\n **\tmov\t(w8|w9|w10|w11), w12\n@@ -84,6 +104,16 @@ TEST_READ_ZA_XN (readz_w8p8_z0, svuint8x4_t,\n \t\t z0 = svreadz_za8_u8_vg1x4 (w8 + 8),\n \t\t z0 = svreadz_za8_u8_vg1x4 (w8 + 8))\n \n+/*\n+** readz_mf8_w8p8_z0:\n+**\tadd\t(w8|w9|w10|w11), w8, #?8\n+**\tmovaz\t{z0\\.d - z3\\.d}, za\\.d\\[\\1, 0, vgx4\\]\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_mf8_w8p8_z0, svmfloat8x4_t,\n+\t\t z0 = svreadz_za8_mf8_vg1x4 (w8 + 8),\n+\t\t z0 = svreadz_za8_mf8_vg1x4 (w8 + 8))\n+\n /*\n ** readz_w8m1_z0:\n **\tsub\t(w8|w9|w10|w11), w8, #?1\n@@ -118,6 +148,19 @@ TEST_READ_ZA_XN (readz_w8_z18, svuint8x4_t,\n \t\t z18 = svreadz_za8_u8_vg1x4 (w8),\n \t\t z18 = svreadz_za8_u8_vg1x4 (w8))\n \n+/*\n+** readz_mf8_w8_z18:\n+**\tmovaz\t[^\\n]+, za\\.d\\[w8, 0, vgx4\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_mf8_w8_z18, svmfloat8x4_t,\n+\t\t z18 = svreadz_za8_mf8_vg1x4 (w8),\n+\t\t z18 = svreadz_za8_mf8_vg1x4 (w8))\n+\n /*\n ** readz_w8_z23:\n **\tmovaz\t[^\\n]+, za\\.d\\[w8, 0, vgx4\\]\n@@ -131,6 +174,19 @@ TEST_READ_ZA_XN (readz_w8_z23, svuint8x4_t,\n \t\t z23 = svreadz_za8_u8_vg1x4 (w8),\n \t\t z23 = svreadz_za8_u8_vg1x4 (w8))\n \n+/*\n+** readz_mf8_w8_z23:\n+**\tmovaz\t[^\\n]+, za\\.d\\[w8, 0, vgx4\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_READ_ZA_XN (readz_mf8_w8_z23, svmfloat8x4_t,\n+\t\t z23 = svreadz_za8_mf8_vg1x4 (w8),\n+\t\t z23 = svreadz_za8_mf8_vg1x4 (w8))\n+\n /*\n ** readz_w8_z28:\n **\tmovaz\t{z28\\.d - z31\\.d}, za\\.d\\[w8, 0, vgx4\\]\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/sel_mf8_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/sel_mf8_x2.c\nnew file mode 100644\nindex 00000000000..1192aa84dc2\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/sel_mf8_x2.c\n@@ -0,0 +1,92 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** sel_z0_pn0_z0_z4:\n+**\tmov\tp([0-9]+)\\.b, p0\\.b\n+**\tsel\t{z0\\.b - z1\\.b}, pn\\1, {z0\\.b - z1\\.b}, {z4\\.b - z5\\.b}\n+**\tret\n+*/\n+TEST_XN (sel_z0_pn0_z0_z4, svmfloat8x2_t, z0,\n+\t svsel_mf8_x2 (pn0, z0, z4),\n+\t svsel (pn0, z0, z4))\n+\n+/*\n+** sel_z0_pn7_z0_z4:\n+**\tmov\tp([0-9]+)\\.b, p7\\.b\n+**\tsel\t{z0\\.b - z1\\.b}, pn\\1, {z0\\.b - z1\\.b}, {z4\\.b - z5\\.b}\n+**\tret\n+*/\n+TEST_XN (sel_z0_pn7_z0_z4, svmfloat8x2_t, z0,\n+\t svsel_mf8_x2 (pn7, z0, z4),\n+\t svsel (pn7, z0, z4))\n+\n+/*\n+** sel_z0_pn8_z4_z28:\n+**\tsel\t{z0\\.b - z1\\.b}, pn8, {z4\\.b - z5\\.b}, {z28\\.b - z29\\.b}\n+**\tret\n+*/\n+TEST_XN (sel_z0_pn8_z4_z28, svmfloat8x2_t, z0,\n+\t svsel_mf8_x2 (pn8, z4, z28),\n+\t svsel (pn8, z4, z28))\n+\n+/*\n+** sel_z4_pn8_z18_z0:\n+**\tsel\t{z4\\.b - z5\\.b}, pn8, {z18\\.b - z19\\.b}, {z0\\.b - z1\\.b}\n+**\tret\n+*/\n+TEST_XN (sel_z4_pn8_z18_z0, svmfloat8x2_t, z4,\n+\t svsel_mf8_x2 (pn8, z18, z0),\n+\t svsel (pn8, z18, z0))\n+\n+/*\n+** sel_z18_pn15_z28_z4:\n+**\tsel\t{z18\\.b - z19\\.b}, pn15, {z28\\.b - z29\\.b}, {z4\\.b - z5\\.b}\n+**\tret\n+*/\n+TEST_XN (sel_z18_pn15_z28_z4, svmfloat8x2_t, z18,\n+\t svsel_mf8_x2 (pn15, z28, z4),\n+\t svsel (pn15, z28, z4))\n+\n+/*\n+** sel_z18_pn8_z18_z4:\n+**\tsel\t{z18\\.b - z19\\.b}, pn8, {z18\\.b - z19\\.b}, {z4\\.b - z5\\.b}\n+**\tret\n+*/\n+TEST_XN (sel_z18_pn8_z18_z4, svmfloat8x2_t, z18,\n+\t svsel_mf8_x2 (pn8, z18, z4),\n+\t svsel (pn8, z18, z4))\n+\n+/*\n+** sel_z23_pn15_z0_z18:\n+**\tsel\t[^\\n]+, pn15, {z0\\.b - z1\\.b}, {z18\\.b - z19\\.b}\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (sel_z23_pn15_z0_z18, svmfloat8x2_t, z23,\n+\t svsel_mf8_x2 (pn15, z0, z18),\n+\t svsel (pn15, z0, z18))\n+\n+/*\n+** sel_z0_pn15_z23_z28:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tsel\t{z0\\.b - z1\\.b}, pn15, {[^}]+}, {z28\\.b - z29\\.b}\n+**\tret\n+*/\n+TEST_XN (sel_z0_pn15_z23_z28, svmfloat8x2_t, z0,\n+\t svsel_mf8_x2 (pn15, z23, z28),\n+\t svsel (pn15, z23, z28))\n+\n+/*\n+** sel_z0_pn8_z28_z23:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tsel\t{z0\\.b - z1\\.b}, pn8, {z28\\.b - z29\\.b}, {[^}]+}\n+**\tret\n+*/\n+TEST_XN (sel_z0_pn8_z28_z23, svmfloat8x2_t, z0,\n+\t svsel_mf8_x2 (pn8, z28, z23),\n+\t svsel (pn8, z28, z23))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/sel_mf8_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/sel_mf8_x4.c\nnew file mode 100644\nindex 00000000000..ddcba0318d9\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/sel_mf8_x4.c\n@@ -0,0 +1,92 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** sel_z0_pn0_z0_z4:\n+**\tmov\tp([0-9]+)\\.b, p0\\.b\n+**\tsel\t{z0\\.b - z3\\.b}, pn\\1, {z0\\.b - z3\\.b}, {z4\\.b - z7\\.b}\n+**\tret\n+*/\n+TEST_XN (sel_z0_pn0_z0_z4, svmfloat8x4_t, z0,\n+\t svsel_mf8_x4 (pn0, z0, z4),\n+\t svsel (pn0, z0, z4))\n+\n+/*\n+** sel_z0_pn7_z0_z4:\n+**\tmov\tp([0-9]+)\\.b, p7\\.b\n+**\tsel\t{z0\\.b - z3\\.b}, pn\\1, {z0\\.b - z3\\.b}, {z4\\.b - z7\\.b}\n+**\tret\n+*/\n+TEST_XN (sel_z0_pn7_z0_z4, svmfloat8x4_t, z0,\n+\t svsel_mf8_x4 (pn7, z0, z4),\n+\t svsel (pn7, z0, z4))\n+\n+/*\n+** sel_z0_pn8_z4_z28:\n+**\tsel\t{z0\\.b - z3\\.b}, pn8, {z4\\.b - z7\\.b}, {z28\\.b - z31\\.b}\n+**\tret\n+*/\n+TEST_XN (sel_z0_pn8_z4_z28, svmfloat8x4_t, z0,\n+\t svsel_mf8_x4 (pn8, z4, z28),\n+\t svsel (pn8, z4, z28))\n+\n+/*\n+** sel_z4_pn8_z18_z0:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tsel\t{z4\\.b - z7\\.b}, pn8, {[^}]+}, {z0\\.b - z3\\.b}\n+**\tret\n+*/\n+TEST_XN (sel_z4_pn8_z18_z0, svmfloat8x4_t, z4,\n+\t svsel_mf8_x4 (pn8, z18, z0),\n+\t svsel (pn8, z18, z0))\n+\n+/*\n+** sel_z18_pn15_z28_z4:\n+**\tsel\t{[^}]+}, pn15, {z28\\.b - z31\\.b}, {z4\\.b - z7\\.b}\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (sel_z18_pn15_z28_z4, svmfloat8x4_t, z18,\n+\t svsel_mf8_x4 (pn15, z28, z4),\n+\t svsel (pn15, z28, z4))\n+\n+/*\n+** sel_z18_pn8_z18_z4:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tsel\t{[^}]+}, pn8, {[^}]+}, {z4\\.b - z7\\.b}\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (sel_z18_pn8_z18_z4, svmfloat8x4_t, z18,\n+\t svsel_mf8_x4 (pn8, z18, z4),\n+\t svsel (pn8, z18, z4))\n+\n+/*\n+** sel_z23_pn15_z0_z18:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tsel\t[^\\n]+, pn15, {z0\\.b - z3\\.b}, {[^}]+}\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (sel_z23_pn15_z0_z18, svmfloat8x4_t, z23,\n+\t svsel_mf8_x4 (pn15, z0, z18),\n+\t svsel (pn15, z0, z18))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/st1_mf8_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/st1_mf8_x2.c\nnew file mode 100644\nindex 00000000000..c778c139e8e\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/st1_mf8_x2.c\n@@ -0,0 +1,262 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" { target { ! ilp32 } } } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** st1_mf8_base:\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_base, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn8, x0, z0),\n+\t\t svst1 (pn8, x0, z0))\n+\n+/*\n+** st1_mf8_index:\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, x1\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_index, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn8, x0 + x1, z0),\n+\t\t svst1 (pn8, x0 + x1, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_mf8_1:\n+**\tincb\tx0\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_1, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn8, x0 + svcntb (), z0),\n+\t\t svst1 (pn8, x0 + svcntb (), z0))\n+\n+/*\n+** st1_mf8_2:\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #2, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_2, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn8, x0 + svcntb () * 2, z0),\n+\t\t svst1 (pn8, x0 + svcntb () * 2, z0))\n+\n+/*\n+** st1_mf8_14:\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #14, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_14, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn8, x0 + svcntb () * 14, z0),\n+\t\t svst1 (pn8, x0 + svcntb () * 14, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_mf8_16:\n+**\tincb\tx0, all, mul #16\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_16, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn8, x0 + svcntb () * 16, z0),\n+\t\t svst1 (pn8, x0 + svcntb () * 16, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_mf8_m1:\n+**\tdecb\tx0\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_m1, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn8, x0 - svcntb (), z0),\n+\t\t svst1 (pn8, x0 - svcntb (), z0))\n+\n+/*\n+** st1_mf8_m2:\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #-2, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_m2, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn8, x0 - svcntb () * 2, z0),\n+\t\t svst1 (pn8, x0 - svcntb () * 2, z0))\n+\n+/*\n+** st1_mf8_m16:\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #-16, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_m16, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn8, x0 - svcntb () * 16, z0),\n+\t\t svst1 (pn8, x0 - svcntb () * 16, z0))\n+\n+/*\n+** st1_mf8_m18:\n+**\taddvl\t(x[0-9]+), x0, #-18\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[\\1\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_m18, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn8, x0 - svcntb () * 18, z0),\n+\t\t svst1 (pn8, x0 - svcntb () * 18, z0))\n+\n+/*\n+** st1_mf8_z17:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tst1b\t{z[^\\n]+}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_z17, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn8, x0, z17),\n+\t\t svst1 (pn8, x0, z17))\n+\n+/*\n+** st1_mf8_z22:\n+**\tst1b\t{z22\\.b(?: - |, )z23\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_z22, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn8, x0, z22),\n+\t\t svst1 (pn8, x0, z22))\n+\n+/*\n+** st1_mf8_z28:\n+**\tst1b\t{z28\\.b(?: - |, )z29\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_z28, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn8, x0, z28),\n+\t\t svst1 (pn8, x0, z28))\n+\n+/*\n+** st1_mf8_pn0:\n+**\tmov\tp([89]|1[0-5])\\.b, p0\\.b\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn\\1, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_pn0, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn0, x0, z0),\n+\t\t svst1 (pn0, x0, z0))\n+\n+/*\n+** st1_mf8_pn7:\n+**\tmov\tp([89]|1[0-5])\\.b, p7\\.b\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn\\1, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_pn7, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn7, x0, z0),\n+\t\t svst1 (pn7, x0, z0))\n+\n+/*\n+** st1_mf8_pn15:\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn15, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_pn15, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_mf8_x2 (pn15, x0, z0),\n+\t\t svst1 (pn15, x0, z0))\n+\n+/*\n+** st1_vnum_mf8_0:\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_0, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x2 (pn8, x0, 0, z0),\n+\t\t svst1_vnum (pn8, x0, 0, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_vnum_mf8_1:\n+**\tincb\tx0\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_1, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x2 (pn8, x0, 1, z0),\n+\t\t svst1_vnum (pn8, x0, 1, z0))\n+\n+/*\n+** st1_vnum_mf8_2:\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #2, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_2, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x2 (pn8, x0, 2, z0),\n+\t\t svst1_vnum (pn8, x0, 2, z0))\n+\n+/*\n+** st1_vnum_mf8_14:\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #14, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_14, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x2 (pn8, x0, 14, z0),\n+\t\t svst1_vnum (pn8, x0, 14, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_vnum_mf8_16:\n+**\tincb\tx0, all, mul #16\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_16, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x2 (pn8, x0, 16, z0),\n+\t\t svst1_vnum (pn8, x0, 16, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_vnum_mf8_m1:\n+**\tdecb\tx0\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_m1, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x2 (pn8, x0, -1, z0),\n+\t\t svst1_vnum (pn8, x0, -1, z0))\n+\n+/*\n+** st1_vnum_mf8_m2:\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #-2, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_m2, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x2 (pn8, x0, -2, z0),\n+\t\t svst1_vnum (pn8, x0, -2, z0))\n+\n+/*\n+** st1_vnum_mf8_m16:\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #-16, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_m16, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x2 (pn8, x0, -16, z0),\n+\t\t svst1_vnum (pn8, x0, -16, z0))\n+\n+/*\n+** st1_vnum_mf8_m18:\n+**\taddvl\t(x[0-9]+), x0, #-18\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[\\1\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_m18, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x2 (pn8, x0, -18, z0),\n+\t\t svst1_vnum (pn8, x0, -18, z0))\n+\n+/*\n+** st1_vnum_mf8_x1:\n+**\tcntb\t(x[0-9]+)\n+** (\n+**\tmadd\t(x[0-9]+), (?:x1, \\1|\\1, x1), x0\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[\\2\\]\n+** |\n+**\tmul\t(x[0-9]+), (?:x1, \\1|\\1, x1)\n+**\tst1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, \\3\\]\n+** )\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_x1, svmfloat8x2_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x2 (pn8, x0, x1, z0),\n+\t\t svst1_vnum (pn8, x0, x1, z0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/st1_mf8_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/st1_mf8_x4.c\nnew file mode 100644\nindex 00000000000..5f60757f07b\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/st1_mf8_x4.c\n@@ -0,0 +1,354 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" { target { ! ilp32 } } } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** st1_mf8_base:\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_base, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0, z0),\n+\t\t svst1 (pn8, x0, z0))\n+\n+/*\n+** st1_mf8_index:\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x1\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_index, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0 + x1, z0),\n+\t\t svst1 (pn8, x0 + x1, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_mf8_1:\n+**\tincb\tx0\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_1, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0 + svcntb (), z0),\n+\t\t svst1 (pn8, x0 + svcntb (), z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_mf8_2:\n+**\tincb\tx0, all, mul #2\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_2, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0 + svcntb () * 2, z0),\n+\t\t svst1 (pn8, x0 + svcntb () * 2, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_mf8_3:\n+**\tincb\tx0, all, mul #3\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_3, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0 + svcntb () * 3, z0),\n+\t\t svst1 (pn8, x0 + svcntb () * 3, z0))\n+\n+/*\n+** st1_mf8_4:\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #4, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_4, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0 + svcntb () * 4, z0),\n+\t\t svst1 (pn8, x0 + svcntb () * 4, z0))\n+\n+/*\n+** st1_mf8_28:\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #28, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_28, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0 + svcntb () * 28, z0),\n+\t\t svst1 (pn8, x0 + svcntb () * 28, z0))\n+\n+/*\n+** st1_mf8_32:\n+**\t[^{]*\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_32, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0 + svcntb () * 32, z0),\n+\t\t svst1 (pn8, x0 + svcntb () * 32, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_mf8_m1:\n+**\tdecb\tx0\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_m1, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0 - svcntb (), z0),\n+\t\t svst1 (pn8, x0 - svcntb (), z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_mf8_m2:\n+**\tdecb\tx0, all, mul #2\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_m2, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0 - svcntb () * 2, z0),\n+\t\t svst1 (pn8, x0 - svcntb () * 2, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_mf8_m3:\n+**\tdecb\tx0, all, mul #3\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_m3, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0 - svcntb () * 3, z0),\n+\t\t svst1 (pn8, x0 - svcntb () * 3, z0))\n+\n+/*\n+** st1_mf8_m4:\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #-4, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_m4, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0 - svcntb () * 4, z0),\n+\t\t svst1 (pn8, x0 - svcntb () * 4, z0))\n+\n+/*\n+** st1_mf8_m32:\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #-32, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_m32, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0 - svcntb () * 32, z0),\n+\t\t svst1 (pn8, x0 - svcntb () * 32, z0))\n+\n+/*\n+** st1_mf8_m36:\n+**\t[^{]*\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_m36, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0 - svcntb () * 36, z0),\n+\t\t svst1 (pn8, x0 - svcntb () * 36, z0))\n+\n+/*\n+** st1_mf8_z17:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tst1b\t{z[^\\n]+}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_z17, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0, z17),\n+\t\t svst1 (pn8, x0, z17))\n+\n+/*\n+** st1_mf8_z22:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tst1b\t{z[^\\n]+}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_z22, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0, z22),\n+\t\t svst1 (pn8, x0, z22))\n+\n+/*\n+** st1_mf8_z28:\n+**\tst1b\t{z28\\.b - z31\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_z28, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn8, x0, z28),\n+\t\t svst1 (pn8, x0, z28))\n+\n+/*\n+** st1_mf8_pn0:\n+**\tmov\tp([89]|1[0-5])\\.b, p0\\.b\n+**\tst1b\t{z0\\.b - z3\\.b}, pn\\1, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_pn0, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn0, x0, z0),\n+\t\t svst1 (pn0, x0, z0))\n+\n+/*\n+** st1_mf8_pn7:\n+**\tmov\tp([89]|1[0-5])\\.b, p7\\.b\n+**\tst1b\t{z0\\.b - z3\\.b}, pn\\1, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_pn7, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn7, x0, z0),\n+\t\t svst1 (pn7, x0, z0))\n+\n+/*\n+** st1_mf8_pn15:\n+**\tst1b\t{z0\\.b - z3\\.b}, pn15, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_mf8_pn15, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_mf8_x4 (pn15, x0, z0),\n+\t\t svst1 (pn15, x0, z0))\n+\n+/*\n+** st1_vnum_mf8_0:\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_0, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x4 (pn8, x0, 0, z0),\n+\t\t svst1_vnum (pn8, x0, 0, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_vnum_mf8_1:\n+**\tincb\tx0\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_1, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x4 (pn8, x0, 1, z0),\n+\t\t svst1_vnum (pn8, x0, 1, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_vnum_mf8_2:\n+**\tincb\tx0, all, mul #2\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_2, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x4 (pn8, x0, 2, z0),\n+\t\t svst1_vnum (pn8, x0, 2, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_vnum_mf8_3:\n+**\tincb\tx0, all, mul #3\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_3, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x4 (pn8, x0, 3, z0),\n+\t\t svst1_vnum (pn8, x0, 3, z0))\n+\n+/*\n+** st1_vnum_mf8_4:\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #4, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_4, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x4 (pn8, x0, 4, z0),\n+\t\t svst1_vnum (pn8, x0, 4, z0))\n+\n+/*\n+** st1_vnum_mf8_28:\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #28, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_28, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x4 (pn8, x0, 28, z0),\n+\t\t svst1_vnum (pn8, x0, 28, z0))\n+\n+/*\n+** st1_vnum_mf8_32:\n+**\t[^{]*\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_32, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x4 (pn8, x0, 32, z0),\n+\t\t svst1_vnum (pn8, x0, 32, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_vnum_mf8_m1:\n+**\tdecb\tx0\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_m1, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x4 (pn8, x0, -1, z0),\n+\t\t svst1_vnum (pn8, x0, -1, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_vnum_mf8_m2:\n+**\tdecb\tx0, all, mul #2\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_m2, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x4 (pn8, x0, -2, z0),\n+\t\t svst1_vnum (pn8, x0, -2, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** st1_vnum_mf8_m3:\n+**\tdecb\tx0, all, mul #3\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_m3, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x4 (pn8, x0, -3, z0),\n+\t\t svst1_vnum (pn8, x0, -3, z0))\n+\n+/*\n+** st1_vnum_mf8_m4:\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #-4, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_m4, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x4 (pn8, x0, -4, z0),\n+\t\t svst1_vnum (pn8, x0, -4, z0))\n+\n+/*\n+** st1_vnum_mf8_m32:\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #-32, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_m32, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x4 (pn8, x0, -32, z0),\n+\t\t svst1_vnum (pn8, x0, -32, z0))\n+\n+/*\n+** st1_vnum_mf8_m36:\n+**\t[^{]*\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_m36, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x4 (pn8, x0, -36, z0),\n+\t\t svst1_vnum (pn8, x0, -36, z0))\n+\n+/*\n+** st1_vnum_mf8_x1:\n+**\tcntb\t(x[0-9]+)\n+** (\n+**\tmadd\t(x[0-9]+), (?:x1, \\1|\\1, x1), x0\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[\\2\\]\n+** |\n+**\tmul\t(x[0-9]+), (?:x1, \\1|\\1, x1)\n+**\tst1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, \\3\\]\n+** )\n+**\tret\n+*/\n+TEST_STORE_COUNT (st1_vnum_mf8_x1, svmfloat8x4_t, mfloat8_t,\n+\t\t svst1_vnum_mf8_x4 (pn8, x0, x1, z0),\n+\t\t svst1_vnum (pn8, x0, x1, z0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x2.c\nnew file mode 100644\nindex 00000000000..f9a90fbe9b0\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x2.c\n@@ -0,0 +1,262 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" { target { ! ilp32 } } } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** stnt1_mf8_base:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_base, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0, z0),\n+\t\t svstnt1 (pn8, x0, z0))\n+\n+/*\n+** stnt1_mf8_index:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, x1\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_index, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 + x1, z0),\n+\t\t svstnt1 (pn8, x0 + x1, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_1:\n+**\tincb\tx0\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_1, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 + svcntb (), z0),\n+\t\t svstnt1 (pn8, x0 + svcntb (), z0))\n+\n+/*\n+** stnt1_mf8_2:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #2, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_2, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 + svcntb () * 2, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 2, z0))\n+\n+/*\n+** stnt1_mf8_14:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #14, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_14, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 + svcntb () * 14, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 14, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_16:\n+**\tincb\tx0, all, mul #16\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_16, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 + svcntb () * 16, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 16, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_m1:\n+**\tdecb\tx0\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m1, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 - svcntb (), z0),\n+\t\t svstnt1 (pn8, x0 - svcntb (), z0))\n+\n+/*\n+** stnt1_mf8_m2:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #-2, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m2, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 - svcntb () * 2, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 2, z0))\n+\n+/*\n+** stnt1_mf8_m16:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #-16, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m16, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 - svcntb () * 16, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 16, z0))\n+\n+/*\n+** stnt1_mf8_m18:\n+**\taddvl\t(x[0-9]+), x0, #-18\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[\\1\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m18, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 - svcntb () * 18, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 18, z0))\n+\n+/*\n+** stnt1_mf8_z17:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tstnt1b\t{z[^\\n]+}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_z17, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0, z17),\n+\t\t svstnt1 (pn8, x0, z17))\n+\n+/*\n+** stnt1_mf8_z22:\n+**\tstnt1b\t{z22\\.b(?: - |, )z23\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_z22, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0, z22),\n+\t\t svstnt1 (pn8, x0, z22))\n+\n+/*\n+** stnt1_mf8_z28:\n+**\tstnt1b\t{z28\\.b(?: - |, )z29\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_z28, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0, z28),\n+\t\t svstnt1 (pn8, x0, z28))\n+\n+/*\n+** stnt1_mf8_pn0:\n+**\tmov\tp([89]|1[0-5])\\.b, p0\\.b\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn\\1, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_pn0, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn0, x0, z0),\n+\t\t svstnt1 (pn0, x0, z0))\n+\n+/*\n+** stnt1_mf8_pn7:\n+**\tmov\tp([89]|1[0-5])\\.b, p7\\.b\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn\\1, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_pn7, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn7, x0, z0),\n+\t\t svstnt1 (pn7, x0, z0))\n+\n+/*\n+** stnt1_mf8_pn15:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn15, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_pn15, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn15, x0, z0),\n+\t\t svstnt1 (pn15, x0, z0))\n+\n+/*\n+** stnt1_vnum_mf8_0:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_0, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, 0, z0),\n+\t\t svstnt1_vnum (pn8, x0, 0, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_1:\n+**\tincb\tx0\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_1, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, 1, z0),\n+\t\t svstnt1_vnum (pn8, x0, 1, z0))\n+\n+/*\n+** stnt1_vnum_mf8_2:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #2, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_2, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, 2, z0),\n+\t\t svstnt1_vnum (pn8, x0, 2, z0))\n+\n+/*\n+** stnt1_vnum_mf8_14:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #14, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_14, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, 14, z0),\n+\t\t svstnt1_vnum (pn8, x0, 14, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_16:\n+**\tincb\tx0, all, mul #16\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_16, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, 16, z0),\n+\t\t svstnt1_vnum (pn8, x0, 16, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_m1:\n+**\tdecb\tx0\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m1, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, -1, z0),\n+\t\t svstnt1_vnum (pn8, x0, -1, z0))\n+\n+/*\n+** stnt1_vnum_mf8_m2:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #-2, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m2, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, -2, z0),\n+\t\t svstnt1_vnum (pn8, x0, -2, z0))\n+\n+/*\n+** stnt1_vnum_mf8_m16:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #-16, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m16, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, -16, z0),\n+\t\t svstnt1_vnum (pn8, x0, -16, z0))\n+\n+/*\n+** stnt1_vnum_mf8_m18:\n+**\taddvl\t(x[0-9]+), x0, #-18\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[\\1\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m18, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, -18, z0),\n+\t\t svstnt1_vnum (pn8, x0, -18, z0))\n+\n+/*\n+** stnt1_vnum_mf8_x1:\n+**\tcntb\t(x[0-9]+)\n+** (\n+**\tmadd\t(x[0-9]+), (?:x1, \\1|\\1, x1), x0\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[\\2\\]\n+** |\n+**\tmul\t(x[0-9]+), (?:x1, \\1|\\1, x1)\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, \\3\\]\n+** )\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_x1, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, x1, z0),\n+\t\t svstnt1_vnum (pn8, x0, x1, z0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x4.c\nnew file mode 100644\nindex 00000000000..a204f796982\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x4.c\n@@ -0,0 +1,354 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" { target { ! ilp32 } } } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** stnt1_mf8_base:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_base, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0, z0),\n+\t\t svstnt1 (pn8, x0, z0))\n+\n+/*\n+** stnt1_mf8_index:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x1\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_index, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 + x1, z0),\n+\t\t svstnt1 (pn8, x0 + x1, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_1:\n+**\tincb\tx0\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_1, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 + svcntb (), z0),\n+\t\t svstnt1 (pn8, x0 + svcntb (), z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_2:\n+**\tincb\tx0, all, mul #2\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_2, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 + svcntb () * 2, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 2, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_3:\n+**\tincb\tx0, all, mul #3\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_3, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 + svcntb () * 3, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 3, z0))\n+\n+/*\n+** stnt1_mf8_4:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #4, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_4, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 + svcntb () * 4, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 4, z0))\n+\n+/*\n+** stnt1_mf8_28:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #28, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_28, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 + svcntb () * 28, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 28, z0))\n+\n+/*\n+** stnt1_mf8_32:\n+**\t[^{]*\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_32, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 + svcntb () * 32, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 32, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_m1:\n+**\tdecb\tx0\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m1, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 - svcntb (), z0),\n+\t\t svstnt1 (pn8, x0 - svcntb (), z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_m2:\n+**\tdecb\tx0, all, mul #2\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m2, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 - svcntb () * 2, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 2, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_m3:\n+**\tdecb\tx0, all, mul #3\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m3, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 - svcntb () * 3, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 3, z0))\n+\n+/*\n+** stnt1_mf8_m4:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #-4, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m4, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 - svcntb () * 4, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 4, z0))\n+\n+/*\n+** stnt1_mf8_m32:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #-32, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m32, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 - svcntb () * 32, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 32, z0))\n+\n+/*\n+** stnt1_mf8_m36:\n+**\t[^{]*\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m36, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 - svcntb () * 36, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 36, z0))\n+\n+/*\n+** stnt1_mf8_z17:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tstnt1b\t{z[^\\n]+}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_z17, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0, z17),\n+\t\t svstnt1 (pn8, x0, z17))\n+\n+/*\n+** stnt1_mf8_z22:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tstnt1b\t{z[^\\n]+}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_z22, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0, z22),\n+\t\t svstnt1 (pn8, x0, z22))\n+\n+/*\n+** stnt1_mf8_z28:\n+**\tstnt1b\t{z28\\.b - z31\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_z28, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0, z28),\n+\t\t svstnt1 (pn8, x0, z28))\n+\n+/*\n+** stnt1_mf8_pn0:\n+**\tmov\tp([89]|1[0-5])\\.b, p0\\.b\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn\\1, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_pn0, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn0, x0, z0),\n+\t\t svstnt1 (pn0, x0, z0))\n+\n+/*\n+** stnt1_mf8_pn7:\n+**\tmov\tp([89]|1[0-5])\\.b, p7\\.b\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn\\1, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_pn7, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn7, x0, z0),\n+\t\t svstnt1 (pn7, x0, z0))\n+\n+/*\n+** stnt1_mf8_pn15:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn15, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_pn15, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn15, x0, z0),\n+\t\t svstnt1 (pn15, x0, z0))\n+\n+/*\n+** stnt1_vnum_mf8_0:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_0, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, 0, z0),\n+\t\t svstnt1_vnum (pn8, x0, 0, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_1:\n+**\tincb\tx0\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_1, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, 1, z0),\n+\t\t svstnt1_vnum (pn8, x0, 1, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_2:\n+**\tincb\tx0, all, mul #2\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_2, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, 2, z0),\n+\t\t svstnt1_vnum (pn8, x0, 2, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_3:\n+**\tincb\tx0, all, mul #3\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_3, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, 3, z0),\n+\t\t svstnt1_vnum (pn8, x0, 3, z0))\n+\n+/*\n+** stnt1_vnum_mf8_4:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #4, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_4, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, 4, z0),\n+\t\t svstnt1_vnum (pn8, x0, 4, z0))\n+\n+/*\n+** stnt1_vnum_mf8_28:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #28, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_28, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, 28, z0),\n+\t\t svstnt1_vnum (pn8, x0, 28, z0))\n+\n+/*\n+** stnt1_vnum_mf8_32:\n+**\t[^{]*\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_32, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, 32, z0),\n+\t\t svstnt1_vnum (pn8, x0, 32, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_m1:\n+**\tdecb\tx0\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m1, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, -1, z0),\n+\t\t svstnt1_vnum (pn8, x0, -1, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_m2:\n+**\tdecb\tx0, all, mul #2\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m2, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, -2, z0),\n+\t\t svstnt1_vnum (pn8, x0, -2, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_m3:\n+**\tdecb\tx0, all, mul #3\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m3, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, -3, z0),\n+\t\t svstnt1_vnum (pn8, x0, -3, z0))\n+\n+/*\n+** stnt1_vnum_mf8_m4:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #-4, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m4, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, -4, z0),\n+\t\t svstnt1_vnum (pn8, x0, -4, z0))\n+\n+/*\n+** stnt1_vnum_mf8_m32:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #-32, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m32, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, -32, z0),\n+\t\t svstnt1_vnum (pn8, x0, -32, z0))\n+\n+/*\n+** stnt1_vnum_mf8_m36:\n+**\t[^{]*\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m36, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, -36, z0),\n+\t\t svstnt1_vnum (pn8, x0, -36, z0))\n+\n+/*\n+** stnt1_vnum_mf8_x1:\n+**\tcntb\t(x[0-9]+)\n+** (\n+**\tmadd\t(x[0-9]+), (?:x1, \\1|\\1, x1), x0\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[\\2\\]\n+** |\n+**\tmul\t(x[0-9]+), (?:x1, \\1|\\1, x1)\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, \\3\\]\n+** )\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_x1, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, x1, z0),\n+\t\t svstnt1_vnum (pn8, x0, x1, z0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x2.c\nnew file mode 100644\nindex 00000000000..f107b4c7a18\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x2.c\n@@ -0,0 +1,77 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** uzp_z0_z0:\n+**\tuzp\t{z0\\.b - z1\\.b}, z0\\.b, z1\\.b\n+**\tret\n+*/\n+TEST_XN (uzp_z0_z0, svmfloat8x2_t, z0,\n+\t svuzp_mf8_x2 (z0),\n+\t svuzp (z0))\n+\n+/*\n+** uzp_z0_z4:\n+**\tuzp\t{z0\\.b - z1\\.b}, z4\\.b, z5\\.b\n+**\tret\n+*/\n+TEST_XN (uzp_z0_z4, svmfloat8x2_t, z0,\n+\t svuzp_mf8_x2 (z4),\n+\t svuzp (z4))\n+\n+/*\n+** uzp_z4_z18:\n+**\tuzp\t{z4\\.b - z5\\.b}, z18\\.b, z19\\.b\n+**\tret\n+*/\n+TEST_XN (uzp_z4_z18, svmfloat8x2_t, z4,\n+\t svuzp_mf8_x2 (z18),\n+\t svuzp (z18))\n+\n+/*\n+** uzp_z18_z23:\n+**\tuzp\t{z18\\.b - z19\\.b}, z23\\.b, z24\\.b\n+**\tret\n+*/\n+TEST_XN (uzp_z18_z23, svmfloat8x2_t, z18,\n+\t svuzp_mf8_x2 (z23),\n+\t svuzp (z23))\n+\n+/*\n+** uzp_z23_z28:\n+**\tuzp\t[^\\n]+, z28\\.b, z29\\.b\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (uzp_z23_z28, svmfloat8x2_t, z23,\n+\t svuzp_mf8_x2 (z28),\n+\t svuzp (z28))\n+\n+/*\n+** uzp_z28_z0:\n+**\tuzp\t{z28\\.b - z29\\.b}, z0\\.b, z1\\.b\n+**\tret\n+*/\n+TEST_XN (uzp_z28_z0, svmfloat8x2_t, z28,\n+\t svuzp_mf8_x2 (z0),\n+\t svuzp (z0))\n+\n+/*\n+** uzp_z28_z0_z23:\t{ xfail aarch64_big_endian }\n+**\tuzp\t{z28\\.b - z29\\.b}, z0\\.b, z23\\.b\n+**\tret\n+*/\n+TEST_XN (uzp_z28_z0_z23, svmfloat8x2_t, z28,\n+\t svuzp_mf8_x2 (svcreate2 (svget2 (z0, 0), svget2 (z23, 0))),\n+\t svuzp (svcreate2 (svget2 (z0, 0), svget2 (z23, 0))))\n+\n+/*\n+** uzp_z28_z5_z19:\n+**\tuzp\t{z28\\.b - z29\\.b}, z5\\.b, z19\\.b\n+**\tret\n+*/\n+TEST_XN (uzp_z28_z5_z19, svmfloat8x2_t, z28,\n+\t svuzp_mf8_x2 (svcreate2 (svget2 (z4, 1), svget2 (z18, 1))),\n+\t svuzp (svcreate2 (svget2 (z4, 1), svget2 (z18, 1))))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x4.c\nnew file mode 100644\nindex 00000000000..bbaf26c85a5\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x4.c\n@@ -0,0 +1,73 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** uzp_z0_z0:\n+**\tuzp\t{z0\\.b - z3\\.b}, {z0\\.b - z3\\.b}\n+**\tret\n+*/\n+TEST_XN (uzp_z0_z0, svmfloat8x4_t, z0,\n+\t svuzp_mf8_x4 (z0),\n+\t svuzp (z0))\n+\n+/*\n+** uzp_z0_z4:\n+**\tuzp\t{z0\\.b - z3\\.b}, {z4\\.b - z7\\.b}\n+**\tret\n+*/\n+TEST_XN (uzp_z0_z4, svmfloat8x4_t, z0,\n+\t svuzp_mf8_x4 (z4),\n+\t svuzp (z4))\n+\n+/*\n+** uzp_z4_z18:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tuzp\t{z4\\.b - z7\\.b}, [^\\n]+\n+**\tret\n+*/\n+TEST_XN (uzp_z4_z18, svmfloat8x4_t, z4,\n+\t svuzp_mf8_x4 (z18),\n+\t svuzp (z18))\n+\n+/*\n+** uzp_z18_z23:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tuzp\t{z[^\\n]+}, {z[^\\n]+}\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (uzp_z18_z23, svmfloat8x4_t, z18,\n+\t svuzp_mf8_x4 (z23),\n+\t svuzp (z23))\n+\n+/*\n+** uzp_z23_z28:\n+**\tuzp\t[^\\n]+, {z28\\.b - z31\\.b}\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (uzp_z23_z28, svmfloat8x4_t, z23,\n+\t svuzp_mf8_x4 (z28),\n+\t svuzp (z28))\n+\n+/*\n+** uzp_z28_z0:\n+**\tuzp\t{z28\\.b - z31\\.b}, {z0\\.b - z3\\.b}\n+**\tret\n+*/\n+TEST_XN (uzp_z28_z0, svmfloat8x4_t, z28,\n+\t svuzp_mf8_x4 (z0),\n+\t svuzp (z0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x2.c\nnew file mode 100644\nindex 00000000000..cef514c46e8\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x2.c\n@@ -0,0 +1,77 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** uzpq_z0_z0:\n+**\tuzp\t{z0\\.q - z1\\.q}, z0\\.q, z1\\.q\n+**\tret\n+*/\n+TEST_XN (uzpq_z0_z0, svmfloat8x2_t, z0,\n+\t svuzpq_mf8_x2 (z0),\n+\t svuzpq (z0))\n+\n+/*\n+** uzpq_z0_z4:\n+**\tuzp\t{z0\\.q - z1\\.q}, z4\\.q, z5\\.q\n+**\tret\n+*/\n+TEST_XN (uzpq_z0_z4, svmfloat8x2_t, z0,\n+\t svuzpq_mf8_x2 (z4),\n+\t svuzpq (z4))\n+\n+/*\n+** uzpq_z4_z18:\n+**\tuzp\t{z4\\.q - z5\\.q}, z18\\.q, z19\\.q\n+**\tret\n+*/\n+TEST_XN (uzpq_z4_z18, svmfloat8x2_t, z4,\n+\t svuzpq_mf8_x2 (z18),\n+\t svuzpq (z18))\n+\n+/*\n+** uzpq_z18_z23:\n+**\tuzp\t{z18\\.q - z19\\.q}, z23\\.q, z24\\.q\n+**\tret\n+*/\n+TEST_XN (uzpq_z18_z23, svmfloat8x2_t, z18,\n+\t svuzpq_mf8_x2 (z23),\n+\t svuzpq (z23))\n+\n+/*\n+** uzpq_z23_z28:\n+**\tuzp\t[^\\n]+, z28\\.q, z29\\.q\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (uzpq_z23_z28, svmfloat8x2_t, z23,\n+\t svuzpq_mf8_x2 (z28),\n+\t svuzpq (z28))\n+\n+/*\n+** uzpq_z28_z0:\n+**\tuzp\t{z28\\.q - z29\\.q}, z0\\.q, z1\\.q\n+**\tret\n+*/\n+TEST_XN (uzpq_z28_z0, svmfloat8x2_t, z28,\n+\t svuzpq_mf8_x2 (z0),\n+\t svuzpq (z0))\n+\n+/*\n+** uzpq_z28_z0_z23:\t{ xfail aarch64_big_endian }\n+**\tuzp\t{z28\\.q - z29\\.q}, z0\\.q, z23\\.q\n+**\tret\n+*/\n+TEST_XN (uzpq_z28_z0_z23, svmfloat8x2_t, z28,\n+\t svuzpq_mf8_x2 (svcreate2 (svget2 (z0, 0), svget2 (z23, 0))),\n+\t svuzpq (svcreate2 (svget2 (z0, 0), svget2 (z23, 0))))\n+\n+/*\n+** uzpq_z28_z5_z19:\n+**\tuzp\t{z28\\.q - z29\\.q}, z5\\.q, z19\\.q\n+**\tret\n+*/\n+TEST_XN (uzpq_z28_z5_z19, svmfloat8x2_t, z28,\n+\t svuzpq_mf8_x2 (svcreate2 (svget2 (z4, 1), svget2 (z18, 1))),\n+\t svuzpq (svcreate2 (svget2 (z4, 1), svget2 (z18, 1))))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x4.c\nnew file mode 100644\nindex 00000000000..6b348c95f83\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x4.c\n@@ -0,0 +1,73 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** uzpq_z0_z0:\n+**\tuzp\t{z0\\.q - z3\\.q}, {z0\\.q - z3\\.q}\n+**\tret\n+*/\n+TEST_XN (uzpq_z0_z0, svmfloat8x4_t, z0,\n+\t svuzpq_mf8_x4 (z0),\n+\t svuzpq (z0))\n+\n+/*\n+** uzpq_z0_z4:\n+**\tuzp\t{z0\\.q - z3\\.q}, {z4\\.q - z7\\.q}\n+**\tret\n+*/\n+TEST_XN (uzpq_z0_z4, svmfloat8x4_t, z0,\n+\t svuzpq_mf8_x4 (z4),\n+\t svuzpq (z4))\n+\n+/*\n+** uzpq_z4_z18:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tuzp\t{z4\\.q - z7\\.q}, [^\\n]+\n+**\tret\n+*/\n+TEST_XN (uzpq_z4_z18, svmfloat8x4_t, z4,\n+\t svuzpq_mf8_x4 (z18),\n+\t svuzpq (z18))\n+\n+/*\n+** uzpq_z18_z23:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tuzp\t{z[^\\n]+}, {z[^\\n]+}\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (uzpq_z18_z23, svmfloat8x4_t, z18,\n+\t svuzpq_mf8_x4 (z23),\n+\t svuzpq (z23))\n+\n+/*\n+** uzpq_z23_z28:\n+**\tuzp\t[^\\n]+, {z28\\.q - z31\\.q}\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (uzpq_z23_z28, svmfloat8x4_t, z23,\n+\t svuzpq_mf8_x4 (z28),\n+\t svuzpq (z28))\n+\n+/*\n+** uzpq_z28_z0:\n+**\tuzp\t{z28\\.q - z31\\.q}, {z0\\.q - z3\\.q}\n+**\tret\n+*/\n+TEST_XN (uzpq_z28_z0, svmfloat8x4_t, z28,\n+\t svuzpq_mf8_x4 (z0),\n+\t svuzpq (z0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_hor_za8_vg2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_hor_za8_vg2.c\nindex a2af846b60b..8df504cb423 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_hor_za8_vg2.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_hor_za8_vg2.c\n@@ -22,6 +22,16 @@ TEST_ZA_XN (write_za8_u8_z4_0_1, svuint8x2_t,\n \t svwrite_hor_za8_u8_vg2 (0, 1, z4),\n \t svwrite_hor_za8_u8_vg2 (0, 1, z4))\n \n+/*\n+** write_za8_mf8_z4_0_1:\n+**\tmov\t(w1[2-5]), #?1\n+**\tmova\tza0h\\.b\\[\\1, 0:1\\], {z4\\.b - z5\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_1, svmfloat8x2_t,\n+\t svwrite_hor_za8_mf8_vg2 (0, 1, z4),\n+\t svwrite_hor_za8_mf8_vg2 (0, 1, z4))\n+\n /*\n ** write_za8_s8_z28_0_w11:\n **\tmov\t(w1[2-5]), w11\n@@ -50,6 +60,15 @@ TEST_ZA_XN (write_za8_u8_z18_0_w15, svuint8x2_t,\n \t svwrite_hor_za8_u8_vg2 (0, w15, z18),\n \t svwrite_hor_za8_u8_vg2 (0, w15, z18))\n \n+/*\n+** write_za8_mf8_z18_0_w15:\n+**\tmova\tza0h\\.b\\[w15, 0:1\\], {z18\\.b - z19\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z18_0_w15, svmfloat8x2_t,\n+\t svwrite_hor_za8_mf8_vg2 (0, w15, z18),\n+\t svwrite_hor_za8_mf8_vg2 (0, w15, z18))\n+\n /*\n ** write_za8_s8_z23_0_w12p14:\n **\tmov\t[^\\n]+\n@@ -71,6 +90,16 @@ TEST_ZA_XN (write_za8_u8_z4_0_w12p1, svuint8x2_t,\n \t svwrite_hor_za8_u8_vg2 (0, w12 + 1, z4),\n \t svwrite_hor_za8_u8_vg2 (0, w12 + 1, z4))\n \n+/*\n+** write_za8_mf8_z4_0_w12p1:\n+**\tadd\t(w[0-9]+), w12, #?1\n+**\tmova\tza0h\\.b\\[\\1, 0:1\\], {z4\\.b - z5\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_w12p1, svmfloat8x2_t,\n+\t svwrite_hor_za8_mf8_vg2 (0, w12 + 1, z4),\n+\t svwrite_hor_za8_mf8_vg2 (0, w12 + 1, z4))\n+\n /*\n ** write_za8_s8_z28_0_w12p2:\n **\tmova\tza0h\\.b\\[w12, 2:3\\], {z28\\.b - z29\\.b}\n@@ -90,6 +119,16 @@ TEST_ZA_XN (write_za8_u8_z0_0_w15p3, svuint8x2_t,\n \t svwrite_hor_za8_u8_vg2 (0, w15 + 3, z0),\n \t svwrite_hor_za8_u8_vg2 (0, w15 + 3, z0))\n \n+/*\n+** write_za8_mf8_z0_0_w15p3:\n+**\tadd\t(w[0-9]+), w15, #?3\n+**\tmova\tza0h\\.b\\[\\1, 0:1\\], {z0\\.b - z1\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z0_0_w15p3, svmfloat8x2_t,\n+\t svwrite_hor_za8_mf8_vg2 (0, w15 + 3, z0),\n+\t svwrite_hor_za8_mf8_vg2 (0, w15 + 3, z0))\n+\n /*\n ** write_za8_u8_z4_0_w15p12:\n **\tmova\tza0h\\.b\\[w15, 12:13\\], {z4\\.b - z5\\.b}\n@@ -99,6 +138,15 @@ TEST_ZA_XN (write_za8_u8_z4_0_w15p12, svuint8x2_t,\n \t svwrite_hor_za8_u8_vg2 (0, w15 + 12, z4),\n \t svwrite_hor_za8_u8_vg2 (0, w15 + 12, z4))\n \n+/*\n+** write_za8_mf8_z4_0_w15p12:\n+**\tmova\tza0h\\.b\\[w15, 12:13\\], {z4\\.b - z5\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_w15p12, svmfloat8x2_t,\n+\t svwrite_hor_za8_mf8_vg2 (0, w15 + 12, z4),\n+\t svwrite_hor_za8_mf8_vg2 (0, w15 + 12, z4))\n+\n /*\n ** write_za8_u8_z28_0_w12p15:\n **\tadd\t(w[0-9]+), w12, #?15\n@@ -109,6 +157,16 @@ TEST_ZA_XN (write_za8_u8_z28_0_w12p15, svuint8x2_t,\n \t svwrite_hor_za8_u8_vg2 (0, w12 + 15, z28),\n \t svwrite_hor_za8_u8_vg2 (0, w12 + 15, z28))\n \n+/*\n+** write_za8_mf8_z28_0_w12p15:\n+**\tadd\t(w[0-9]+), w12, #?15\n+**\tmova\tza0h\\.b\\[\\1, 0:1\\], {z28\\.b - z29\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z28_0_w12p15, svmfloat8x2_t,\n+\t svwrite_hor_za8_mf8_vg2 (0, w12 + 15, z28),\n+\t svwrite_hor_za8_mf8_vg2 (0, w12 + 15, z28))\n+\n /*\n ** write_za8_s8_z0_0_w15p16:\n **\tadd\t(w[0-9]+), w15, #?16\n@@ -129,6 +187,16 @@ TEST_ZA_XN (write_za8_u8_z4_0_w12m1, svuint8x2_t,\n \t svwrite_hor_za8_u8_vg2 (0, w12 - 1, z4),\n \t svwrite_hor_za8_u8_vg2 (0, w12 - 1, z4))\n \n+/*\n+** write_za8_mf8_z4_0_w12m1:\n+**\tsub\t(w[0-9]+), w12, #?1\n+**\tmova\tza0h\\.b\\[\\1, 0:1\\], {z4\\.b - z5\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_w12m1, svmfloat8x2_t,\n+\t svwrite_hor_za8_mf8_vg2 (0, w12 - 1, z4),\n+\t svwrite_hor_za8_mf8_vg2 (0, w12 - 1, z4))\n+\n /*\n ** write_za8_u8_z18_0_w16:\n **\tmov\t(w1[2-5]), w16\n@@ -138,3 +206,13 @@ TEST_ZA_XN (write_za8_u8_z4_0_w12m1, svuint8x2_t,\n TEST_ZA_XN (write_za8_u8_z18_0_w16, svuint8x2_t,\n \t svwrite_hor_za8_u8_vg2 (0, w16, z18),\n \t svwrite_hor_za8_u8_vg2 (0, w16, z18))\n+\n+/*\n+** write_za8_mf8_z18_0_w16:\n+**\tmov\t(w1[2-5]), w16\n+**\tmova\tza0h\\.b\\[\\1, 0:1\\], {z18\\.b - z19\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z18_0_w16, svmfloat8x2_t,\n+\t svwrite_hor_za8_mf8_vg2 (0, w16, z18),\n+\t svwrite_hor_za8_mf8_vg2 (0, w16, z18))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_hor_za8_vg4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_hor_za8_vg4.c\nindex e333ce699e3..70a2e95db96 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_hor_za8_vg4.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_hor_za8_vg4.c\n@@ -22,6 +22,16 @@ TEST_ZA_XN (write_za8_u8_z4_0_1, svuint8x4_t,\n \t svwrite_hor_za8_u8_vg4 (0, 1, z4),\n \t svwrite_hor_za8_u8_vg4 (0, 1, z4))\n \n+/*\n+** write_za8_mf8_z4_0_1:\n+**\tmov\t(w1[2-5]), #?1\n+**\tmova\tza0h\\.b\\[\\1, 0:3\\], {z4\\.b - z7\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_1, svmfloat8x4_t,\n+\t svwrite_hor_za8_mf8_vg4 (0, 1, z4),\n+\t svwrite_hor_za8_mf8_vg4 (0, 1, z4))\n+\n /*\n ** write_za8_s8_z28_0_w11:\n **\tmov\t(w1[2-5]), w11\n@@ -54,6 +64,19 @@ TEST_ZA_XN (write_za8_u8_z18_0_w15, svuint8x4_t,\n \t svwrite_hor_za8_u8_vg4 (0, w15, z18),\n \t svwrite_hor_za8_u8_vg4 (0, w15, z18))\n \n+/*\n+** write_za8_mf8_z18_0_w15:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmova\tza0h\\.b\\[w15, 0:3\\], {[^\\n]+}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z18_0_w15, svmfloat8x4_t,\n+\t svwrite_hor_za8_mf8_vg4 (0, w15, z18),\n+\t svwrite_hor_za8_mf8_vg4 (0, w15, z18))\n+\n /*\n ** write_za8_s8_z23_0_w12p12:\n **\tmov\t[^\\n]+\n@@ -77,6 +100,16 @@ TEST_ZA_XN (write_za8_u8_z4_0_w12p1, svuint8x4_t,\n \t svwrite_hor_za8_u8_vg4 (0, w12 + 1, z4),\n \t svwrite_hor_za8_u8_vg4 (0, w12 + 1, z4))\n \n+/*\n+** write_za8_mf8_z4_0_w12p1:\n+**\tadd\t(w[0-9]+), w12, #?1\n+**\tmova\tza0h\\.b\\[\\1, 0:3\\], {z4\\.b - z7\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_w12p1, svmfloat8x4_t,\n+\t svwrite_hor_za8_mf8_vg4 (0, w12 + 1, z4),\n+\t svwrite_hor_za8_mf8_vg4 (0, w12 + 1, z4))\n+\n /*\n ** write_za8_s8_z28_0_w12p2:\n **\tadd\t(w[0-9]+), w12, #?2\n@@ -97,6 +130,16 @@ TEST_ZA_XN (write_za8_u8_z0_0_w15p3, svuint8x4_t,\n \t svwrite_hor_za8_u8_vg4 (0, w15 + 3, z0),\n \t svwrite_hor_za8_u8_vg4 (0, w15 + 3, z0))\n \n+/*\n+** write_za8_mf8_z0_0_w15p3:\n+**\tadd\t(w[0-9]+), w15, #?3\n+**\tmova\tza0h\\.b\\[\\1, 0:3\\], {z0\\.b - z3\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z0_0_w15p3, svmfloat8x4_t,\n+\t svwrite_hor_za8_mf8_vg4 (0, w15 + 3, z0),\n+\t svwrite_hor_za8_mf8_vg4 (0, w15 + 3, z0))\n+\n /*\n ** write_za8_u8_z0_0_w12p4:\n **\tmova\tza0h\\.b\\[w12, 4:7\\], {z0\\.b - z3\\.b}\n@@ -106,6 +149,15 @@ TEST_ZA_XN (write_za8_u8_z0_0_w12p4, svuint8x4_t,\n \t svwrite_hor_za8_u8_vg4 (0, w12 + 4, z0),\n \t svwrite_hor_za8_u8_vg4 (0, w12 + 4, z0))\n \n+/*\n+** write_za8_mf8_z0_0_w12p4:\n+**\tmova\tza0h\\.b\\[w12, 4:7\\], {z0\\.b - z3\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z0_0_w12p4, svmfloat8x4_t,\n+\t svwrite_hor_za8_mf8_vg4 (0, w12 + 4, z0),\n+\t svwrite_hor_za8_mf8_vg4 (0, w12 + 4, z0))\n+\n /*\n ** write_za8_u8_z4_0_w15p12:\n **\tmova\tza0h\\.b\\[w15, 12:15\\], {z4\\.b - z7\\.b}\n@@ -115,6 +167,15 @@ TEST_ZA_XN (write_za8_u8_z4_0_w15p12, svuint8x4_t,\n \t svwrite_hor_za8_u8_vg4 (0, w15 + 12, z4),\n \t svwrite_hor_za8_u8_vg4 (0, w15 + 12, z4))\n \n+/*\n+** write_za8_mf8_z4_0_w15p12:\n+**\tmova\tza0h\\.b\\[w15, 12:15\\], {z4\\.b - z7\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_w15p12, svmfloat8x4_t,\n+\t svwrite_hor_za8_mf8_vg4 (0, w15 + 12, z4),\n+\t svwrite_hor_za8_mf8_vg4 (0, w15 + 12, z4))\n+\n /*\n ** write_za8_u8_z28_0_w12p14:\n **\tadd\t(w[0-9]+), w12, #?14\n@@ -125,6 +186,16 @@ TEST_ZA_XN (write_za8_u8_z28_0_w12p14, svuint8x4_t,\n \t svwrite_hor_za8_u8_vg4 (0, w12 + 14, z28),\n \t svwrite_hor_za8_u8_vg4 (0, w12 + 14, z28))\n \n+/*\n+** write_za8_mf8_z28_0_w12p14:\n+**\tadd\t(w[0-9]+), w12, #?14\n+**\tmova\tza0h\\.b\\[\\1, 0:3\\], {z28\\.b - z31\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z28_0_w12p14, svmfloat8x4_t,\n+\t svwrite_hor_za8_mf8_vg4 (0, w12 + 14, z28),\n+\t svwrite_hor_za8_mf8_vg4 (0, w12 + 14, z28))\n+\n /*\n ** write_za8_s8_z0_0_w15p16:\n **\tadd\t(w[0-9]+), w15, #?16\n@@ -145,6 +216,16 @@ TEST_ZA_XN (write_za8_u8_z4_0_w12m1, svuint8x4_t,\n \t svwrite_hor_za8_u8_vg4 (0, w12 - 1, z4),\n \t svwrite_hor_za8_u8_vg4 (0, w12 - 1, z4))\n \n+/*\n+** write_za8_mf8_z4_0_w12m1:\n+**\tsub\t(w[0-9]+), w12, #?1\n+**\tmova\tza0h\\.b\\[\\1, 0:3\\], {z4\\.b - z7\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_w12m1, svmfloat8x4_t,\n+\t svwrite_hor_za8_mf8_vg4 (0, w12 - 1, z4),\n+\t svwrite_hor_za8_mf8_vg4 (0, w12 - 1, z4))\n+\n /*\n ** write_za8_u8_z28_0_w16:\n **\tmov\t(w1[2-5]), w16\n@@ -154,3 +235,13 @@ TEST_ZA_XN (write_za8_u8_z4_0_w12m1, svuint8x4_t,\n TEST_ZA_XN (write_za8_u8_z28_0_w16, svuint8x4_t,\n \t svwrite_hor_za8_u8_vg4 (0, w16, z28),\n \t svwrite_hor_za8_u8_vg4 (0, w16, z28))\n+\n+/*\n+** write_za8_mf8_z28_0_w16:\n+**\tmov\t(w1[2-5]), w16\n+**\tmova\tza0h\\.b\\[\\1, 0:3\\], {z28\\.b - z31\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z28_0_w16, svmfloat8x4_t,\n+\t svwrite_hor_za8_mf8_vg4 (0, w16, z28),\n+\t svwrite_hor_za8_mf8_vg4 (0, w16, z28))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_ver_za8_vg2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_ver_za8_vg2.c\nindex ce3dbdd8729..a576b753301 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_ver_za8_vg2.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_ver_za8_vg2.c\n@@ -22,6 +22,16 @@ TEST_ZA_XN (write_za8_u8_z4_0_1, svuint8x2_t,\n \t svwrite_ver_za8_u8_vg2 (0, 1, z4),\n \t svwrite_ver_za8_u8_vg2 (0, 1, z4))\n \n+/*\n+** write_za8_mf8_z4_0_1:\n+**\tmov\t(w1[2-5]), #?1\n+**\tmova\tza0v\\.b\\[\\1, 0:1\\], {z4\\.b - z5\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_1, svmfloat8x2_t,\n+\t svwrite_ver_za8_mf8_vg2 (0, 1, z4),\n+\t svwrite_ver_za8_mf8_vg2 (0, 1, z4))\n+\n /*\n ** write_za8_s8_z28_0_w11:\n **\tmov\t(w1[2-5]), w11\n@@ -50,6 +60,15 @@ TEST_ZA_XN (write_za8_u8_z18_0_w15, svuint8x2_t,\n \t svwrite_ver_za8_u8_vg2 (0, w15, z18),\n \t svwrite_ver_za8_u8_vg2 (0, w15, z18))\n \n+/*\n+** write_za8_mf8_z18_0_w15:\n+**\tmova\tza0v\\.b\\[w15, 0:1\\], {z18\\.b - z19\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z18_0_w15, svmfloat8x2_t,\n+\t svwrite_ver_za8_mf8_vg2 (0, w15, z18),\n+\t svwrite_ver_za8_mf8_vg2 (0, w15, z18))\n+\n /*\n ** write_za8_s8_z23_0_w12p14:\n **\tmov\t[^\\n]+\n@@ -71,6 +90,16 @@ TEST_ZA_XN (write_za8_u8_z4_0_w12p1, svuint8x2_t,\n \t svwrite_ver_za8_u8_vg2 (0, w12 + 1, z4),\n \t svwrite_ver_za8_u8_vg2 (0, w12 + 1, z4))\n \n+/*\n+** write_za8_mf8_z4_0_w12p1:\n+**\tadd\t(w[0-9]+), w12, #?1\n+**\tmova\tza0v\\.b\\[\\1, 0:1\\], {z4\\.b - z5\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_w12p1, svmfloat8x2_t,\n+\t svwrite_ver_za8_mf8_vg2 (0, w12 + 1, z4),\n+\t svwrite_ver_za8_mf8_vg2 (0, w12 + 1, z4))\n+\n /*\n ** write_za8_s8_z28_0_w12p2:\n **\tmova\tza0v\\.b\\[w12, 2:3\\], {z28\\.b - z29\\.b}\n@@ -90,6 +119,16 @@ TEST_ZA_XN (write_za8_u8_z0_0_w15p3, svuint8x2_t,\n \t svwrite_ver_za8_u8_vg2 (0, w15 + 3, z0),\n \t svwrite_ver_za8_u8_vg2 (0, w15 + 3, z0))\n \n+/*\n+** write_za8_mf8_z0_0_w15p3:\n+**\tadd\t(w[0-9]+), w15, #?3\n+**\tmova\tza0v\\.b\\[\\1, 0:1\\], {z0\\.b - z1\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z0_0_w15p3, svmfloat8x2_t,\n+\t svwrite_ver_za8_mf8_vg2 (0, w15 + 3, z0),\n+\t svwrite_ver_za8_mf8_vg2 (0, w15 + 3, z0))\n+\n /*\n ** write_za8_u8_z4_0_w15p12:\n **\tmova\tza0v\\.b\\[w15, 12:13\\], {z4\\.b - z5\\.b}\n@@ -99,6 +138,15 @@ TEST_ZA_XN (write_za8_u8_z4_0_w15p12, svuint8x2_t,\n \t svwrite_ver_za8_u8_vg2 (0, w15 + 12, z4),\n \t svwrite_ver_za8_u8_vg2 (0, w15 + 12, z4))\n \n+/*\n+** write_za8_mf8_z4_0_w15p12:\n+**\tmova\tza0v\\.b\\[w15, 12:13\\], {z4\\.b - z5\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_w15p12, svmfloat8x2_t,\n+\t svwrite_ver_za8_mf8_vg2 (0, w15 + 12, z4),\n+\t svwrite_ver_za8_mf8_vg2 (0, w15 + 12, z4))\n+\n /*\n ** write_za8_u8_z28_0_w12p15:\n **\tadd\t(w[0-9]+), w12, #?15\n@@ -109,6 +157,16 @@ TEST_ZA_XN (write_za8_u8_z28_0_w12p15, svuint8x2_t,\n \t svwrite_ver_za8_u8_vg2 (0, w12 + 15, z28),\n \t svwrite_ver_za8_u8_vg2 (0, w12 + 15, z28))\n \n+/*\n+** write_za8_mf8_z28_0_w12p15:\n+**\tadd\t(w[0-9]+), w12, #?15\n+**\tmova\tza0v\\.b\\[\\1, 0:1\\], {z28\\.b - z29\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z28_0_w12p15, svmfloat8x2_t,\n+\t svwrite_ver_za8_mf8_vg2 (0, w12 + 15, z28),\n+\t svwrite_ver_za8_mf8_vg2 (0, w12 + 15, z28))\n+\n /*\n ** write_za8_s8_z0_0_w15p16:\n **\tadd\t(w[0-9]+), w15, #?16\n@@ -129,6 +187,16 @@ TEST_ZA_XN (write_za8_u8_z4_0_w12m1, svuint8x2_t,\n \t svwrite_ver_za8_u8_vg2 (0, w12 - 1, z4),\n \t svwrite_ver_za8_u8_vg2 (0, w12 - 1, z4))\n \n+/*\n+** write_za8_mf8_z4_0_w12m1:\n+**\tsub\t(w[0-9]+), w12, #?1\n+**\tmova\tza0v\\.b\\[\\1, 0:1\\], {z4\\.b - z5\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_w12m1, svmfloat8x2_t,\n+\t svwrite_ver_za8_mf8_vg2 (0, w12 - 1, z4),\n+\t svwrite_ver_za8_mf8_vg2 (0, w12 - 1, z4))\n+\n /*\n ** write_za8_u8_z18_0_w16:\n **\tmov\t(w1[2-5]), w16\n@@ -138,3 +206,13 @@ TEST_ZA_XN (write_za8_u8_z4_0_w12m1, svuint8x2_t,\n TEST_ZA_XN (write_za8_u8_z18_0_w16, svuint8x2_t,\n \t svwrite_ver_za8_u8_vg2 (0, w16, z18),\n \t svwrite_ver_za8_u8_vg2 (0, w16, z18))\n+\n+/*\n+** write_za8_mf8_z18_0_w16:\n+**\tmov\t(w1[2-5]), w16\n+**\tmova\tza0v\\.b\\[\\1, 0:1\\], {z18\\.b - z19\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z18_0_w16, svmfloat8x2_t,\n+\t svwrite_ver_za8_mf8_vg2 (0, w16, z18),\n+\t svwrite_ver_za8_mf8_vg2 (0, w16, z18))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_ver_za8_vg4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_ver_za8_vg4.c\nindex 8972fed59e3..0444f80fa42 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_ver_za8_vg4.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_ver_za8_vg4.c\n@@ -22,6 +22,16 @@ TEST_ZA_XN (write_za8_u8_z4_0_1, svuint8x4_t,\n \t svwrite_ver_za8_u8_vg4 (0, 1, z4),\n \t svwrite_ver_za8_u8_vg4 (0, 1, z4))\n \n+/*\n+** write_za8_mf8_z4_0_1:\n+**\tmov\t(w1[2-5]), #?1\n+**\tmova\tza0v\\.b\\[\\1, 0:3\\], {z4\\.b - z7\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_1, svmfloat8x4_t,\n+\t svwrite_ver_za8_mf8_vg4 (0, 1, z4),\n+\t svwrite_ver_za8_mf8_vg4 (0, 1, z4))\n+\n /*\n ** write_za8_s8_z28_0_w11:\n **\tmov\t(w1[2-5]), w11\n@@ -54,6 +64,19 @@ TEST_ZA_XN (write_za8_u8_z18_0_w15, svuint8x4_t,\n \t svwrite_ver_za8_u8_vg4 (0, w15, z18),\n \t svwrite_ver_za8_u8_vg4 (0, w15, z18))\n \n+/*\n+** write_za8_mf8_z18_0_w15:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmova\tza0v\\.b\\[w15, 0:3\\], {[^\\n]+}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z18_0_w15, svmfloat8x4_t,\n+\t svwrite_ver_za8_mf8_vg4 (0, w15, z18),\n+\t svwrite_ver_za8_mf8_vg4 (0, w15, z18))\n+\n /*\n ** write_za8_s8_z23_0_w12p12:\n **\tmov\t[^\\n]+\n@@ -77,6 +100,16 @@ TEST_ZA_XN (write_za8_u8_z4_0_w12p1, svuint8x4_t,\n \t svwrite_ver_za8_u8_vg4 (0, w12 + 1, z4),\n \t svwrite_ver_za8_u8_vg4 (0, w12 + 1, z4))\n \n+/*\n+** write_za8_mf8_z4_0_w12p1:\n+**\tadd\t(w[0-9]+), w12, #?1\n+**\tmova\tza0v\\.b\\[\\1, 0:3\\], {z4\\.b - z7\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_w12p1, svmfloat8x4_t,\n+\t svwrite_ver_za8_mf8_vg4 (0, w12 + 1, z4),\n+\t svwrite_ver_za8_mf8_vg4 (0, w12 + 1, z4))\n+\n /*\n ** write_za8_s8_z28_0_w12p2:\n **\tadd\t(w[0-9]+), w12, #?2\n@@ -97,6 +130,16 @@ TEST_ZA_XN (write_za8_u8_z0_0_w15p3, svuint8x4_t,\n \t svwrite_ver_za8_u8_vg4 (0, w15 + 3, z0),\n \t svwrite_ver_za8_u8_vg4 (0, w15 + 3, z0))\n \n+/*\n+** write_za8_mf8_z0_0_w15p3:\n+**\tadd\t(w[0-9]+), w15, #?3\n+**\tmova\tza0v\\.b\\[\\1, 0:3\\], {z0\\.b - z3\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z0_0_w15p3, svmfloat8x4_t,\n+\t svwrite_ver_za8_mf8_vg4 (0, w15 + 3, z0),\n+\t svwrite_ver_za8_mf8_vg4 (0, w15 + 3, z0))\n+\n /*\n ** write_za8_u8_z0_0_w12p4:\n **\tmova\tza0v\\.b\\[w12, 4:7\\], {z0\\.b - z3\\.b}\n@@ -106,6 +149,15 @@ TEST_ZA_XN (write_za8_u8_z0_0_w12p4, svuint8x4_t,\n \t svwrite_ver_za8_u8_vg4 (0, w12 + 4, z0),\n \t svwrite_ver_za8_u8_vg4 (0, w12 + 4, z0))\n \n+/*\n+** write_za8_mf8_z0_0_w12p4:\n+**\tmova\tza0v\\.b\\[w12, 4:7\\], {z0\\.b - z3\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z0_0_w12p4, svmfloat8x4_t,\n+\t svwrite_ver_za8_mf8_vg4 (0, w12 + 4, z0),\n+\t svwrite_ver_za8_mf8_vg4 (0, w12 + 4, z0))\n+\n /*\n ** write_za8_u8_z4_0_w15p12:\n **\tmova\tza0v\\.b\\[w15, 12:15\\], {z4\\.b - z7\\.b}\n@@ -115,6 +167,15 @@ TEST_ZA_XN (write_za8_u8_z4_0_w15p12, svuint8x4_t,\n \t svwrite_ver_za8_u8_vg4 (0, w15 + 12, z4),\n \t svwrite_ver_za8_u8_vg4 (0, w15 + 12, z4))\n \n+/*\n+** write_za8_mf8_z4_0_w15p12:\n+**\tmova\tza0v\\.b\\[w15, 12:15\\], {z4\\.b - z7\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_w15p12, svmfloat8x4_t,\n+\t svwrite_ver_za8_mf8_vg4 (0, w15 + 12, z4),\n+\t svwrite_ver_za8_mf8_vg4 (0, w15 + 12, z4))\n+\n /*\n ** write_za8_u8_z28_0_w12p14:\n **\tadd\t(w[0-9]+), w12, #?14\n@@ -125,6 +186,16 @@ TEST_ZA_XN (write_za8_u8_z28_0_w12p14, svuint8x4_t,\n \t svwrite_ver_za8_u8_vg4 (0, w12 + 14, z28),\n \t svwrite_ver_za8_u8_vg4 (0, w12 + 14, z28))\n \n+/*\n+** write_za8_mf8_z28_0_w12p14:\n+**\tadd\t(w[0-9]+), w12, #?14\n+**\tmova\tza0v\\.b\\[\\1, 0:3\\], {z28\\.b - z31\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z28_0_w12p14, svmfloat8x4_t,\n+\t svwrite_ver_za8_mf8_vg4 (0, w12 + 14, z28),\n+\t svwrite_ver_za8_mf8_vg4 (0, w12 + 14, z28))\n+\n /*\n ** write_za8_s8_z0_0_w15p16:\n **\tadd\t(w[0-9]+), w15, #?16\n@@ -145,6 +216,16 @@ TEST_ZA_XN (write_za8_u8_z4_0_w12m1, svuint8x4_t,\n \t svwrite_ver_za8_u8_vg4 (0, w12 - 1, z4),\n \t svwrite_ver_za8_u8_vg4 (0, w12 - 1, z4))\n \n+/*\n+** write_za8_mf8_z4_0_w12m1:\n+**\tsub\t(w[0-9]+), w12, #?1\n+**\tmova\tza0v\\.b\\[\\1, 0:3\\], {z4\\.b - z7\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z4_0_w12m1, svmfloat8x4_t,\n+\t svwrite_ver_za8_mf8_vg4 (0, w12 - 1, z4),\n+\t svwrite_ver_za8_mf8_vg4 (0, w12 - 1, z4))\n+\n /*\n ** write_za8_u8_z28_0_w16:\n **\tmov\t(w1[2-5]), w16\n@@ -154,3 +235,13 @@ TEST_ZA_XN (write_za8_u8_z4_0_w12m1, svuint8x4_t,\n TEST_ZA_XN (write_za8_u8_z28_0_w16, svuint8x4_t,\n \t svwrite_ver_za8_u8_vg4 (0, w16, z28),\n \t svwrite_ver_za8_u8_vg4 (0, w16, z28))\n+\n+/*\n+** write_za8_mf8_z28_0_w16:\n+**\tmov\t(w1[2-5]), w16\n+**\tmova\tza0v\\.b\\[\\1, 0:3\\], {z28\\.b - z31\\.b}\n+**\tret\n+*/\n+TEST_ZA_XN (write_za8_mf8_z28_0_w16, svmfloat8x4_t,\n+\t svwrite_ver_za8_mf8_vg4 (0, w16, z28),\n+\t svwrite_ver_za8_mf8_vg4 (0, w16, z28))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_za8_vg1x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_za8_vg1x2.c\nindex 4b83a37edd2..836118b0fa7 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_za8_vg1x2.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_za8_vg1x2.c\n@@ -32,6 +32,16 @@ TEST_ZA_XN (write_w7_z0, svuint8x2_t,\n \t svwrite_za8_u8_vg1x2 (w7, z0),\n \t svwrite_za8_vg1x2 (w7, z0))\n \n+/*\n+** write_mf8_w7_z0:\n+**\tmov\t(w8|w9|w10|w11), w7\n+**\tmova\tza\\.d\\[\\1, 0, vgx2\\], {z0\\.d - z1\\.d}\n+**\tret\n+*/\n+TEST_ZA_XN (write_mf8_w7_z0, svmfloat8x2_t,\n+\t svwrite_za8_mf8_vg1x2 (w7, z0),\n+\t svwrite_za8_vg1x2 (w7, z0))\n+\n /*\n ** write_w8_z0:\n **\tmova\tza\\.d\\[w8, 0, vgx2\\], {z0\\.d - z1\\.d}\n@@ -61,6 +71,16 @@ TEST_ZA_XN (write_w12_z0, svuint8x2_t,\n \t svwrite_za8_u8_vg1x2 (w12, z0),\n \t svwrite_za8_vg1x2 (w12, z0))\n \n+/*\n+** write_mf8_w12_z0:\n+**\tmov\t(w8|w9|w10|w11), w12\n+**\tmova\tza\\.d\\[\\1, 0, vgx2\\], {z0\\.d - z1\\.d}\n+**\tret\n+*/\n+TEST_ZA_XN (write_mf8_w12_z0, svmfloat8x2_t,\n+\t svwrite_za8_mf8_vg1x2 (w12, z0),\n+\t svwrite_za8_vg1x2 (w12, z0))\n+\n /*\n ** write_w8p7_z0:\n **\tmova\tza\\.d\\[w8, 7, vgx2\\], {z0\\.d - z1\\.d}\n@@ -90,6 +110,16 @@ TEST_ZA_XN (write_w8m1_z0, svuint8x2_t,\n \t svwrite_za8_u8_vg1x2 (w8 - 1, z0),\n \t svwrite_za8_vg1x2 (w8 - 1, z0))\n \n+/*\n+** write_mf8_w8m1_z0:\n+**\tsub\t(w8|w9|w10|w11), w8, #?1\n+**\tmova\tza\\.d\\[\\1, 0, vgx2\\], {z0\\.d - z1\\.d}\n+**\tret\n+*/\n+TEST_ZA_XN (write_mf8_w8m1_z0, svmfloat8x2_t,\n+\t svwrite_za8_mf8_vg1x2 (w8 - 1, z0),\n+\t svwrite_za8_vg1x2 (w8 - 1, z0))\n+\n /*\n ** write_w8_z18:\n **\tmova\tza\\.d\\[w8, 0, vgx2\\], {z18\\.d - z19\\.d}\n@@ -99,6 +129,15 @@ TEST_ZA_XN (write_w8_z18, svuint8x2_t,\n \t svwrite_za8_u8_vg1x2 (w8, z18),\n \t svwrite_za8_vg1x2 (w8, z18))\n \n+/*\n+** write_mf8_w8_z18:\n+**\tmova\tza\\.d\\[w8, 0, vgx2\\], {z18\\.d - z19\\.d}\n+**\tret\n+*/\n+TEST_ZA_XN (write_mf8_w8_z18, svmfloat8x2_t,\n+\t svwrite_za8_mf8_vg1x2 (w8, z18),\n+\t svwrite_za8_vg1x2 (w8, z18))\n+\n /* Leave the assembler to check for correctness for misaligned registers. */\n \n /*\n@@ -120,3 +159,12 @@ TEST_ZA_XN (write_w8_z23, svint8x2_t,\n TEST_ZA_XN (write_w8_z28, svuint8x2_t,\n \t svwrite_za8_u8_vg1x2 (w8, z28),\n \t svwrite_za8_vg1x2 (w8, z28))\n+\n+/*\n+** write_mf8_w8_z28:\n+**\tmova\tza\\.d\\[w8, 0, vgx2\\], {z28\\.d - z29\\.d}\n+**\tret\n+*/\n+TEST_ZA_XN (write_mf8_w8_z28, svmfloat8x2_t,\n+\t svwrite_za8_mf8_vg1x2 (w8, z28),\n+\t svwrite_za8_vg1x2 (w8, z28))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_za8_vg1x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_za8_vg1x4.c\nindex a529bf9fcca..649a5c0ca63 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_za8_vg1x4.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/write_za8_vg1x4.c\n@@ -22,6 +22,16 @@ TEST_ZA_XN (write_w0_z0, svuint8x4_t,\n \t svwrite_za8_u8_vg1x4 (w0, z0),\n \t svwrite_za8_vg1x4 (w0, z0))\n \n+/*\n+** write_mf8_w0_z0:\n+**\tmov\t(w8|w9|w10|w11), w0\n+**\tmova\tza\\.d\\[\\1, 0, vgx4\\], {z0\\.d - z3\\.d}\n+**\tret\n+*/\n+TEST_ZA_XN (write_mf8_w0_z0, svmfloat8x4_t,\n+\t svwrite_za8_mf8_vg1x4 (w0, z0),\n+\t svwrite_za8_vg1x4 (w0, z0))\n+\n /*\n ** write_w7_z0:\n **\tmov\t(w8|w9|w10|w11), w7\n@@ -50,6 +60,14 @@ TEST_ZA_XN (write_w11_z0, svuint8x4_t,\n \t svwrite_za8_u8_vg1x4 (w11, z0),\n \t svwrite_za8_vg1x4 (w11, z0))\n \n+/*\n+** write_mf8_w11_z0:\n+**\tmova\tza\\.d\\[w11, 0, vgx4\\], {z0\\.d - z3\\.d}\n+**\tret\n+*/\n+TEST_ZA_XN (write_mf8_w11_z0, svmfloat8x4_t,\n+\t svwrite_za8_mf8_vg1x4 (w11, z0),\n+\t svwrite_za8_vg1x4 (w11, z0))\n \n /*\n ** write_w12_z0:\n@@ -80,6 +98,16 @@ TEST_ZA_XN (write_w8p8_z0, svuint8x4_t,\n \t svwrite_za8_u8_vg1x4 (w8 + 8, z0),\n \t svwrite_za8_vg1x4 (w8 + 8, z0))\n \n+/*\n+** write_mf8_w8p8_z0:\n+**\tadd\t(w8|w9|w10|w11), w8, #?8\n+**\tmova\tza\\.d\\[\\1, 0, vgx4\\], {z0\\.d - z3\\.d}\n+**\tret\n+*/\n+TEST_ZA_XN (write_mf8_w8p8_z0, svmfloat8x4_t,\n+\t svwrite_za8_mf8_vg1x4 (w8 + 8, z0),\n+\t svwrite_za8_vg1x4 (w8 + 8, z0))\n+\n /*\n ** write_w8m1_z0:\n **\tsub\t(w8|w9|w10|w11), w8, #?1\n@@ -114,6 +142,19 @@ TEST_ZA_XN (write_w8_z18, svuint8x4_t,\n \t svwrite_za8_u8_vg1x4 (w8, z18),\n \t svwrite_za8_vg1x4 (w8, z18))\n \n+/*\n+** write_mf8_w8_z18:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmova\tza\\.d\\[w8, 0, vgx4\\], [^\\n]+\n+**\tret\n+*/\n+TEST_ZA_XN (write_mf8_w8_z18, svmfloat8x4_t,\n+\t svwrite_za8_mf8_vg1x4 (w8, z18),\n+\t svwrite_za8_vg1x4 (w8, z18))\n+\n /*\n ** write_w8_z23:\n **\tmov\t[^\\n]+\n@@ -127,6 +168,19 @@ TEST_ZA_XN (write_w8_z23, svuint8x4_t,\n \t svwrite_za8_u8_vg1x4 (w8, z23),\n \t svwrite_za8_vg1x4 (w8, z23))\n \n+/*\n+** write_mf8_w8_z23:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmova\tza\\.d\\[w8, 0, vgx4\\], [^\\n]+\n+**\tret\n+*/\n+TEST_ZA_XN (write_mf8_w8_z23, svmfloat8x4_t,\n+\t svwrite_za8_mf8_vg1x4 (w8, z23),\n+\t svwrite_za8_vg1x4 (w8, z23))\n+\n /*\n ** write_w8_z28:\n **\tmova\tza\\.d\\[w8, 0, vgx4\\], {z28\\.d - z31\\.d}\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zip_mf8_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zip_mf8_x2.c\nnew file mode 100644\nindex 00000000000..834a0e680a8\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zip_mf8_x2.c\n@@ -0,0 +1,77 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** zip_z0_z0:\n+**\tzip\t{z0\\.b - z1\\.b}, z0\\.b, z1\\.b\n+**\tret\n+*/\n+TEST_XN (zip_z0_z0, svmfloat8x2_t, z0,\n+\t svzip_mf8_x2 (z0),\n+\t svzip (z0))\n+\n+/*\n+** zip_z0_z4:\n+**\tzip\t{z0\\.b - z1\\.b}, z4\\.b, z5\\.b\n+**\tret\n+*/\n+TEST_XN (zip_z0_z4, svmfloat8x2_t, z0,\n+\t svzip_mf8_x2 (z4),\n+\t svzip (z4))\n+\n+/*\n+** zip_z4_z18:\n+**\tzip\t{z4\\.b - z5\\.b}, z18\\.b, z19\\.b\n+**\tret\n+*/\n+TEST_XN (zip_z4_z18, svmfloat8x2_t, z4,\n+\t svzip_mf8_x2 (z18),\n+\t svzip (z18))\n+\n+/*\n+** zip_z18_z23:\n+**\tzip\t{z18\\.b - z19\\.b}, z23\\.b, z24\\.b\n+**\tret\n+*/\n+TEST_XN (zip_z18_z23, svmfloat8x2_t, z18,\n+\t svzip_mf8_x2 (z23),\n+\t svzip (z23))\n+\n+/*\n+** zip_z23_z28:\n+**\tzip\t[^\\n]+, z28\\.b, z29\\.b\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (zip_z23_z28, svmfloat8x2_t, z23,\n+\t svzip_mf8_x2 (z28),\n+\t svzip (z28))\n+\n+/*\n+** zip_z28_z0:\n+**\tzip\t{z28\\.b - z29\\.b}, z0\\.b, z1\\.b\n+**\tret\n+*/\n+TEST_XN (zip_z28_z0, svmfloat8x2_t, z28,\n+\t svzip_mf8_x2 (z0),\n+\t svzip (z0))\n+\n+/*\n+** zip_z28_z0_z23:\t{ xfail aarch64_big_endian }\n+**\tzip\t{z28\\.b - z29\\.b}, z0\\.b, z23\\.b\n+**\tret\n+*/\n+TEST_XN (zip_z28_z0_z23, svmfloat8x2_t, z28,\n+\t svzip_mf8_x2 (svcreate2 (svget2 (z0, 0), svget2 (z23, 0))),\n+\t svzip (svcreate2 (svget2 (z0, 0), svget2 (z23, 0))))\n+\n+/*\n+** zip_z28_z5_z19:\n+**\tzip\t{z28\\.b - z29\\.b}, z5\\.b, z19\\.b\n+**\tret\n+*/\n+TEST_XN (zip_z28_z5_z19, svmfloat8x2_t, z28,\n+\t svzip_mf8_x2 (svcreate2 (svget2 (z4, 1), svget2 (z18, 1))),\n+\t svzip (svcreate2 (svget2 (z4, 1), svget2 (z18, 1))))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zip_mf8_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zip_mf8_x4.c\nnew file mode 100644\nindex 00000000000..487e9b2d3fb\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zip_mf8_x4.c\n@@ -0,0 +1,73 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** zip_z0_z0:\n+**\tzip\t{z0\\.b - z3\\.b}, {z0\\.b - z3\\.b}\n+**\tret\n+*/\n+TEST_XN (zip_z0_z0, svmfloat8x4_t, z0,\n+\t svzip_mf8_x4 (z0),\n+\t svzip (z0))\n+\n+/*\n+** zip_z0_z4:\n+**\tzip\t{z0\\.b - z3\\.b}, {z4\\.b - z7\\.b}\n+**\tret\n+*/\n+TEST_XN (zip_z0_z4, svmfloat8x4_t, z0,\n+\t svzip_mf8_x4 (z4),\n+\t svzip (z4))\n+\n+/*\n+** zip_z4_z18:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tzip\t{z4\\.b - z7\\.b}, [^\\n]+\n+**\tret\n+*/\n+TEST_XN (zip_z4_z18, svmfloat8x4_t, z4,\n+\t svzip_mf8_x4 (z18),\n+\t svzip (z18))\n+\n+/*\n+** zip_z18_z23:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tzip\t{z[^\\n]+}, {z[^\\n]+}\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (zip_z18_z23, svmfloat8x4_t, z18,\n+\t svzip_mf8_x4 (z23),\n+\t svzip (z23))\n+\n+/*\n+** zip_z23_z28:\n+**\tzip\t[^\\n]+, {z28\\.b - z31\\.b}\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (zip_z23_z28, svmfloat8x4_t, z23,\n+\t svzip_mf8_x4 (z28),\n+\t svzip (z28))\n+\n+/*\n+** zip_z28_z0:\n+**\tzip\t{z28\\.b - z31\\.b}, {z0\\.b - z3\\.b}\n+**\tret\n+*/\n+TEST_XN (zip_z28_z0, svmfloat8x4_t, z28,\n+\t svzip_mf8_x4 (z0),\n+\t svzip (z0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x2.c\nnew file mode 100644\nindex 00000000000..4dd4753461a\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x2.c\n@@ -0,0 +1,77 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** zipq_z0_z0:\n+**\tzip\t{z0\\.q - z1\\.q}, z0\\.q, z1\\.q\n+**\tret\n+*/\n+TEST_XN (zipq_z0_z0, svmfloat8x2_t, z0,\n+\t svzipq_mf8_x2 (z0),\n+\t svzipq (z0))\n+\n+/*\n+** zipq_z0_z4:\n+**\tzip\t{z0\\.q - z1\\.q}, z4\\.q, z5\\.q\n+**\tret\n+*/\n+TEST_XN (zipq_z0_z4, svmfloat8x2_t, z0,\n+\t svzipq_mf8_x2 (z4),\n+\t svzipq (z4))\n+\n+/*\n+** zipq_z4_z18:\n+**\tzip\t{z4\\.q - z5\\.q}, z18\\.q, z19\\.q\n+**\tret\n+*/\n+TEST_XN (zipq_z4_z18, svmfloat8x2_t, z4,\n+\t svzipq_mf8_x2 (z18),\n+\t svzipq (z18))\n+\n+/*\n+** zipq_z18_z23:\n+**\tzip\t{z18\\.q - z19\\.q}, z23\\.q, z24\\.q\n+**\tret\n+*/\n+TEST_XN (zipq_z18_z23, svmfloat8x2_t, z18,\n+\t svzipq_mf8_x2 (z23),\n+\t svzipq (z23))\n+\n+/*\n+** zipq_z23_z28:\n+**\tzip\t[^\\n]+, z28\\.q, z29\\.q\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (zipq_z23_z28, svmfloat8x2_t, z23,\n+\t svzipq_mf8_x2 (z28),\n+\t svzipq (z28))\n+\n+/*\n+** zipq_z28_z0:\n+**\tzip\t{z28\\.q - z29\\.q}, z0\\.q, z1\\.q\n+**\tret\n+*/\n+TEST_XN (zipq_z28_z0, svmfloat8x2_t, z28,\n+\t svzipq_mf8_x2 (z0),\n+\t svzipq (z0))\n+\n+/*\n+** zipq_z28_z0_z23:\t{ xfail aarch64_big_endian }\n+**\tzip\t{z28\\.q - z29\\.q}, z0\\.q, z23\\.q\n+**\tret\n+*/\n+TEST_XN (zipq_z28_z0_z23, svmfloat8x2_t, z28,\n+\t svzipq_mf8_x2 (svcreate2 (svget2 (z0, 0), svget2 (z23, 0))),\n+\t svzipq (svcreate2 (svget2 (z0, 0), svget2 (z23, 0))))\n+\n+/*\n+** zipq_z28_z5_z19:\n+**\tzip\t{z28\\.q - z29\\.q}, z5\\.q, z19\\.q\n+**\tret\n+*/\n+TEST_XN (zipq_z28_z5_z19, svmfloat8x2_t, z28,\n+\t svzipq_mf8_x2 (svcreate2 (svget2 (z4, 1), svget2 (z18, 1))),\n+\t svzipq (svcreate2 (svget2 (z4, 1), svget2 (z18, 1))))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x4.c\nnew file mode 100644\nindex 00000000000..417eb387e4b\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x4.c\n@@ -0,0 +1,73 @@\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sme2_acle.h\"\n+\n+/*\n+** zipq_z0_z0:\n+**\tzip\t{z0\\.q - z3\\.q}, {z0\\.q - z3\\.q}\n+**\tret\n+*/\n+TEST_XN (zipq_z0_z0, svmfloat8x4_t, z0,\n+\t svzipq_mf8_x4 (z0),\n+\t svzipq (z0))\n+\n+/*\n+** zipq_z0_z4:\n+**\tzip\t{z0\\.q - z3\\.q}, {z4\\.q - z7\\.q}\n+**\tret\n+*/\n+TEST_XN (zipq_z0_z4, svmfloat8x4_t, z0,\n+\t svzipq_mf8_x4 (z4),\n+\t svzipq (z4))\n+\n+/*\n+** zipq_z4_z18:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tzip\t{z4\\.q - z7\\.q}, [^\\n]+\n+**\tret\n+*/\n+TEST_XN (zipq_z4_z18, svmfloat8x4_t, z4,\n+\t svzipq_mf8_x4 (z18),\n+\t svzipq (z18))\n+\n+/*\n+** zipq_z18_z23:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tzip\t{z[^\\n]+}, {z[^\\n]+}\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (zipq_z18_z23, svmfloat8x4_t, z18,\n+\t svzipq_mf8_x4 (z23),\n+\t svzipq (z23))\n+\n+/*\n+** zipq_z23_z28:\n+**\tzip\t[^\\n]+, {z28\\.q - z31\\.q}\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_XN (zipq_z23_z28, svmfloat8x4_t, z23,\n+\t svzipq_mf8_x4 (z28),\n+\t svzipq (z28))\n+\n+/*\n+** zipq_z28_z0:\n+**\tzip\t{z28\\.q - z31\\.q}, {z0\\.q - z3\\.q}\n+**\tret\n+*/\n+TEST_XN (zipq_z28_z0, svmfloat8x4_t, z28,\n+\t svzipq_mf8_x4 (z0),\n+\t svzipq (z0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x2.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x2.c\nnew file mode 100644\nindex 00000000000..d4073ab279d\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x2.c\n@@ -0,0 +1,269 @@\n+/* { dg-do assemble { target aarch64_asm_sve2p1_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_sve2p1_ok } } } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" { target { ! ilp32 } } } } */\n+\n+#include \"test_sve_acle.h\"\n+\n+#pragma GCC target \"+sve2p1\"\n+#ifdef STREAMING_COMPATIBLE\n+#pragma GCC target \"+sme2\"\n+#endif\n+\n+/*\n+** ld1_mf8_base:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_base, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0),\n+\t\t z0 = svld1_x2 (pn8, x0))\n+\n+/*\n+** ld1_mf8_index:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, x1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_index, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 + x1),\n+\t\t z0 = svld1_x2 (pn8, x0 + x1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_1:\n+**\tincb\tx0\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 + svcntb ()),\n+\t\t z0 = svld1_x2 (pn8, x0 + svcntb ()))\n+\n+/*\n+** ld1_mf8_2:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 + svcntb () * 2),\n+\t\t z0 = svld1_x2 (pn8, x0 + svcntb () * 2))\n+\n+/*\n+** ld1_mf8_14:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #14, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_14, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 + svcntb () * 14),\n+\t\t z0 = svld1_x2 (pn8, x0 + svcntb () * 14))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_16:\n+**\tincb\tx0, all, mul #16\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 + svcntb () * 16),\n+\t\t z0 = svld1_x2 (pn8, x0 + svcntb () * 16))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_m1:\n+**\tdecb\tx0\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 - svcntb ()),\n+\t\t z0 = svld1_x2 (pn8, x0 - svcntb ()))\n+\n+/*\n+** ld1_mf8_m2:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 - svcntb () * 2),\n+\t\t z0 = svld1_x2 (pn8, x0 - svcntb () * 2))\n+\n+/*\n+** ld1_mf8_m16:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-16, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 - svcntb () * 16),\n+\t\t z0 = svld1_x2 (pn8, x0 - svcntb () * 16))\n+\n+/*\n+** ld1_mf8_m18:\n+**\taddvl\t(x[0-9]+), x0, #-18\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[\\1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m18, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn8, x0 - svcntb () * 18),\n+\t\t z0 = svld1_x2 (pn8, x0 - svcntb () * 18))\n+\n+/*\n+** ld1_mf8_z17:\n+**\tld1b\t{z[^\\n]+}, pn8/z, \\[x0\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_z17, svmfloat8x2_t, mfloat8_t,\n+\t\t z17 = svld1_mf8_x2 (pn8, x0),\n+\t\t z17 = svld1_x2 (pn8, x0))\n+\n+/*\n+** ld1_mf8_z22:\n+**\tld1b\t{z22\\.b(?: - |, )z23\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_z22, svmfloat8x2_t, mfloat8_t,\n+\t\t z22 = svld1_mf8_x2 (pn8, x0),\n+\t\t z22 = svld1_x2 (pn8, x0))\n+\n+/*\n+** ld1_mf8_z28:\n+**\tld1b\t{z28\\.b(?: - |, )z29\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_z28, svmfloat8x2_t, mfloat8_t,\n+\t\t z28 = svld1_mf8_x2 (pn8, x0),\n+\t\t z28 = svld1_x2 (pn8, x0))\n+\n+/*\n+** ld1_mf8_pn0:\n+**\tmov\tp([89]|1[0-5])\\.b, p0\\.b\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_pn0, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn0, x0),\n+\t\t z0 = svld1_x2 (pn0, x0))\n+\n+/*\n+** ld1_mf8_pn7:\n+**\tmov\tp([89]|1[0-5])\\.b, p7\\.b\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_pn7, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn7, x0),\n+\t\t z0 = svld1_x2 (pn7, x0))\n+\n+/*\n+** ld1_mf8_pn15:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn15/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_pn15, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x2 (pn15, x0),\n+\t\t z0 = svld1_x2 (pn15, x0))\n+\n+/*\n+** ld1_vnum_mf8_0:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_0, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, 0),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, 0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_1:\n+**\tincb\tx0\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, 1),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, 1))\n+\n+/*\n+** ld1_vnum_mf8_2:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, 2),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, 2))\n+\n+/*\n+** ld1_vnum_mf8_14:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #14, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_14, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, 14),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, 14))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_16:\n+**\tincb\tx0, all, mul #16\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, 16),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, 16))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_m1:\n+**\tdecb\tx0\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, -1),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, -1))\n+\n+/*\n+** ld1_vnum_mf8_m2:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, -2),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, -2))\n+\n+/*\n+** ld1_vnum_mf8_m16:\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-16, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, -16),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, -16))\n+\n+/*\n+** ld1_vnum_mf8_m18:\n+**\taddvl\t(x[0-9]+), x0, #-18\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[\\1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m18, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, -18),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, -18))\n+\n+/*\n+** ld1_vnum_mf8_x1:\n+**\tcntb\t(x[0-9]+)\n+** (\n+**\tmadd\t(x[0-9]+), (?:x1, \\1|\\1, x1), x0\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[\\2\\]\n+** |\n+**\tmul\t(x[0-9]+), (?:x1, \\1|\\1, x1)\n+**\tld1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, \\3\\]\n+** )\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_x1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x2 (pn8, x0, x1),\n+\t\t z0 = svld1_vnum_x2 (pn8, x0, x1))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x4.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x4.c\nnew file mode 100644\nindex 00000000000..84d053a4261\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x4.c\n@@ -0,0 +1,361 @@\n+/* { dg-do assemble { target aarch64_asm_sve2p1_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_sve2p1_ok } } } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" { target { ! ilp32 } } } } */\n+\n+#include \"test_sve_acle.h\"\n+\n+#pragma GCC target \"+sve2p1\"\n+#ifdef STREAMING_COMPATIBLE\n+#pragma GCC target \"+sme2\"\n+#endif\n+\n+/*\n+** ld1_mf8_base:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_base, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0),\n+\t\t z0 = svld1_x4 (pn8, x0))\n+\n+/*\n+** ld1_mf8_index:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_index, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 + x1),\n+\t\t z0 = svld1_x4 (pn8, x0 + x1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_1:\n+**\tincb\tx0\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 + svcntb ()),\n+\t\t z0 = svld1_x4 (pn8, x0 + svcntb ()))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_2:\n+**\tincb\tx0, all, mul #2\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 + svcntb () * 2),\n+\t\t z0 = svld1_x4 (pn8, x0 + svcntb () * 2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_3:\n+**\tincb\tx0, all, mul #3\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 + svcntb () * 3),\n+\t\t z0 = svld1_x4 (pn8, x0 + svcntb () * 3))\n+\n+/*\n+** ld1_mf8_4:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #4, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 + svcntb () * 4),\n+\t\t z0 = svld1_x4 (pn8, x0 + svcntb () * 4))\n+\n+/*\n+** ld1_mf8_28:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #28, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_28, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 + svcntb () * 28),\n+\t\t z0 = svld1_x4 (pn8, x0 + svcntb () * 28))\n+\n+/*\n+** ld1_mf8_32:\n+**\t[^{]*\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 + svcntb () * 32),\n+\t\t z0 = svld1_x4 (pn8, x0 + svcntb () * 32))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_m1:\n+**\tdecb\tx0\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 - svcntb ()),\n+\t\t z0 = svld1_x4 (pn8, x0 - svcntb ()))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_m2:\n+**\tdecb\tx0, all, mul #2\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 - svcntb () * 2),\n+\t\t z0 = svld1_x4 (pn8, x0 - svcntb () * 2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_mf8_m3:\n+**\tdecb\tx0, all, mul #3\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 - svcntb () * 3),\n+\t\t z0 = svld1_x4 (pn8, x0 - svcntb () * 3))\n+\n+/*\n+** ld1_mf8_m4:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-4, mul vl\\]\n+**\tret\n+*/\n+ TEST_LOAD_COUNT (ld1_mf8_m4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 - svcntb () * 4),\n+\t\t z0 = svld1_x4 (pn8, x0 - svcntb () * 4))\n+\n+/*\n+** ld1_mf8_m32:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-32, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 - svcntb () * 32),\n+\t\t z0 = svld1_x4 (pn8, x0 - svcntb () * 32))\n+\n+/*\n+** ld1_mf8_m36:\n+**\t[^{]*\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_m36, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn8, x0 - svcntb () * 36),\n+\t\t z0 = svld1_x4 (pn8, x0 - svcntb () * 36))\n+\n+/*\n+** ld1_mf8_z17:\n+**\tld1b\t{z[^\\n]+}, pn8/z, \\[x0\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_z17, svmfloat8x4_t, mfloat8_t,\n+\t\t z17 = svld1_mf8_x4 (pn8, x0),\n+\t\t z17 = svld1_x4 (pn8, x0))\n+\n+/*\n+** ld1_mf8_z22:\n+**\tld1b\t{z[^\\n]+}, pn8/z, \\[x0\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_z22, svmfloat8x4_t, mfloat8_t,\n+\t\t z22 = svld1_mf8_x4 (pn8, x0),\n+\t\t z22 = svld1_x4 (pn8, x0))\n+\n+/*\n+** ld1_mf8_z28:\n+**\tld1b\t{z28\\.b(?: - |, )z31\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_z28, svmfloat8x4_t, mfloat8_t,\n+\t\t z28 = svld1_mf8_x4 (pn8, x0),\n+\t\t z28 = svld1_x4 (pn8, x0))\n+\n+/*\n+** ld1_mf8_pn0:\n+**\tmov\tp([89]|1[0-5])\\.b, p0\\.b\n+**\tld1b\t{z0\\.b(?: - |, )z3\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_pn0, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn0, x0),\n+\t\t z0 = svld1_x4 (pn0, x0))\n+\n+/*\n+** ld1_mf8_pn7:\n+**\tmov\tp([89]|1[0-5])\\.b, p7\\.b\n+**\tld1b\t{z0\\.b(?: - |, )z3\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_pn7, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn7, x0),\n+\t\t z0 = svld1_x4 (pn7, x0))\n+\n+/*\n+** ld1_mf8_pn15:\n+**\tld1b\t{z0\\.b(?: - |, )z3\\.b}, pn15/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_mf8_pn15, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_mf8_x4 (pn15, x0),\n+\t\t z0 = svld1_x4 (pn15, x0))\n+\n+/*\n+** ld1_vnum_mf8_0:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_0, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, 0),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, 0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_1:\n+**\tincb\tx0\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, 1),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, 1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_2:\n+**\tincb\tx0, all, mul #2\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, 2),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, 2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_3:\n+**\tincb\tx0, all, mul #3\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, 3),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, 3))\n+\n+/*\n+** ld1_vnum_mf8_4:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #4, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, 4),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, 4))\n+\n+/*\n+** ld1_vnum_mf8_28:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #28, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_28, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, 28),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, 28))\n+\n+/*\n+** ld1_vnum_mf8_32:\n+**\t[^{]*\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, 32),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, 32))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_m1:\n+**\tdecb\tx0\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, -1),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, -1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_m2:\n+**\tdecb\tx0, all, mul #2\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, -2),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, -2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ld1_vnum_mf8_m3:\n+**\tdecb\tx0, all, mul #3\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, -3),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, -3))\n+\n+/*\n+** ld1_vnum_mf8_m4:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-4, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, -4),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, -4))\n+\n+/*\n+** ld1_vnum_mf8_m32:\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-32, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, -32),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, -32))\n+\n+/*\n+** ld1_vnum_mf8_m36:\n+**\t[^{]*\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_m36, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, -36),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, -36))\n+\n+/*\n+** ld1_vnum_mf8_x1:\n+**\tcntb\t(x[0-9]+)\n+** (\n+**\tmadd\t(x[0-9]+), (?:x1, \\1|\\1, x1), x0\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[\\2\\]\n+** |\n+**\tmul\t(x[0-9]+), (?:x1, \\1|\\1, x1)\n+**\tld1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, \\3\\]\n+** )\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ld1_vnum_mf8_x1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svld1_vnum_mf8_x4 (pn8, x0, x1),\n+\t\t z0 = svld1_vnum_x4 (pn8, x0, x1))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x2.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x2.c\nnew file mode 100644\nindex 00000000000..60d2caa1568\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x2.c\n@@ -0,0 +1,269 @@\n+/* { dg-do assemble { target aarch64_asm_sve2p1_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_sve2p1_ok } } } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" { target { ! ilp32 } } } } */\n+\n+#include \"test_sve_acle.h\"\n+\n+#pragma GCC target \"+sve2p1\"\n+#ifdef STREAMING_COMPATIBLE\n+#pragma GCC target \"+sme2\"\n+#endif\n+\n+/*\n+** ldnt1_mf8_base:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_base, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0),\n+\t\t z0 = svldnt1_x2 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_index:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, x1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_index, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 + x1),\n+\t\t z0 = svldnt1_x2 (pn8, x0 + x1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_1:\n+**\tincb\tx0\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 + svcntb ()),\n+\t\t z0 = svldnt1_x2 (pn8, x0 + svcntb ()))\n+\n+/*\n+** ldnt1_mf8_2:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 + svcntb () * 2),\n+\t\t z0 = svldnt1_x2 (pn8, x0 + svcntb () * 2))\n+\n+/*\n+** ldnt1_mf8_14:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #14, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_14, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 + svcntb () * 14),\n+\t\t z0 = svldnt1_x2 (pn8, x0 + svcntb () * 14))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_16:\n+**\tincb\tx0, all, mul #16\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 + svcntb () * 16),\n+\t\t z0 = svldnt1_x2 (pn8, x0 + svcntb () * 16))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_m1:\n+**\tdecb\tx0\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 - svcntb ()),\n+\t\t z0 = svldnt1_x2 (pn8, x0 - svcntb ()))\n+\n+/*\n+** ldnt1_mf8_m2:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 - svcntb () * 2),\n+\t\t z0 = svldnt1_x2 (pn8, x0 - svcntb () * 2))\n+\n+/*\n+** ldnt1_mf8_m16:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-16, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 - svcntb () * 16),\n+\t\t z0 = svldnt1_x2 (pn8, x0 - svcntb () * 16))\n+\n+/*\n+** ldnt1_mf8_m18:\n+**\taddvl\t(x[0-9]+), x0, #-18\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[\\1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m18, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn8, x0 - svcntb () * 18),\n+\t\t z0 = svldnt1_x2 (pn8, x0 - svcntb () * 18))\n+\n+/*\n+** ldnt1_mf8_z17:\n+**\tldnt1b\t{z[^\\n]+}, pn8/z, \\[x0\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_z17, svmfloat8x2_t, mfloat8_t,\n+\t\t z17 = svldnt1_mf8_x2 (pn8, x0),\n+\t\t z17 = svldnt1_x2 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_z22:\n+**\tldnt1b\t{z22\\.b(?: - |, )z23\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_z22, svmfloat8x2_t, mfloat8_t,\n+\t\t z22 = svldnt1_mf8_x2 (pn8, x0),\n+\t\t z22 = svldnt1_x2 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_z28:\n+**\tldnt1b\t{z28\\.b(?: - |, )z29\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_z28, svmfloat8x2_t, mfloat8_t,\n+\t\t z28 = svldnt1_mf8_x2 (pn8, x0),\n+\t\t z28 = svldnt1_x2 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_pn0:\n+**\tmov\tp([89]|1[0-5])\\.b, p0\\.b\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_pn0, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn0, x0),\n+\t\t z0 = svldnt1_x2 (pn0, x0))\n+\n+/*\n+** ldnt1_mf8_pn7:\n+**\tmov\tp([89]|1[0-5])\\.b, p7\\.b\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_pn7, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn7, x0),\n+\t\t z0 = svldnt1_x2 (pn7, x0))\n+\n+/*\n+** ldnt1_mf8_pn15:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn15/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_pn15, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x2 (pn15, x0),\n+\t\t z0 = svldnt1_x2 (pn15, x0))\n+\n+/*\n+** ldnt1_vnum_mf8_0:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_0, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, 0),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, 0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_1:\n+**\tincb\tx0\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, 1),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, 1))\n+\n+/*\n+** ldnt1_vnum_mf8_2:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, 2),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, 2))\n+\n+/*\n+** ldnt1_vnum_mf8_14:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #14, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_14, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, 14),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, 14))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_16:\n+**\tincb\tx0, all, mul #16\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, 16),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, 16))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_m1:\n+**\tdecb\tx0\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, -1),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, -1))\n+\n+/*\n+** ldnt1_vnum_mf8_m2:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-2, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m2, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, -2),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, -2))\n+\n+/*\n+** ldnt1_vnum_mf8_m16:\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, #-16, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m16, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, -16),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, -16))\n+\n+/*\n+** ldnt1_vnum_mf8_m18:\n+**\taddvl\t(x[0-9]+), x0, #-18\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[\\1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m18, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, -18),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, -18))\n+\n+/*\n+** ldnt1_vnum_mf8_x1:\n+**\tcntb\t(x[0-9]+)\n+** (\n+**\tmadd\t(x[0-9]+), (?:x1, \\1|\\1, x1), x0\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[\\2\\]\n+** |\n+**\tmul\t(x[0-9]+), (?:x1, \\1|\\1, x1)\n+**\tldnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8/z, \\[x0, \\3\\]\n+** )\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_x1, svmfloat8x2_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x2 (pn8, x0, x1),\n+\t\t z0 = svldnt1_vnum_x2 (pn8, x0, x1))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x4.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x4.c\nnew file mode 100644\nindex 00000000000..976b1e6f61c\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x4.c\n@@ -0,0 +1,361 @@\n+/* { dg-do assemble { target aarch64_asm_sve2p1_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_sve2p1_ok } } } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" { target { ! ilp32 } } } } */\n+\n+#include \"test_sve_acle.h\"\n+\n+#pragma GCC target \"+sve2p1\"\n+#ifdef STREAMING_COMPATIBLE\n+#pragma GCC target \"+sme2\"\n+#endif\n+\n+/*\n+** ldnt1_mf8_base:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_base, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0),\n+\t\t z0 = svldnt1_x4 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_index:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x1\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_index, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 + x1),\n+\t\t z0 = svldnt1_x4 (pn8, x0 + x1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_1:\n+**\tincb\tx0\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 + svcntb ()),\n+\t\t z0 = svldnt1_x4 (pn8, x0 + svcntb ()))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_2:\n+**\tincb\tx0, all, mul #2\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 + svcntb () * 2),\n+\t\t z0 = svldnt1_x4 (pn8, x0 + svcntb () * 2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_3:\n+**\tincb\tx0, all, mul #3\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 + svcntb () * 3),\n+\t\t z0 = svldnt1_x4 (pn8, x0 + svcntb () * 3))\n+\n+/*\n+** ldnt1_mf8_4:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #4, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 + svcntb () * 4),\n+\t\t z0 = svldnt1_x4 (pn8, x0 + svcntb () * 4))\n+\n+/*\n+** ldnt1_mf8_28:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #28, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_28, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 + svcntb () * 28),\n+\t\t z0 = svldnt1_x4 (pn8, x0 + svcntb () * 28))\n+\n+/*\n+** ldnt1_mf8_32:\n+**\t[^{]*\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 + svcntb () * 32),\n+\t\t z0 = svldnt1_x4 (pn8, x0 + svcntb () * 32))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_m1:\n+**\tdecb\tx0\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 - svcntb ()),\n+\t\t z0 = svldnt1_x4 (pn8, x0 - svcntb ()))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_m2:\n+**\tdecb\tx0, all, mul #2\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 - svcntb () * 2),\n+\t\t z0 = svldnt1_x4 (pn8, x0 - svcntb () * 2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_mf8_m3:\n+**\tdecb\tx0, all, mul #3\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 - svcntb () * 3),\n+\t\t z0 = svldnt1_x4 (pn8, x0 - svcntb () * 3))\n+\n+/*\n+** ldnt1_mf8_m4:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-4, mul vl\\]\n+**\tret\n+*/\n+ TEST_LOAD_COUNT (ldnt1_mf8_m4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 - svcntb () * 4),\n+\t\t z0 = svldnt1_x4 (pn8, x0 - svcntb () * 4))\n+\n+/*\n+** ldnt1_mf8_m32:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-32, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 - svcntb () * 32),\n+\t\t z0 = svldnt1_x4 (pn8, x0 - svcntb () * 32))\n+\n+/*\n+** ldnt1_mf8_m36:\n+**\t[^{]*\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_m36, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn8, x0 - svcntb () * 36),\n+\t\t z0 = svldnt1_x4 (pn8, x0 - svcntb () * 36))\n+\n+/*\n+** ldnt1_mf8_z17:\n+**\tldnt1b\t{z[^\\n]+}, pn8/z, \\[x0\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_z17, svmfloat8x4_t, mfloat8_t,\n+\t\t z17 = svldnt1_mf8_x4 (pn8, x0),\n+\t\t z17 = svldnt1_x4 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_z22:\n+**\tldnt1b\t{z[^\\n]+}, pn8/z, \\[x0\\]\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_z22, svmfloat8x4_t, mfloat8_t,\n+\t\t z22 = svldnt1_mf8_x4 (pn8, x0),\n+\t\t z22 = svldnt1_x4 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_z28:\n+**\tldnt1b\t{z28\\.b(?: - |, )z31\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_z28, svmfloat8x4_t, mfloat8_t,\n+\t\t z28 = svldnt1_mf8_x4 (pn8, x0),\n+\t\t z28 = svldnt1_x4 (pn8, x0))\n+\n+/*\n+** ldnt1_mf8_pn0:\n+**\tmov\tp([89]|1[0-5])\\.b, p0\\.b\n+**\tldnt1b\t{z0\\.b(?: - |, )z3\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_pn0, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn0, x0),\n+\t\t z0 = svldnt1_x4 (pn0, x0))\n+\n+/*\n+** ldnt1_mf8_pn7:\n+**\tmov\tp([89]|1[0-5])\\.b, p7\\.b\n+**\tldnt1b\t{z0\\.b(?: - |, )z3\\.b}, pn\\1/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_pn7, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn7, x0),\n+\t\t z0 = svldnt1_x4 (pn7, x0))\n+\n+/*\n+** ldnt1_mf8_pn15:\n+**\tldnt1b\t{z0\\.b(?: - |, )z3\\.b}, pn15/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_mf8_pn15, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_mf8_x4 (pn15, x0),\n+\t\t z0 = svldnt1_x4 (pn15, x0))\n+\n+/*\n+** ldnt1_vnum_mf8_0:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_0, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, 0),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, 0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_1:\n+**\tincb\tx0\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, 1),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, 1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_2:\n+**\tincb\tx0, all, mul #2\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, 2),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, 2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_3:\n+**\tincb\tx0, all, mul #3\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, 3),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, 3))\n+\n+/*\n+** ldnt1_vnum_mf8_4:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #4, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, 4),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, 4))\n+\n+/*\n+** ldnt1_vnum_mf8_28:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #28, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_28, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, 28),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, 28))\n+\n+/*\n+** ldnt1_vnum_mf8_32:\n+**\t[^{]*\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, 32),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, 32))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_m1:\n+**\tdecb\tx0\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, -1),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, -1))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_m2:\n+**\tdecb\tx0, all, mul #2\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m2, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, -2),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, -2))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** ldnt1_vnum_mf8_m3:\n+**\tdecb\tx0, all, mul #3\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m3, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, -3),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, -3))\n+\n+/*\n+** ldnt1_vnum_mf8_m4:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-4, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m4, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, -4),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, -4))\n+\n+/*\n+** ldnt1_vnum_mf8_m32:\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, #-32, mul vl\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m32, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, -32),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, -32))\n+\n+/*\n+** ldnt1_vnum_mf8_m36:\n+**\t[^{]*\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_m36, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, -36),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, -36))\n+\n+/*\n+** ldnt1_vnum_mf8_x1:\n+**\tcntb\t(x[0-9]+)\n+** (\n+**\tmadd\t(x[0-9]+), (?:x1, \\1|\\1, x1), x0\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[\\2\\]\n+** |\n+**\tmul\t(x[0-9]+), (?:x1, \\1|\\1, x1)\n+**\tldnt1b\t{z0\\.b - z3\\.b}, pn8/z, \\[x0, \\3\\]\n+** )\n+**\tret\n+*/\n+TEST_LOAD_COUNT (ldnt1_vnum_mf8_x1, svmfloat8x4_t, mfloat8_t,\n+\t\t z0 = svldnt1_vnum_mf8_x4 (pn8, x0, x1),\n+\t\t z0 = svldnt1_vnum_x4 (pn8, x0, x1))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/revd_mf8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/revd_mf8.c\nnew file mode 100644\nindex 00000000000..64d08509c16\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/revd_mf8.c\n@@ -0,0 +1,80 @@\n+/* { dg-do assemble { target aarch64_asm_sve2p1_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_sve2p1_ok } } } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n+\n+#include \"test_sve_acle.h\"\n+\n+#pragma GCC target \"+sve2p1\"\n+\n+/*\n+** revd_mf8_m_tied12:\n+**\trevd\tz0\\.q, p0/m, z0\\.q\n+**\tret\n+*/\n+TEST_UNIFORM_Z (revd_mf8_m_tied12, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_m (z0, p0, z0),\n+\t\tz0 = svrevd_m (z0, p0, z0))\n+\n+/*\n+** revd_mf8_m_tied1:\n+**\trevd\tz0\\.q, p0/m, z1\\.q\n+**\tret\n+*/\n+TEST_UNIFORM_Z (revd_mf8_m_tied1, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_m (z0, p0, z1),\n+\t\tz0 = svrevd_m (z0, p0, z1))\n+\n+/*\n+** revd_mf8_m_tied2:\n+**\tmov\t(z[0-9]+)\\.d, z0\\.d\n+**\tmovprfx\tz0, z1\n+**\trevd\tz0\\.q, p0/m, \\1\\.q\n+**\tret\n+*/\n+TEST_UNIFORM_Z (revd_mf8_m_tied2, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_m (z1, p0, z0),\n+\t\tz0 = svrevd_m (z1, p0, z0))\n+\n+/*\n+** revd_mf8_m_untied:\n+**\tmovprfx\tz0, z2\n+**\trevd\tz0\\.q, p0/m, z1\\.q\n+**\tret\n+*/\n+TEST_UNIFORM_Z (revd_mf8_m_untied, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_m (z2, p0, z1),\n+\t\tz0 = svrevd_m (z2, p0, z1))\n+\n+/* Awkward register allocation. Don't require specific output. */\n+TEST_UNIFORM_Z (revd_mf8_z_tied1, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_z (p0, z0),\n+\t\tz0 = svrevd_z (p0, z0))\n+\n+/*\n+** revd_mf8_z_untied:\n+**\tmovi?\t[vdz]0\\.?(?:[0-9]*[bhsd])?, #?0\n+**\trevd\tz0\\.q, p0/m, z1\\.q\n+**\tret\n+*/\n+TEST_UNIFORM_Z (revd_mf8_z_untied, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_z (p0, z1),\n+\t\tz0 = svrevd_z (p0, z1))\n+\n+/*\n+** revd_mf8_x_tied1:\n+**\trevd\tz0\\.q, p0/m, z0\\.q\n+**\tret\n+*/\n+TEST_UNIFORM_Z (revd_mf8_x_tied1, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_x (p0, z0),\n+\t\tz0 = svrevd_x (p0, z0))\n+\n+/*\n+** revd_mf8_x_untied:\n+**\tmovprfx\tz0, z1\n+**\trevd\tz0\\.q, p0/m, z1\\.q\n+**\tret\n+*/\n+TEST_UNIFORM_Z (revd_mf8_x_untied, svmfloat8_t,\n+\t\tz0 = svrevd_mf8_x (p0, z1),\n+\t\tz0 = svrevd_x (p0, z1))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x2.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x2.c\nnew file mode 100644\nindex 00000000000..489e4fff54d\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x2.c\n@@ -0,0 +1,269 @@\n+/* { dg-do assemble { target aarch64_asm_sve2p1_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_sve2p1_ok } } } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" { target { ! ilp32 } } } } */\n+\n+#include \"test_sve_acle.h\"\n+\n+#pragma GCC target \"+sve2p1\"\n+#ifdef STREAMING_COMPATIBLE\n+#pragma GCC target \"+sme2\"\n+#endif\n+\n+/*\n+** stnt1_mf8_base:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_base, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0, z0),\n+\t\t svstnt1 (pn8, x0, z0))\n+\n+/*\n+** stnt1_mf8_index:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, x1\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_index, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 + x1, z0),\n+\t\t svstnt1 (pn8, x0 + x1, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_1:\n+**\tincb\tx0\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_1, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 + svcntb (), z0),\n+\t\t svstnt1 (pn8, x0 + svcntb (), z0))\n+\n+/*\n+** stnt1_mf8_2:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #2, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_2, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 + svcntb () * 2, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 2, z0))\n+\n+/*\n+** stnt1_mf8_14:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #14, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_14, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 + svcntb () * 14, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 14, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_16:\n+**\tincb\tx0, all, mul #16\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_16, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 + svcntb () * 16, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 16, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_m1:\n+**\tdecb\tx0\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m1, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 - svcntb (), z0),\n+\t\t svstnt1 (pn8, x0 - svcntb (), z0))\n+\n+/*\n+** stnt1_mf8_m2:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #-2, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m2, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 - svcntb () * 2, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 2, z0))\n+\n+/*\n+** stnt1_mf8_m16:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #-16, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m16, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 - svcntb () * 16, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 16, z0))\n+\n+/*\n+** stnt1_mf8_m18:\n+**\taddvl\t(x[0-9]+), x0, #-18\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[\\1\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m18, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0 - svcntb () * 18, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 18, z0))\n+\n+/*\n+** stnt1_mf8_z17:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tstnt1b\t{z[^\\n]+}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_z17, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0, z17),\n+\t\t svstnt1 (pn8, x0, z17))\n+\n+/*\n+** stnt1_mf8_z22:\n+**\tstnt1b\t{z22\\.b(?: - |, )z23\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_z22, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0, z22),\n+\t\t svstnt1 (pn8, x0, z22))\n+\n+/*\n+** stnt1_mf8_z28:\n+**\tstnt1b\t{z28\\.b(?: - |, )z29\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_z28, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn8, x0, z28),\n+\t\t svstnt1 (pn8, x0, z28))\n+\n+/*\n+** stnt1_mf8_pn0:\n+**\tmov\tp([89]|1[0-5])\\.b, p0\\.b\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn\\1, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_pn0, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn0, x0, z0),\n+\t\t svstnt1 (pn0, x0, z0))\n+\n+/*\n+** stnt1_mf8_pn7:\n+**\tmov\tp([89]|1[0-5])\\.b, p7\\.b\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn\\1, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_pn7, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn7, x0, z0),\n+\t\t svstnt1 (pn7, x0, z0))\n+\n+/*\n+** stnt1_mf8_pn15:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn15, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_pn15, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_mf8_x2 (pn15, x0, z0),\n+\t\t svstnt1 (pn15, x0, z0))\n+\n+/*\n+** stnt1_vnum_mf8_0:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_0, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, 0, z0),\n+\t\t svstnt1_vnum (pn8, x0, 0, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_1:\n+**\tincb\tx0\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_1, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, 1, z0),\n+\t\t svstnt1_vnum (pn8, x0, 1, z0))\n+\n+/*\n+** stnt1_vnum_mf8_2:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #2, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_2, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, 2, z0),\n+\t\t svstnt1_vnum (pn8, x0, 2, z0))\n+\n+/*\n+** stnt1_vnum_mf8_14:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #14, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_14, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, 14, z0),\n+\t\t svstnt1_vnum (pn8, x0, 14, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_16:\n+**\tincb\tx0, all, mul #16\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_16, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, 16, z0),\n+\t\t svstnt1_vnum (pn8, x0, 16, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_m1:\n+**\tdecb\tx0\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m1, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, -1, z0),\n+\t\t svstnt1_vnum (pn8, x0, -1, z0))\n+\n+/*\n+** stnt1_vnum_mf8_m2:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #-2, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m2, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, -2, z0),\n+\t\t svstnt1_vnum (pn8, x0, -2, z0))\n+\n+/*\n+** stnt1_vnum_mf8_m16:\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, #-16, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m16, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, -16, z0),\n+\t\t svstnt1_vnum (pn8, x0, -16, z0))\n+\n+/*\n+** stnt1_vnum_mf8_m18:\n+**\taddvl\t(x[0-9]+), x0, #-18\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[\\1\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m18, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, -18, z0),\n+\t\t svstnt1_vnum (pn8, x0, -18, z0))\n+\n+/*\n+** stnt1_vnum_mf8_x1:\n+**\tcntb\t(x[0-9]+)\n+** (\n+**\tmadd\t(x[0-9]+), (?:x1, \\1|\\1, x1), x0\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[\\2\\]\n+** |\n+**\tmul\t(x[0-9]+), (?:x1, \\1|\\1, x1)\n+**\tstnt1b\t{z0\\.b(?: - |, )z1\\.b}, pn8, \\[x0, \\3\\]\n+** )\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_x1, svmfloat8x2_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x2 (pn8, x0, x1, z0),\n+\t\t svstnt1_vnum (pn8, x0, x1, z0))\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x4.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x4.c\nnew file mode 100644\nindex 00000000000..4be364514ab\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x4.c\n@@ -0,0 +1,361 @@\n+/* { dg-do assemble { target aarch64_asm_sve2p1_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_sve2p1_ok } } } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" { target { ! ilp32 } } } } */\n+\n+#include \"test_sve_acle.h\"\n+\n+#pragma GCC target \"+sve2p1\"\n+#ifdef STREAMING_COMPATIBLE\n+#pragma GCC target \"+sme2\"\n+#endif\n+\n+/*\n+** stnt1_mf8_base:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_base, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0, z0),\n+\t\t svstnt1 (pn8, x0, z0))\n+\n+/*\n+** stnt1_mf8_index:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x1\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_index, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 + x1, z0),\n+\t\t svstnt1 (pn8, x0 + x1, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_1:\n+**\tincb\tx0\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_1, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 + svcntb (), z0),\n+\t\t svstnt1 (pn8, x0 + svcntb (), z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_2:\n+**\tincb\tx0, all, mul #2\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_2, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 + svcntb () * 2, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 2, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_3:\n+**\tincb\tx0, all, mul #3\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_3, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 + svcntb () * 3, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 3, z0))\n+\n+/*\n+** stnt1_mf8_4:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #4, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_4, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 + svcntb () * 4, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 4, z0))\n+\n+/*\n+** stnt1_mf8_28:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #28, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_28, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 + svcntb () * 28, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 28, z0))\n+\n+/*\n+** stnt1_mf8_32:\n+**\t[^{]*\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_32, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 + svcntb () * 32, z0),\n+\t\t svstnt1 (pn8, x0 + svcntb () * 32, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_m1:\n+**\tdecb\tx0\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m1, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 - svcntb (), z0),\n+\t\t svstnt1 (pn8, x0 - svcntb (), z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_m2:\n+**\tdecb\tx0, all, mul #2\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m2, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 - svcntb () * 2, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 2, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_mf8_m3:\n+**\tdecb\tx0, all, mul #3\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m3, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 - svcntb () * 3, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 3, z0))\n+\n+/*\n+** stnt1_mf8_m4:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #-4, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m4, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 - svcntb () * 4, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 4, z0))\n+\n+/*\n+** stnt1_mf8_m32:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #-32, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m32, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 - svcntb () * 32, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 32, z0))\n+\n+/*\n+** stnt1_mf8_m36:\n+**\t[^{]*\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_m36, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0 - svcntb () * 36, z0),\n+\t\t svstnt1 (pn8, x0 - svcntb () * 36, z0))\n+\n+/*\n+** stnt1_mf8_z17:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tstnt1b\t{z[^\\n]+}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_z17, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0, z17),\n+\t\t svstnt1 (pn8, x0, z17))\n+\n+/*\n+** stnt1_mf8_z22:\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tmov\t[^\\n]+\n+**\tstnt1b\t{z[^\\n]+}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_z22, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0, z22),\n+\t\t svstnt1 (pn8, x0, z22))\n+\n+/*\n+** stnt1_mf8_z28:\n+**\tstnt1b\t{z28\\.b - z31\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_z28, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn8, x0, z28),\n+\t\t svstnt1 (pn8, x0, z28))\n+\n+/*\n+** stnt1_mf8_pn0:\n+**\tmov\tp([89]|1[0-5])\\.b, p0\\.b\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn\\1, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_pn0, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn0, x0, z0),\n+\t\t svstnt1 (pn0, x0, z0))\n+\n+/*\n+** stnt1_mf8_pn7:\n+**\tmov\tp([89]|1[0-5])\\.b, p7\\.b\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn\\1, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_pn7, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn7, x0, z0),\n+\t\t svstnt1 (pn7, x0, z0))\n+\n+/*\n+** stnt1_mf8_pn15:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn15, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_mf8_pn15, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_mf8_x4 (pn15, x0, z0),\n+\t\t svstnt1 (pn15, x0, z0))\n+\n+/*\n+** stnt1_vnum_mf8_0:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_0, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, 0, z0),\n+\t\t svstnt1_vnum (pn8, x0, 0, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_1:\n+**\tincb\tx0\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_1, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, 1, z0),\n+\t\t svstnt1_vnum (pn8, x0, 1, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_2:\n+**\tincb\tx0, all, mul #2\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_2, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, 2, z0),\n+\t\t svstnt1_vnum (pn8, x0, 2, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_3:\n+**\tincb\tx0, all, mul #3\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_3, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, 3, z0),\n+\t\t svstnt1_vnum (pn8, x0, 3, z0))\n+\n+/*\n+** stnt1_vnum_mf8_4:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #4, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_4, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, 4, z0),\n+\t\t svstnt1_vnum (pn8, x0, 4, z0))\n+\n+/*\n+** stnt1_vnum_mf8_28:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #28, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_28, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, 28, z0),\n+\t\t svstnt1_vnum (pn8, x0, 28, z0))\n+\n+/*\n+** stnt1_vnum_mf8_32:\n+**\t[^{]*\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_32, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, 32, z0),\n+\t\t svstnt1_vnum (pn8, x0, 32, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_m1:\n+**\tdecb\tx0\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m1, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, -1, z0),\n+\t\t svstnt1_vnum (pn8, x0, -1, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_m2:\n+**\tdecb\tx0, all, mul #2\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m2, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, -2, z0),\n+\t\t svstnt1_vnum (pn8, x0, -2, z0))\n+\n+/* Moving the constant into a register would also be OK. */\n+/*\n+** stnt1_vnum_mf8_m3:\n+**\tdecb\tx0, all, mul #3\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m3, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, -3, z0),\n+\t\t svstnt1_vnum (pn8, x0, -3, z0))\n+\n+/*\n+** stnt1_vnum_mf8_m4:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #-4, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m4, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, -4, z0),\n+\t\t svstnt1_vnum (pn8, x0, -4, z0))\n+\n+/*\n+** stnt1_vnum_mf8_m32:\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, #-32, mul vl\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m32, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, -32, z0),\n+\t\t svstnt1_vnum (pn8, x0, -32, z0))\n+\n+/*\n+** stnt1_vnum_mf8_m36:\n+**\t[^{]*\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, x[0-9]+\\]\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_m36, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, -36, z0),\n+\t\t svstnt1_vnum (pn8, x0, -36, z0))\n+\n+/*\n+** stnt1_vnum_mf8_x1:\n+**\tcntb\t(x[0-9]+)\n+** (\n+**\tmadd\t(x[0-9]+), (?:x1, \\1|\\1, x1), x0\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[\\2\\]\n+** |\n+**\tmul\t(x[0-9]+), (?:x1, \\1|\\1, x1)\n+**\tstnt1b\t{z0\\.b - z3\\.b}, pn8, \\[x0, \\3\\]\n+** )\n+**\tret\n+*/\n+TEST_STORE_COUNT (stnt1_vnum_mf8_x1, svmfloat8x4_t, mfloat8_t,\n+\t\t svstnt1_vnum_mf8_x4 (pn8, x0, x1, z0),\n+\t\t svstnt1_vnum (pn8, x0, x1, z0))\n","prefixes":["v4","1/8"]}