{"id":2175572,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175572/?format=json","project":{"id":38,"url":"http://patchwork.ozlabs.org/api/1.0/projects/38/?format=json","name":"Linux PWM development","link_name":"linux-pwm","list_id":"linux-pwm.vger.kernel.org","list_email":"linux-pwm@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20251218-clk-send-sync-v3-1-e48b2e2f1eac@google.com>","date":"2025-12-18T13:27:40","name":"[v3,1/3] rust: clk: implement Send and Sync","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"33c0fdf3bceeeb5c96aac94c5d25995979cc94f7","submitter":{"id":89273,"url":"http://patchwork.ozlabs.org/api/1.0/people/89273/?format=json","name":"Alice Ryhl","email":"aliceryhl@google.com"},"delegate":{"id":161009,"url":"http://patchwork.ozlabs.org/api/1.0/users/161009/?format=json","username":"mwilczynski","first_name":"Michał","last_name":"Wilczyński","email":"michalw628@gmail.com"},"mbox":"http://patchwork.ozlabs.org/project/linux-pwm/patch/20251218-clk-send-sync-v3-1-e48b2e2f1eac@google.com/mbox/","series":[{"id":485853,"url":"http://patchwork.ozlabs.org/api/1.0/series/485853/?format=json","date":"2025-12-18T13:27:39","name":"Implement Send and Sync for clk","version":3,"mbox":"http://patchwork.ozlabs.org/series/485853/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175572/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pwm@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=google.com header.i=@google.com header.a=rsa-sha256\n header.s=20230601 header.b=o2bThxjz;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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charset=\"utf-8\""},"content":"These traits are required for drivers to embed the Clk type in their own\ndata structures because driver data structures are usually required to\nbe Send. Since the Clk type is thread-safe, implement the relevant\ntraits.\n\nReviewed-by: Daniel Almeida \nReviewed-by: Danilo Krummrich \nAcked-by: Viresh Kumar \nReviewed-by: Boqun Feng \nSigned-off-by: Alice Ryhl \n---\n rust/kernel/clk.rs | 7 +++++++\n 1 file changed, 7 insertions(+)","diff":"diff --git a/rust/kernel/clk.rs b/rust/kernel/clk.rs\nindex c1cfaeaa36a22be2e3180b1e9142bb608ab276ea..d192fbd97861212d738d24510eebcd99c9177f2c 100644\n--- a/rust/kernel/clk.rs\n+++ b/rust/kernel/clk.rs\n@@ -129,6 +129,13 @@ mod common_clk {\n #[repr(transparent)]\n pub struct Clk(*mut bindings::clk);\n \n+ // SAFETY: It is safe to call `clk_put` on another thread than where `clk_get` was called.\n+ unsafe impl Send for Clk {}\n+\n+ // SAFETY: It is safe to call any combination of the `&self` methods in parallel, as the\n+ // methods are synchronized internally.\n+ unsafe impl Sync for Clk {}\n+\n impl Clk {\n /// Gets [`Clk`] corresponding to a [`Device`] and a connection id.\n ///\n","prefixes":["v3","1/3"]}