{"id":2175492,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175492/?format=json","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.0/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20251218-gicv5-host-acpi-v2-3-eec76cd1d40b@kernel.org>","date":"2025-12-18T10:14:29","name":"[v2,3/7] irqdomain: Add parent field to struct irqchip_fwid","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"4fd0e01685fdaaec4996ae0484307f239e83b319","submitter":{"id":84664,"url":"http://patchwork.ozlabs.org/api/1.0/people/84664/?format=json","name":"Lorenzo Pieralisi","email":"lpieralisi@kernel.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20251218-gicv5-host-acpi-v2-3-eec76cd1d40b@kernel.org/mbox/","series":[{"id":485814,"url":"http://patchwork.ozlabs.org/api/1.0/series/485814/?format=json","date":"2025-12-18T10:14:26","name":"irqchip/gic-v5: Code first ACPI boot support","version":2,"mbox":"http://patchwork.ozlabs.org/series/485814/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175492/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=Ly05k+hP;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1766052919; cv=none;\n b=rqxz/8XgkbJod338Kx3wajcN1eAzn4BhTkrnXnmIC53L9AocA/Gm1hoaMpNy1Uw5zMdKTBPE3lG3SDwiu+OgxTDYCEZB1DuHd8qrSWi8r1CvfHHMcO1um8UgqB3HX7S7H0ib6/umcOqg29j1zXkv7dtu0D4aJfjA4cInDY6yYK8=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1766052919; c=relaxed/simple;\n\tbh=GJVTj8/Q1eWiuVLph/OBwj1vemW+Wer8nWvMvF151hI=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:\n\t In-Reply-To:To:Cc;\n b=Zsu6liE6d0nYMkxwvl4LEqQcHbGqIDVcGAwkFxHxhef+dm2QV+0TjGHfttPOFe9ehP84fNlcGl6LbMxZCQDgoHkQ2pIb5k1sXE0wYOwT0+03RMyxvpqUY+KTKz2zMmHtUtwL7suLgCrugl6mC1AkWSpN2v46TK9w9+lk7rJ69dE=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=Ly05k+hP; arc=none smtp.client-ip=10.30.226.201","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1766052919;\n\tbh=GJVTj8/Q1eWiuVLph/OBwj1vemW+Wer8nWvMvF151hI=;\n\th=From:Date:Subject:References:In-Reply-To:To:Cc:From;\n\tb=Ly05k+hPNV70P3Z2zM20gHk5ANgv7lmpSZwDa/uy8qefGciy0CREV8pAC4QASs6sv\n\t mpWpXbGIv1cHs9Rsw09ZBNTI3Y7BfNsNLO8ghah62A/8VGPZ+YroTK8D/whGjabOBF\n\t 1jz0A2ZRc41mUwI6186K0vbtUEw/p/QA48gqMvLuyun3gokYNoxanjcbFnx4de+iFa\n\t oDVLJzfW1c5OJuY5JoxrE+3UUPCDO/lG5Z1IH25tR5SJrAD+Rw7AVCZstWpFf4QgkU\n\t VRZrjl0vwySDfJX5JtCz1X3b3htUHbuF/pw0OAG1ZTWrZTxx/vGT/6u2R2tZhsDzMC\n\t Fq8zXP+rjLESA==","From":"Lorenzo Pieralisi ","Date":"Thu, 18 Dec 2025 11:14:29 +0100","Subject":"[PATCH v2 3/7] irqdomain: Add parent field to struct irqchip_fwid","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20251218-gicv5-host-acpi-v2-3-eec76cd1d40b@kernel.org>","References":"<20251218-gicv5-host-acpi-v2-0-eec76cd1d40b@kernel.org>","In-Reply-To":"<20251218-gicv5-host-acpi-v2-0-eec76cd1d40b@kernel.org>","To":"\"Rafael J. Wysocki\" , Len Brown ,\n Robert Moore , Thomas Gleixner ,\n Hanjun Guo , Sudeep Holla ,\n Marc Zyngier , Bjorn Helgaas ","Cc":"linux-acpi@vger.kernel.org, acpica-devel@lists.linux.dev,\n linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n linux-pci@vger.kernel.org, Lorenzo Pieralisi ","X-Mailer":"b4 0.14.3"},"content":"The GICv5 driver IRQ domain hierarchy requires adding a parent field to\nstruct irqchip_fwid so that core code can reference a fwnode_handle parent\nfor a given fwnode.\n\nAdd a parent field to struct irqchip_fwid and update the related kernel API\nfunctions to initialize and handle it.\n\nSigned-off-by: Lorenzo Pieralisi \nCc: Thomas Gleixner \nCc: Marc Zyngier \n---\n include/linux/irqdomain.h | 30 ++++++++++++++++++++++++++----\n kernel/irq/irqdomain.c | 14 +++++++++++++-\n 2 files changed, 39 insertions(+), 5 deletions(-)","diff":"diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h\nindex 62f81bbeb490..b9df84b447a1 100644\n--- a/include/linux/irqdomain.h\n+++ b/include/linux/irqdomain.h\n@@ -257,7 +257,8 @@ static inline void irq_domain_set_pm_device(struct irq_domain *d, struct device\n \n #ifdef CONFIG_IRQ_DOMAIN\n struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id,\n-\t\t\t\t\t\tconst char *name, phys_addr_t *pa);\n+\t\t\t\t\t\tconst char *name, phys_addr_t *pa,\n+\t\t\t\t\t\tstruct fwnode_handle *parent);\n \n enum {\n \tIRQCHIP_FWNODE_REAL,\n@@ -267,18 +268,39 @@ enum {\n \n static inline struct fwnode_handle *irq_domain_alloc_named_fwnode(const char *name)\n {\n-\treturn __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED, 0, name, NULL);\n+\treturn __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED, 0, name, NULL, NULL);\n+}\n+\n+static inline\n+struct fwnode_handle *irq_domain_alloc_named_fwnode_parent(const char *name,\n+\t\t\t\t\t\t\t struct fwnode_handle *parent)\n+{\n+\treturn __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED, 0, name, NULL, parent);\n }\n \n static inline struct fwnode_handle *irq_domain_alloc_named_id_fwnode(const char *name, int id)\n {\n \treturn __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED_ID, id, name,\n-\t\t\t\t\t NULL);\n+\t\t\t\t\t NULL, NULL);\n+}\n+\n+static inline\n+struct fwnode_handle *irq_domain_alloc_named_id_fwnode_parent(const char *name, int id,\n+\t\t\t\t\t\t\t struct fwnode_handle *parent)\n+{\n+\treturn __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED_ID, id, name,\n+\t\t\t\t\t NULL, parent);\n }\n \n static inline struct fwnode_handle *irq_domain_alloc_fwnode(phys_addr_t *pa)\n {\n-\treturn __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_REAL, 0, NULL, pa);\n+\treturn __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_REAL, 0, NULL, pa, NULL);\n+}\n+\n+static inline struct fwnode_handle *irq_domain_alloc_fwnode_parent(phys_addr_t *pa,\n+\t\t\t\t\t\t\t\t struct fwnode_handle *parent)\n+{\n+\treturn __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_REAL, 0, NULL, pa, parent);\n }\n \n void irq_domain_free_fwnode(struct fwnode_handle *fwnode);\ndiff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c\nindex 2652c4cfd877..baf77cd167c4 100644\n--- a/kernel/irq/irqdomain.c\n+++ b/kernel/irq/irqdomain.c\n@@ -33,6 +33,7 @@ static void irq_domain_free_one_irq(struct irq_domain *domain, unsigned int virq\n \n struct irqchip_fwid {\n \tstruct fwnode_handle\tfwnode;\n+\tstruct fwnode_handle\t*parent;\n \tunsigned int\t\ttype;\n \tchar\t\t\t*name;\n \tphys_addr_t\t\t*pa;\n@@ -53,8 +54,16 @@ static const char *irqchip_fwnode_get_name(const struct fwnode_handle *fwnode)\n \treturn fwid->name;\n }\n \n+static struct fwnode_handle *irqchip_fwnode_get_parent(const struct fwnode_handle *fwnode)\n+{\n+\tstruct irqchip_fwid *fwid = container_of(fwnode, struct irqchip_fwid, fwnode);\n+\n+\treturn fwid->parent;\n+}\n+\n const struct fwnode_operations irqchip_fwnode_ops = {\n \t.get_name = irqchip_fwnode_get_name,\n+\t.get_parent = irqchip_fwnode_get_parent,\n };\n EXPORT_SYMBOL_GPL(irqchip_fwnode_ops);\n \n@@ -65,6 +74,7 @@ EXPORT_SYMBOL_GPL(irqchip_fwnode_ops);\n * @id:\t\tOptional user provided id if name != NULL\n * @name:\tOptional user provided domain name\n * @pa:\t\tOptional user-provided physical address\n+ * @parent:\tOptional parent fwnode_handle\n *\n * Allocate a struct irqchip_fwid, and return a pointer to the embedded\n * fwnode_handle (or NULL on failure).\n@@ -76,7 +86,8 @@ EXPORT_SYMBOL_GPL(irqchip_fwnode_ops);\n */\n struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id,\n \t\t\t\t\t\tconst char *name,\n-\t\t\t\t\t\tphys_addr_t *pa)\n+\t\t\t\t\t\tphys_addr_t *pa,\n+\t\t\t\t\t\tstruct fwnode_handle *parent)\n {\n \tstruct irqchip_fwid *fwid;\n \tchar *n;\n@@ -104,6 +115,7 @@ struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id,\n \tfwid->type = type;\n \tfwid->name = n;\n \tfwid->pa = pa;\n+\tfwid->parent = parent;\n \tfwnode_init(&fwid->fwnode, &irqchip_fwnode_ops);\n \treturn &fwid->fwnode;\n }\n","prefixes":["v2","3/7"]}