{"id":2175383,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175383/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20251217212018.93320-2-gustavo.romero@linaro.org>","date":"2025-12-17T21:20:13","name":"[v2,1/6] target/arm: Initialize AS 0 first","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"453694c90dfca61f608115e58c4113834b4d71e7","submitter":{"id":82513,"url":"http://patchwork.ozlabs.org/api/1.0/people/82513/?format=json","name":"Gustavo Romero","email":"gustavo.romero@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20251217212018.93320-2-gustavo.romero@linaro.org/mbox/","series":[{"id":485770,"url":"http://patchwork.ozlabs.org/api/1.0/series/485770/?format=json","date":"2025-12-17T21:20:12","name":"system/physmem: Enhance the Address Space API","version":2,"mbox":"http://patchwork.ozlabs.org/series/485770/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175383/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=y7P6vWPn;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4dWmwT0J0Wz1xpw\n\tfor ; Thu, 18 Dec 2025 08:22:33 +1100 (AEDT)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1vVyxL-00005v-K4; Wed, 17 Dec 2025 16:21:11 -0500","from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1vVyxD-0008SO-Mu\n for qemu-devel@nongnu.org; Wed, 17 Dec 2025 16:21:03 -0500","from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1vVyx9-0004XX-Pn\n for qemu-devel@nongnu.org; Wed, 17 Dec 2025 16:21:02 -0500","by mail-pl1-x630.google.com with SMTP id\n d9443c01a7336-2a09757004cso56578615ad.3\n for ; Wed, 17 Dec 2025 13:20:59 -0800 (PST)","from gromero0.. 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This is purely a\ncode organization change with no effect on behavior.\n\nSigned-off-by: Gustavo Romero \nSuggested-by: Alex Bennée \n---\n target/arm/cpu.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)","diff":"diff --git a/target/arm/cpu.c b/target/arm/cpu.c\nindex 39292fb9bc..1640b20b4d 100644\n--- a/target/arm/cpu.c\n+++ b/target/arm/cpu.c\n@@ -2158,6 +2158,8 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)\n cs->num_ases = 1 + has_secure;\n }\n \n+ cpu_address_space_init(cs, ARMASIdx_NS, \"cpu-memory\", cs->memory);\n+\n if (has_secure) {\n if (!cpu->secure_memory) {\n cpu->secure_memory = cs->memory;\n@@ -2175,8 +2177,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)\n }\n }\n \n- cpu_address_space_init(cs, ARMASIdx_NS, \"cpu-memory\", cs->memory);\n-\n /* No core_count specified, default to smp_cpus. */\n if (cpu->core_count == -1) {\n cpu->core_count = smp_cpus;\n","prefixes":["v2","1/6"]}