{"id":2175248,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175248/?format=json","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.0/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20251217-dt-bindings-pci-qcom-v2-7-873721599754@oss.qualcomm.com>","date":"2025-12-17T16:19:13","name":"[v2,07/12] dt-bindings: PCI: qcom,pcie-ipq8074: Move IPQ8074 to dedicated schema","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"2ccf6533f37eed445106a9664139bd1e1d6e7a95","submitter":{"id":92171,"url":"http://patchwork.ozlabs.org/api/1.0/people/92171/?format=json","name":"Krzysztof Kozlowski","email":"krzysztof.kozlowski@oss.qualcomm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20251217-dt-bindings-pci-qcom-v2-7-873721599754@oss.qualcomm.com/mbox/","series":[{"id":485718,"url":"http://patchwork.ozlabs.org/api/1.0/series/485718/?format=json","date":"2025-12-17T16:19:09","name":"dt-bindings: PCI: qcom: Move remaining devices to dedicated schema","version":2,"mbox":"http://patchwork.ozlabs.org/series/485718/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175248/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=lw9AhNNA;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=g65iuSDo;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20251217-dt-bindings-pci-qcom-v2-7-873721599754@oss.qualcomm.com>","References":"<20251217-dt-bindings-pci-qcom-v2-0-873721599754@oss.qualcomm.com>","In-Reply-To":"\n <20251217-dt-bindings-pci-qcom-v2-0-873721599754@oss.qualcomm.com>","To":"Bjorn Helgaas ,\n Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= ,\n Manivannan Sadhasivam , Rob Herring ,\n Krzysztof Kozlowski , Conor Dooley ,\n Bjorn Andersson ","Cc":"linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,\n devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n Krzysztof Kozlowski ","X-Mailer":"b4 0.14.3","X-Developer-Signature":"v=1; a=openpgp-sha256; l=8405;\n i=krzysztof.kozlowski@oss.qualcomm.com; h=from:subject:message-id;\n bh=24lMzxCr9aUhET7WAIp3X/uFZFDJp3XdSSyMZd7Klr0=;\n b=owEBbQKS/ZANAwAKAcE3ZuaGi4PXAcsmYgBpQtgCK2GLdaGJA03qWdN4yo57JREPBt5t98/XT\n gqPOGUUb6uJAjMEAAEKAB0WIQTd0mIoPREbIztuuKjBN2bmhouD1wUCaULYAgAKCRDBN2bmhouD\n 14XhD/4vIYccUZjmHT3kOojid8Y0H1FL3Qpk9VGFnAmIWc6ZS7hEeL7ciA9gWEq6JLDpK4ErSD1\n yaaJXf7wfN8CSQd3YT8X4/SNl/jDWBcBqulqU0Fx+BwexrC5wNSgXmr8iOpmPVAXuUYU3zscTxg\n lHSE/izrXmfpeUzXIT6G89UVZgZe3AiOK3GBjEarbk6rL4DAjQ5oZyRWnQnlJu26U43Np/8vGhG\n +cX2CUsTzMeeVNp1ILDI621QjIr0QwhJsiGy8Pv+YVdXSYpnioqvZ2Grvmvuv/bhOpXUJJszHBK\n /L2LwueR20PHjkLi2Vg46dIhZgD4YpyghVspwM1gTOYybF4u1phaPNAQuMFN6SNWjLXiTG9wuWj\n +2tRrRjKih3A+MkvuL0aR01aFmm9w+J3o1Nws+cLFbNuwIv3TtWZWWq85GjMSYMTDxGRyjTemBA\n 5HQ3OB/3rr1ySnY+mBErQ7wa99vCB+w2nWMwBqgiBUlCzfTXfOqAc8RzKQUWcAdq0c30pLYpYGj\n JUw1zPzMJ+ukIlJOxGoIbZf/T27604wWdOf6WoAiOz1eYROLqaGixMcuaVvvvbE2tYR6X0enA4e\n PEqUc/w/nVgHIJQ+mDFQcPpdsSKB5LC1TNOfJMwmWE22c8rCpVPP1mldRfEyTWJHx82JYEravNX\n HzmwOWQUxI7wLcA==","X-Developer-Key":"i=krzysztof.kozlowski@oss.qualcomm.com; a=openpgp;\n fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjUxMjE3MDEyOCBTYWx0ZWRfX4r3DY40mqxNo\n Vi8p5mHNkKxgQphy8eNJuTXKLnRpbOEm9S1cBcolxVIjIoQWraa2JaQO2P2jFCnIw+CgXU2zdP9\n kp76X7pAqJscGcju8UiJkKXvNFwaKpG2u2Q+ccFp8tufvTxIlaJBtzjfOBrE0wN99a03jMOF1KX\n NH+jczquz6e169qOsmn3mvHWtZHFGcMZ1A3GRkT/1rKKaetOLtznePRuXfxW5aWWSKC7kmhZF04\n ywe9DOHFZwAv79i0xmg/8w4eK16x/t9I/iPHFo+lROAV130daq6UQltTWNLDyrndMehlqvPJHun\n 7USLRImbx3T+lDveQahE4V0aP2rBo0BTOjks4WQ/8oDeuPDil+aqrDs5NgAxZwn1CApO8V86HTY\n GUrHFtz1YUWT542PVcWDfodMVL1U8w==","X-Proofpoint-ORIG-GUID":"cuT9jOlc2FdXRN-1fgXcXnkqvurYSgYR","X-Authority-Analysis":"v=2.4 cv=CtOys34D c=1 sm=1 tr=0 ts=6942d81a cx=c_pps\n a=WeENfcodrlLV9YRTxbY/uA==:117 a=hmARNUlj3OVxZ3RlbIsQyw==:17\n a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=gEfo2CItAAAA:8 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8\n a=IKDxjynl_XDzIR9_nSAA:9 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22\n a=sptkURWiP4Gy88Gu7hUp:22","X-Proofpoint-GUID":"cuT9jOlc2FdXRN-1fgXcXnkqvurYSgYR","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49\n definitions=2025-12-17_03,2025-12-16_05,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n adultscore=0 clxscore=1011 impostorscore=0 spamscore=0 phishscore=0\n priorityscore=1501 bulkscore=0 lowpriorityscore=0 suspectscore=0\n malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc=\n route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001\n definitions=main-2512170128"},"content":"Move IPQ8074 PCIe devices from qcom,pcie.yaml binding to a dedicated\nfile to make reviewing and maintenance easier.\n\nNew schema is equivalent to the old one with few changes:\n - Adding a required compatible, which is actually redundant.\n - Drop the really obvious comments next to clock/reg/reset-names items.\n - Expecting eight MSI interrupts and one global, instead of only one,\n which was incomplete hardware description.\n\nReviewed-by: Rob Herring (Arm) \nSigned-off-by: Krzysztof Kozlowski \n---\n .../devicetree/bindings/pci/qcom,pcie-ipq8074.yaml | 165 +++++++++++++++++++++\n .../devicetree/bindings/pci/qcom,pcie.yaml | 35 -----\n 2 files changed, 165 insertions(+), 35 deletions(-)","diff":"diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ipq8074.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ipq8074.yaml\nnew file mode 100644\nindex 000000000000..da975f943a7b\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ipq8074.yaml\n@@ -0,0 +1,165 @@\n+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/pci/qcom,pcie-ipq8074.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: Qualcomm IPQ8074 PCI Express Root Complex\n+\n+maintainers:\n+ - Bjorn Andersson \n+ - Manivannan Sadhasivam \n+\n+properties:\n+ compatible:\n+ enum:\n+ - qcom,pcie-ipq8074\n+\n+ reg:\n+ maxItems: 4\n+\n+ reg-names:\n+ items:\n+ - const: dbi\n+ - const: elbi\n+ - const: parf\n+ - const: config\n+\n+ clocks:\n+ maxItems: 5\n+\n+ clock-names:\n+ items:\n+ - const: iface # PCIe to SysNOC BIU clock\n+ - const: axi_m # AXI Master clock\n+ - const: axi_s # AXI Slave clock\n+ - const: ahb\n+ - const: aux\n+\n+ interrupts:\n+ maxItems: 9\n+\n+ interrupt-names:\n+ items:\n+ - const: msi0\n+ - const: msi1\n+ - const: msi2\n+ - const: msi3\n+ - const: msi4\n+ - const: msi5\n+ - const: msi6\n+ - const: msi7\n+ - const: global\n+\n+ resets:\n+ maxItems: 7\n+\n+ reset-names:\n+ items:\n+ - const: pipe\n+ - const: sleep\n+ - const: sticky # Core sticky reset\n+ - const: axi_m # AXI master reset\n+ - const: axi_s # AXI slave reset\n+ - const: ahb\n+ - const: axi_m_sticky # AXI master sticky reset\n+\n+required:\n+ - resets\n+ - reset-names\n+\n+allOf:\n+ - $ref: qcom,pcie-common.yaml#\n+\n+unevaluatedProperties: false\n+\n+examples:\n+ - |\n+ #include \n+ #include \n+ #include \n+\n+ pcie@10000000 {\n+ compatible = \"qcom,pcie-ipq8074\";\n+ reg = <0x10000000 0xf1d>,\n+ <0x10000f20 0xa8>,\n+ <0x00088000 0x2000>,\n+ <0x10100000 0x1000>;\n+ reg-names = \"dbi\", \"elbi\", \"parf\", \"config\";\n+ ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>, /* I/O */\n+ <0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */\n+\n+ device_type = \"pci\";\n+ linux,pci-domain = <1>;\n+ bus-range = <0x00 0xff>;\n+ num-lanes = <1>;\n+ max-link-speed = <2>;\n+ #address-cells = <3>;\n+ #size-cells = <2>;\n+\n+ clocks = <&gcc GCC_SYS_NOC_PCIE1_AXI_CLK>,\n+ <&gcc GCC_PCIE1_AXI_M_CLK>,\n+ <&gcc GCC_PCIE1_AXI_S_CLK>,\n+ <&gcc GCC_PCIE1_AHB_CLK>,\n+ <&gcc GCC_PCIE1_AUX_CLK>;\n+ clock-names = \"iface\",\n+ \"axi_m\",\n+ \"axi_s\",\n+ \"ahb\",\n+ \"aux\";\n+\n+ interrupts = ,\n+ ,\n+ ,\n+ ,\n+ ,\n+ ,\n+ ,\n+ ,\n+ ;\n+ interrupt-names = \"msi0\",\n+ \"msi1\",\n+ \"msi2\",\n+ \"msi3\",\n+ \"msi4\",\n+ \"msi5\",\n+ \"msi6\",\n+ \"msi7\",\n+ \"global\";\n+ #interrupt-cells = <1>;\n+ interrupt-map-mask = <0 0 0 0x7>;\n+ interrupt-map = <0 0 0 1 &intc 0 GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */\n+ <0 0 0 2 &intc 0 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, /* int_b */\n+ <0 0 0 3 &intc 0 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, /* int_c */\n+ <0 0 0 4 &intc 0 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; /* int_d */\n+\n+ phys = <&pcie_qmp1>;\n+ phy-names = \"pciephy\";\n+\n+ resets = <&gcc GCC_PCIE1_PIPE_ARES>,\n+ <&gcc GCC_PCIE1_SLEEP_ARES>,\n+ <&gcc GCC_PCIE1_CORE_STICKY_ARES>,\n+ <&gcc GCC_PCIE1_AXI_MASTER_ARES>,\n+ <&gcc GCC_PCIE1_AXI_SLAVE_ARES>,\n+ <&gcc GCC_PCIE1_AHB_ARES>,\n+ <&gcc GCC_PCIE1_AXI_MASTER_STICKY_ARES>;\n+ reset-names = \"pipe\",\n+ \"sleep\",\n+ \"sticky\",\n+ \"axi_m\",\n+ \"axi_s\",\n+ \"ahb\",\n+ \"axi_m_sticky\";\n+\n+ perst-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;\n+\n+ pcie@0 {\n+ device_type = \"pci\";\n+ reg = <0x0 0x0 0x0 0x0 0x0>;\n+ bus-range = <0x01 0xff>;\n+\n+ #address-cells = <3>;\n+ #size-cells = <2>;\n+ ranges;\n+ };\n+ };\ndiff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml\nindex 780a77f35b34..8ff4c16b31c8 100644\n--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml\n+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml\n@@ -23,7 +23,6 @@ properties:\n - qcom,pcie-ipq4019\n - qcom,pcie-ipq8064\n - qcom,pcie-ipq8064-v2\n- - qcom,pcie-ipq8074\n - qcom,pcie-ipq9574\n - qcom,pcie-msm8996\n - items:\n@@ -144,7 +143,6 @@ allOf:\n - qcom,pcie-ipq4019\n - qcom,pcie-ipq8064\n - qcom,pcie-ipq8064v2\n- - qcom,pcie-ipq8074\n then:\n properties:\n reg:\n@@ -315,37 +313,6 @@ allOf:\n resets: false\n reset-names: false\n \n- - if:\n- properties:\n- compatible:\n- contains:\n- enum:\n- - qcom,pcie-ipq8074\n- then:\n- properties:\n- clocks:\n- minItems: 5\n- maxItems: 5\n- clock-names:\n- items:\n- - const: iface # PCIe to SysNOC BIU clock\n- - const: axi_m # AXI Master clock\n- - const: axi_s # AXI Slave clock\n- - const: ahb # AHB clock\n- - const: aux # Auxiliary clock\n- resets:\n- minItems: 7\n- maxItems: 7\n- reset-names:\n- items:\n- - const: pipe # PIPE reset\n- - const: sleep # Sleep reset\n- - const: sticky # Core Sticky reset\n- - const: axi_m # AXI Master reset\n- - const: axi_s # AXI Slave reset\n- - const: ahb # AHB Reset\n- - const: axi_m_sticky # AXI Master Sticky reset\n-\n - if:\n properties:\n compatible:\n@@ -405,7 +372,6 @@ allOf:\n - qcom,pcie-ipq4019\n - qcom,pcie-ipq8064\n - qcom,pcie-ipq8064v2\n- - qcom,pcie-ipq8074\n - qcom,pcie-ipq9574\n then:\n required:\n@@ -428,7 +394,6 @@ allOf:\n compatible:\n contains:\n enum:\n- - qcom,pcie-ipq8074\n - qcom,pcie-msm8996\n - qcom,pcie-msm8998\n then:\n","prefixes":["v2","07/12"]}