{"id":2175232,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175232/?format=json","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.0/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20251217-dt-bindings-pci-qcom-v2-3-873721599754@oss.qualcomm.com>","date":"2025-12-17T16:19:09","name":"[v2,03/12] dt-bindings: PCI: qcom,pcie-sdm845: Move SDM845 to dedicated schema","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"2902ef1ea8bfff5161a4fc79cccdf643ce32b0ff","submitter":{"id":92171,"url":"http://patchwork.ozlabs.org/api/1.0/people/92171/?format=json","name":"Krzysztof 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,\n Manivannan Sadhasivam , Rob Herring ,\n Krzysztof Kozlowski , Conor Dooley ,\n Bjorn Andersson ","Cc":"linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,\n devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n Krzysztof Kozlowski ","X-Mailer":"b4 0.14.3","X-Developer-Signature":"v=1; a=openpgp-sha256; l=9814;\n i=krzysztof.kozlowski@oss.qualcomm.com; h=from:subject:message-id;\n bh=+ywvQ6UE8qgjXbEALCJ55zx0bbhDYknnRwzjNjSA+4A=;\n b=owEBbQKS/ZANAwAKAcE3ZuaGi4PXAcsmYgBpQtf+XtEzSRUxGoHGEmLqhHOTaTAt2TXmXZaht\n RvMfx6kni+JAjMEAAEKAB0WIQTd0mIoPREbIztuuKjBN2bmhouD1wUCaULX/gAKCRDBN2bmhouD\n 1yZ2EACIXXW63dozcZjxvVPn5sG7XaZ5ttnKNvOQwW9tlGRiN1hBNIrw6Fg/lm8pKxIkbkYIcCZ\n g+OujZFd/+ZEC5LLBGcjiINReGo9bizClZYJKyiEwHJmc3PB17vS1fdou0dlACThzLfVPKgRo7s\n GJYBA26fmr8gTc04PMqns61AUtjH+W9sKtlRlvQK3OtoxgQO8Pfz+DAkkxVRLkWXJxm+Zk4MFwS\n 17ekEGt2qoYKrl2Y7vOB87QRMbi+xI4sJk2vNskHPFY7HnjnR8yF7olLT3sHF53mGrMLHvM9Sn4\n RjwJQzw/prjCSD7NHOi2+oqJ+Tfq/1rkRYlmfcJiuxevc0ZP7S2Ir5ybA+XpwU9LOC728aGEpH2\n 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engine=8.22.0-2510240001 definitions=main-2512170128"},"content":"Move SDM845 PCIe devices from qcom,pcie.yaml binding to a dedicated file\nto make reviewing and maintenance easier.\n\nNew schema is equivalent to the old one with few changes:\n - Adding a required compatible, which is actually redundant.\n - Drop the really obvious comments next to clock/reg/reset-names items.\n - Expecting eight MSI interrupts and one global, instead of only one,\n which was incomplete hardware description.\n\nReviewed-by: Rob Herring (Arm) \nSigned-off-by: Krzysztof Kozlowski \n---\n .../devicetree/bindings/pci/qcom,pcie-sdm845.yaml | 190 +++++++++++++++++++++\n .../devicetree/bindings/pci/qcom,pcie.yaml | 46 -----\n 2 files changed, 190 insertions(+), 46 deletions(-)","diff":"diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sdm845.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sdm845.yaml\nnew file mode 100644\nindex 000000000000..1ec9e4f3ff57\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sdm845.yaml\n@@ -0,0 +1,190 @@\n+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/pci/qcom,pcie-sdm845.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: Qualcomm SDM845 PCI Express Root Complex\n+\n+maintainers:\n+ - Bjorn Andersson \n+ - Manivannan Sadhasivam \n+\n+properties:\n+ compatible:\n+ enum:\n+ - qcom,pcie-sdm845\n+\n+ reg:\n+ minItems: 4\n+ maxItems: 5\n+\n+ reg-names:\n+ minItems: 4\n+ items:\n+ - const: parf\n+ - const: dbi\n+ - const: elbi\n+ - const: config\n+ - const: mhi\n+\n+ clocks:\n+ minItems: 7\n+ maxItems: 8\n+\n+ clock-names:\n+ minItems: 7\n+ items:\n+ - const: pipe\n+ - const: aux\n+ - const: cfg\n+ - const: bus_master # Master AXI clock\n+ - const: bus_slave # Slave AXI clock\n+ - const: slave_q2a\n+ - enum: [ ref, tbu ]\n+ - const: tbu\n+\n+ interrupts:\n+ minItems: 8\n+ maxItems: 9\n+\n+ interrupt-names:\n+ minItems: 8\n+ items:\n+ - const: msi0\n+ - const: msi1\n+ - const: msi2\n+ - const: msi3\n+ - const: msi4\n+ - const: msi5\n+ - const: msi6\n+ - const: msi7\n+ - const: global\n+\n+ resets:\n+ maxItems: 1\n+\n+ reset-names:\n+ items:\n+ - const: pci\n+\n+required:\n+ - power-domains\n+ - resets\n+ - reset-names\n+\n+allOf:\n+ - $ref: qcom,pcie-common.yaml#\n+\n+unevaluatedProperties: false\n+\n+examples:\n+ - |\n+ #include \n+ #include \n+ #include \n+\n+ soc {\n+ #address-cells = <2>;\n+ #size-cells = <2>;\n+\n+ pcie@1c00000 {\n+ compatible = \"qcom,pcie-sdm845\";\n+ reg = <0x0 0x01c00000 0x0 0x2000>,\n+ <0x0 0x60000000 0x0 0xf1d>,\n+ <0x0 0x60000f20 0x0 0xa8>,\n+ <0x0 0x60100000 0x0 0x100000>,\n+ <0x0 0x01c07000 0x0 0x1000>;\n+ reg-names = \"parf\", \"dbi\", \"elbi\", \"config\", \"mhi\";\n+ ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,\n+ <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0xd00000>;\n+\n+ device_type = \"pci\";\n+ linux,pci-domain = <0>;\n+ bus-range = <0x00 0xff>;\n+ num-lanes = <1>;\n+\n+ #address-cells = <3>;\n+ #size-cells = <2>;\n+\n+ clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,\n+ <&gcc GCC_PCIE_0_AUX_CLK>,\n+ <&gcc GCC_PCIE_0_CFG_AHB_CLK>,\n+ <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,\n+ <&gcc GCC_PCIE_0_SLV_AXI_CLK>,\n+ <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>,\n+ <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;\n+ clock-names = \"pipe\",\n+ \"aux\",\n+ \"cfg\",\n+ \"bus_master\",\n+ \"bus_slave\",\n+ \"slave_q2a\",\n+ \"tbu\";\n+\n+ interrupts = ,\n+ ,\n+ ,\n+ ,\n+ ,\n+ ,\n+ ,\n+ ,\n+ ;\n+ interrupt-names = \"msi0\",\n+ \"msi1\",\n+ \"msi2\",\n+ \"msi3\",\n+ \"msi4\",\n+ \"msi5\",\n+ \"msi6\",\n+ \"msi7\",\n+ \"global\";\n+ #interrupt-cells = <1>;\n+ interrupt-map-mask = <0 0 0 0x7>;\n+ interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */\n+ <0 0 0 2 &intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */\n+ <0 0 0 3 &intc 0 0 GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */\n+ <0 0 0 4 &intc 0 0 GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */\n+\n+ iommu-map = <0x0 &apps_smmu 0x1c10 0x1>,\n+ <0x100 &apps_smmu 0x1c11 0x1>,\n+ <0x200 &apps_smmu 0x1c12 0x1>,\n+ <0x300 &apps_smmu 0x1c13 0x1>,\n+ <0x400 &apps_smmu 0x1c14 0x1>,\n+ <0x500 &apps_smmu 0x1c15 0x1>,\n+ <0x600 &apps_smmu 0x1c16 0x1>,\n+ <0x700 &apps_smmu 0x1c17 0x1>,\n+ <0x800 &apps_smmu 0x1c18 0x1>,\n+ <0x900 &apps_smmu 0x1c19 0x1>,\n+ <0xa00 &apps_smmu 0x1c1a 0x1>,\n+ <0xb00 &apps_smmu 0x1c1b 0x1>,\n+ <0xc00 &apps_smmu 0x1c1c 0x1>,\n+ <0xd00 &apps_smmu 0x1c1d 0x1>,\n+ <0xe00 &apps_smmu 0x1c1e 0x1>,\n+ <0xf00 &apps_smmu 0x1c1f 0x1>;\n+\n+ power-domains = <&gcc PCIE_0_GDSC>;\n+\n+ phys = <&pcie0_phy>;\n+ phy-names = \"pciephy\";\n+\n+ resets = <&gcc GCC_PCIE_0_BCR>;\n+ reset-names = \"pci\";\n+\n+ perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;\n+ wake-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>;\n+\n+ vddpe-3v3-supply = <&pcie0_3p3v_dual>;\n+\n+ pcie@0 {\n+ device_type = \"pci\";\n+ reg = <0x0 0x0 0x0 0x0 0x0>;\n+ bus-range = <0x01 0xff>;\n+\n+ #address-cells = <3>;\n+ #size-cells = <2>;\n+ ranges;\n+ };\n+ };\n+ };\ndiff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml\nindex 0e6d11791eec..0a3ce5a46372 100644\n--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml\n+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml\n@@ -30,7 +30,6 @@ properties:\n - qcom,pcie-ipq9574\n - qcom,pcie-msm8996\n - qcom,pcie-qcs404\n- - qcom,pcie-sdm845\n - items:\n - enum:\n - qcom,pcie-ipq5332\n@@ -194,7 +193,6 @@ allOf:\n enum:\n - qcom,pcie-apq8084\n - qcom,pcie-msm8996\n- - qcom,pcie-sdm845\n then:\n properties:\n reg:\n@@ -514,49 +512,6 @@ allOf:\n - const: pwr # PWR reset\n - const: ahb # AHB reset\n \n- - if:\n- properties:\n- compatible:\n- contains:\n- enum:\n- - qcom,pcie-sdm845\n- then:\n- oneOf:\n- # Unfortunately the \"optional\" ref clock is used in the middle of the list\n- - properties:\n- clocks:\n- minItems: 8\n- maxItems: 8\n- clock-names:\n- items:\n- - const: pipe # PIPE clock\n- - const: aux # Auxiliary clock\n- - const: cfg # Configuration clock\n- - const: bus_master # Master AXI clock\n- - const: bus_slave # Slave AXI clock\n- - const: slave_q2a # Slave Q2A clock\n- - const: ref # REFERENCE clock\n- - const: tbu # PCIe TBU clock\n- - properties:\n- clocks:\n- minItems: 7\n- maxItems: 7\n- clock-names:\n- items:\n- - const: pipe # PIPE clock\n- - const: aux # Auxiliary clock\n- - const: cfg # Configuration clock\n- - const: bus_master # Master AXI clock\n- - const: bus_slave # Slave AXI clock\n- - const: slave_q2a # Slave Q2A clock\n- - const: tbu # PCIe TBU clock\n- properties:\n- resets:\n- maxItems: 1\n- reset-names:\n- items:\n- - const: pci # PCIe core reset\n-\n - if:\n not:\n properties:\n@@ -598,7 +553,6 @@ allOf:\n - qcom,pcie-ipq8074-gen3\n - qcom,pcie-msm8996\n - qcom,pcie-msm8998\n- - qcom,pcie-sdm845\n then:\n oneOf:\n - properties:\n","prefixes":["v2","03/12"]}