{"id":2175227,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175227/?format=json","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.0/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20251217151609.3162665-7-den@valinux.co.jp>","date":"2025-12-17T15:15:40","name":"[RFC,v3,06/35] NTB: ntb_transport: Support partial memory windows with offsets","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"dcb71afeadcf50bbac74824431557f928023062f","submitter":{"id":91573,"url":"http://patchwork.ozlabs.org/api/1.0/people/91573/?format=json","name":"Koichiro Den","email":"den@valinux.co.jp"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20251217151609.3162665-7-den@valinux.co.jp/mbox/","series":[{"id":485709,"url":"http://patchwork.ozlabs.org/api/1.0/series/485709/?format=json","date":"2025-12-17T15:15:53","name":"NTB transport backed by endpoint DW eDMA","version":3,"mbox":"http://patchwork.ozlabs.org/series/485709/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175227/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=valinux.co.jp header.i=@valinux.co.jp\n header.a=rsa-sha256 header.s=selector1 header.b=L6Gyjd0r;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; 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bh=IOhVH5WbbE7TOgwhUWG5IWDXoW2MiIJ5KWF0mB2sGN8=;\n b=L6Gyjd0rnIt6L25/zve9O8/ujQPkIFhOcuq4AMo0ZMpX7WTbws8yILAXIP4jvoVyiNQ0RS1AdEF3AS7+4rA4yKwIR35Ek9Ei7BTp7/ONDaNZQKLzmyIAaVG/ojQ6uN7m1QiFQ4zaHp3t6IwUzPOHvOp8e5+vRvSAYuLpnDQZkwo=","From":"Koichiro Den ","To":"Frank.Li@nxp.com,\n\tdave.jiang@intel.com,\n\tntb@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tdmaengine@vger.kernel.org,\n\tlinux-renesas-soc@vger.kernel.org,\n\tnetdev@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Cc":"mani@kernel.org,\n\tkwilczynski@kernel.org,\n\tkishon@kernel.org,\n\tbhelgaas@google.com,\n\tcorbet@lwn.net,\n\tgeert+renesas@glider.be,\n\tmagnus.damm@gmail.com,\n\trobh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tvkoul@kernel.org,\n\tjoro@8bytes.org,\n\twill@kernel.org,\n\trobin.murphy@arm.com,\n\tjdmason@kudzu.us,\n\tallenbh@gmail.com,\n\tandrew+netdev@lunn.ch,\n\tdavem@davemloft.net,\n\tedumazet@google.com,\n\tkuba@kernel.org,\n\tpabeni@redhat.com,\n\tBasavaraj.Natikar@amd.com,\n\tShyam-sundar.S-k@amd.com,\n\tkurt.schwemmer@microsemi.com,\n\tlogang@deltatee.com,\n\tjingoohan1@gmail.com,\n\tlpieralisi@kernel.org,\n\tutkarsh02t@gmail.com,\n\tjbrunet@baylibre.com,\n\tdlemoal@kernel.org,\n\tarnd@arndb.de,\n\telfring@users.sourceforge.net,\n\tden@valinux.co.jp","Subject":"[RFC PATCH v3 06/35] NTB: ntb_transport: Support partial memory\n windows with offsets","Date":"Thu, 18 Dec 2025 00:15:40 +0900","Message-ID":"<20251217151609.3162665-7-den@valinux.co.jp>","X-Mailer":"git-send-email 2.51.0","In-Reply-To":"<20251217151609.3162665-1-den@valinux.co.jp>","References":"<20251217151609.3162665-1-den@valinux.co.jp>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"TYWPR01CA0033.jpnprd01.prod.outlook.com\n (2603:1096:400:aa::20) To TYWP286MB2697.JPNP286.PROD.OUTLOOK.COM\n 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fb65cffe-70ab-44cf-694f-08de3d7f3a9b","X-MS-Exchange-CrossTenant-AuthSource":"TYWP286MB2697.JPNP286.PROD.OUTLOOK.COM","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"17 Dec 2025 15:16:18.7573\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"7a57bee8-f73d-4c5f-a4f7-d72c91c8c111","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n yqzCmVm0eMA58iFalQqTz8rrrqFkirZLEchQ7IY/lx3XgzQxwLBqNQbGs1m+iaILnWiRk3Lid7sJq7mbfDh3Cg==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"OS9P286MB4633"},"content":"The NTB API functions ntb_mw_set_trans() and ntb_mw_get_align() now\nsupport non-zero MW offsets. Update ntb_transport to make use of this\ncapability by propagating the offset when setting up MW translations.\n\nSigned-off-by: Koichiro Den \n---\n drivers/ntb/ntb_transport.c | 5 +++--\n 1 file changed, 3 insertions(+), 2 deletions(-)","diff":"diff --git a/drivers/ntb/ntb_transport.c b/drivers/ntb/ntb_transport.c\nindex e16a8147ddc5..57b4c0511927 100644\n--- a/drivers/ntb/ntb_transport.c\n+++ b/drivers/ntb/ntb_transport.c\n@@ -823,13 +823,14 @@ static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw,\n \tsize_t xlat_size, buff_size;\n \tresource_size_t xlat_align;\n \tresource_size_t xlat_align_size;\n+\tresource_size_t offset;\n \tint rc;\n \n \tif (!size)\n \t\treturn -EINVAL;\n \n \trc = ntb_mw_get_align(nt->ndev, PIDX, num_mw, &xlat_align,\n-\t\t\t &xlat_align_size, NULL, NULL);\n+\t\t\t &xlat_align_size, NULL, &offset);\n \tif (rc)\n \t\treturn rc;\n \n@@ -864,7 +865,7 @@ static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw,\n \n \t/* Notify HW the memory location of the receive buffer */\n \trc = ntb_mw_set_trans(nt->ndev, PIDX, num_mw, mw->dma_addr,\n-\t\t\t mw->xlat_size, 0);\n+\t\t\t mw->xlat_size, offset);\n \tif (rc) {\n \t\tdev_err(&pdev->dev, \"Unable to set mw%d translation\", num_mw);\n \t\tntb_free_mw(nt, num_mw);\n","prefixes":["RFC","v3","06/35"]}