{"id":2175210,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175210/?format=json","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.0/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20251217151609.3162665-11-den@valinux.co.jp>","date":"2025-12-17T15:15:44","name":"[RFC,v3,10/35] dmaengine: dw-edma: Fix MSI data values for multi-vector IMWr interrupts","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"57bf0a6d764006144e7a82fe08658591a3231ed3","submitter":{"id":91573,"url":"http://patchwork.ozlabs.org/api/1.0/people/91573/?format=json","name":"Koichiro Den","email":"den@valinux.co.jp"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20251217151609.3162665-11-den@valinux.co.jp/mbox/","series":[{"id":485709,"url":"http://patchwork.ozlabs.org/api/1.0/series/485709/?format=json","date":"2025-12-17T15:15:53","name":"NTB transport backed by endpoint DW eDMA","version":3,"mbox":"http://patchwork.ozlabs.org/series/485709/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175210/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=valinux.co.jp header.i=@valinux.co.jp\n header.a=rsa-sha256 header.s=selector1 header.b=A5B/rdQM;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n 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","To":"Frank.Li@nxp.com,\n\tdave.jiang@intel.com,\n\tntb@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tdmaengine@vger.kernel.org,\n\tlinux-renesas-soc@vger.kernel.org,\n\tnetdev@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Cc":"mani@kernel.org,\n\tkwilczynski@kernel.org,\n\tkishon@kernel.org,\n\tbhelgaas@google.com,\n\tcorbet@lwn.net,\n\tgeert+renesas@glider.be,\n\tmagnus.damm@gmail.com,\n\trobh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tvkoul@kernel.org,\n\tjoro@8bytes.org,\n\twill@kernel.org,\n\trobin.murphy@arm.com,\n\tjdmason@kudzu.us,\n\tallenbh@gmail.com,\n\tandrew+netdev@lunn.ch,\n\tdavem@davemloft.net,\n\tedumazet@google.com,\n\tkuba@kernel.org,\n\tpabeni@redhat.com,\n\tBasavaraj.Natikar@amd.com,\n\tShyam-sundar.S-k@amd.com,\n\tkurt.schwemmer@microsemi.com,\n\tlogang@deltatee.com,\n\tjingoohan1@gmail.com,\n\tlpieralisi@kernel.org,\n\tutkarsh02t@gmail.com,\n\tjbrunet@baylibre.com,\n\tdlemoal@kernel.org,\n\tarnd@arndb.de,\n\telfring@users.sourceforge.net,\n\tden@valinux.co.jp","Subject":"[RFC PATCH v3 10/35] dmaengine: dw-edma: Fix MSI data values for\n multi-vector IMWr interrupts","Date":"Thu, 18 Dec 2025 00:15:44 +0900","Message-ID":"<20251217151609.3162665-11-den@valinux.co.jp>","X-Mailer":"git-send-email 2.51.0","In-Reply-To":"<20251217151609.3162665-1-den@valinux.co.jp>","References":"<20251217151609.3162665-1-den@valinux.co.jp>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"TYCP286CA0251.JPNP286.PROD.OUTLOOK.COM\n (2603:1096:400:456::20) To TYWP286MB2697.JPNP286.PROD.OUTLOOK.COM\n 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d1a6e9f2-f851-4e14-2211-08de3d7f3ca0","X-MS-Exchange-CrossTenant-AuthSource":"TYWP286MB2697.JPNP286.PROD.OUTLOOK.COM","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"17 Dec 2025 15:16:22.1194\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"7a57bee8-f73d-4c5f-a4f7-d72c91c8c111","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n 9fx1PDO60d02lwUeeKRd+Q9AHLnZeRt5lkHcNkDiQIdqFTdrcoEJLjfHXU6fcoCWwv+LHc9kl+UFad2jHnhimg==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"OS9P286MB4633"},"content":"When multiple MSI vectors are allocated for the DesignWare eDMA, the\ndriver currently records the same MSI message for all IRQs by calling\nget_cached_msi_msg() per vector. For multi-vector MSI (as opposed to\nMSI-X), the cached message corresponds to vector 0 and msg.data is\nsupposed to be adjusted by the vector index.\n\nAs a result, all eDMA interrupts share the same MSI data value and the\ninterrupt controller cannot distinguish between them.\n\nIntroduce dw_edma_compose_msi() to construct the correct MSI message for\neach vector. For MSI-X nothing changes. For multi-vector MSI, derive the\nbase IRQ with msi_get_virq(dev, 0) and apply the per-vector offset to\nmsg.data before storing it in dw->irq[i].msi.\n\nThis makes each IMWr MSI vector use a unique MSI data value.\n\nSigned-off-by: Koichiro Den \n---\n drivers/dma/dw-edma/dw-edma-core.c | 28 ++++++++++++++++++++++++----\n 1 file changed, 24 insertions(+), 4 deletions(-)","diff":"diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c\nindex 744c60ec9641..1b935da65d05 100644\n--- a/drivers/dma/dw-edma/dw-edma-core.c\n+++ b/drivers/dma/dw-edma/dw-edma-core.c\n@@ -855,6 +855,28 @@ static inline void dw_edma_add_irq_mask(u32 *mask, u32 alloc, u16 cnt)\n \t\t(*mask)++;\n }\n \n+static void dw_edma_compose_msi(struct device *dev, int irq, struct msi_msg *out)\n+{\n+\tstruct msi_desc *desc = irq_get_msi_desc(irq);\n+\tstruct msi_msg msg;\n+\tunsigned int base;\n+\n+\tif (!desc)\n+\t\treturn;\n+\n+\tget_cached_msi_msg(irq, &msg);\n+\tif (!desc->pci.msi_attrib.is_msix) {\n+\t\t/*\n+\t\t * For multi-vector MSI, the cached message corresponds to\n+\t\t * vector 0. Adjust msg.data by the IRQ index so that each\n+\t\t * vector gets a unique MSI data value for IMWr Data Register.\n+\t\t */\n+\t\tbase = msi_get_virq(dev, 0);\n+\t\tmsg.data |= (irq - base);\n+\t}\n+\t*out = msg;\n+}\n+\n static int dw_edma_irq_request(struct dw_edma *dw,\n \t\t\t u32 *wr_alloc, u32 *rd_alloc)\n {\n@@ -885,8 +907,7 @@ static int dw_edma_irq_request(struct dw_edma *dw,\n \t\t\treturn err;\n \t\t}\n \n-\t\tif (irq_get_msi_desc(irq))\n-\t\t\tget_cached_msi_msg(irq, &dw->irq[0].msi);\n+\t\tdw_edma_compose_msi(dev, irq, &dw->irq[0].msi);\n \n \t\tdw->nr_irqs = 1;\n \t} else {\n@@ -912,8 +933,7 @@ static int dw_edma_irq_request(struct dw_edma *dw,\n \t\t\tif (err)\n \t\t\t\tgoto err_irq_free;\n \n-\t\t\tif (irq_get_msi_desc(irq))\n-\t\t\t\tget_cached_msi_msg(irq, &dw->irq[i].msi);\n+\t\t\tdw_edma_compose_msi(dev, irq, &dw->irq[i].msi);\n \t\t}\n \n \t\tdw->nr_irqs = i;\n","prefixes":["RFC","v3","10/35"]}