{"id":2175197,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175197/?format=json","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.0/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20251217151609.3162665-3-den@valinux.co.jp>","date":"2025-12-17T15:15:36","name":"[RFC,v3,02/35] NTB: epf: Add mwN_offset support and config region versioning","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"f9fbe8f7682138472f935ec45bddd93249bf7719","submitter":{"id":91573,"url":"http://patchwork.ozlabs.org/api/1.0/people/91573/?format=json","name":"Koichiro Den","email":"den@valinux.co.jp"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20251217151609.3162665-3-den@valinux.co.jp/mbox/","series":[{"id":485709,"url":"http://patchwork.ozlabs.org/api/1.0/series/485709/?format=json","date":"2025-12-17T15:15:53","name":"NTB transport backed by endpoint DW eDMA","version":3,"mbox":"http://patchwork.ozlabs.org/series/485709/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175197/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=valinux.co.jp header.i=@valinux.co.jp\n header.a=rsa-sha256 header.s=selector1 header.b=cEHu0fo5;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n 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bh=VD6NCTTJahO4Rf1Dji0OqiYFqVU8dPDbvWQgpvSQdFQ=;\n b=cEHu0fo5SZttzWLNZ2M5LOJaHQGp0CAkGyy3rY5NGnRQ672VRa/i70JIZq8SSnZZ8wlhW2gcPypd5/XXa7kTNonRvtlz3B0SEC5CO824NTHql2AxTHJFF0dfxAiR6SWOH402/p+dvjH2BU4PThFyrtR37jeC83KNRFLimcquJ/w=","From":"Koichiro Den ","To":"Frank.Li@nxp.com,\n\tdave.jiang@intel.com,\n\tntb@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tdmaengine@vger.kernel.org,\n\tlinux-renesas-soc@vger.kernel.org,\n\tnetdev@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Cc":"mani@kernel.org,\n\tkwilczynski@kernel.org,\n\tkishon@kernel.org,\n\tbhelgaas@google.com,\n\tcorbet@lwn.net,\n\tgeert+renesas@glider.be,\n\tmagnus.damm@gmail.com,\n\trobh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tvkoul@kernel.org,\n\tjoro@8bytes.org,\n\twill@kernel.org,\n\trobin.murphy@arm.com,\n\tjdmason@kudzu.us,\n\tallenbh@gmail.com,\n\tandrew+netdev@lunn.ch,\n\tdavem@davemloft.net,\n\tedumazet@google.com,\n\tkuba@kernel.org,\n\tpabeni@redhat.com,\n\tBasavaraj.Natikar@amd.com,\n\tShyam-sundar.S-k@amd.com,\n\tkurt.schwemmer@microsemi.com,\n\tlogang@deltatee.com,\n\tjingoohan1@gmail.com,\n\tlpieralisi@kernel.org,\n\tutkarsh02t@gmail.com,\n\tjbrunet@baylibre.com,\n\tdlemoal@kernel.org,\n\tarnd@arndb.de,\n\telfring@users.sourceforge.net,\n\tden@valinux.co.jp","Subject":"[RFC PATCH v3 02/35] NTB: epf: Add mwN_offset support and config\n region versioning","Date":"Thu, 18 Dec 2025 00:15:36 +0900","Message-ID":"<20251217151609.3162665-3-den@valinux.co.jp>","X-Mailer":"git-send-email 2.51.0","In-Reply-To":"<20251217151609.3162665-1-den@valinux.co.jp>","References":"<20251217151609.3162665-1-den@valinux.co.jp>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"TYCP286CA0242.JPNP286.PROD.OUTLOOK.COM\n (2603:1096:400:456::9) To TYWP286MB2697.JPNP286.PROD.OUTLOOK.COM\n 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d65ab6f4-0778-4b29-fb53-08de3d7f3887","X-MS-Exchange-CrossTenant-AuthSource":"TYWP286MB2697.JPNP286.PROD.OUTLOOK.COM","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"17 Dec 2025 15:16:15.2411\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"7a57bee8-f73d-4c5f-a4f7-d72c91c8c111","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n skeYbzjyWzARUN/MamArF/U6DWVowgswXkylL1C7egc6tYVKDZykfQDQr0bEWD7ZBn/6wg6wa6gMyagCgrpK4g==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"OS9P286MB4633"},"content":"Introduce new mwN_offset configfs attributes to specify memory window\noffsets. This enables mapping multiple windows into a single BAR at\narbitrary offsets, improving layout flexibility.\n\nExtend the control register region and add a 32-bit config version\nfield. Reuse NTB_EPF_TOPOLOGY (0x0C), which is currently unused, as the\nversion register. The endpoint function driver writes 1\n(NTB_EPF_CTRL_VERSION_V1), and ntb_hw_epf reads it at probe time and\nrefuses to bind to unknown versions.\n\nEndpoint running with an older kernel that do not program\nNTB_EPF_CTRL_VERSION will be rejected early by host with newer kernel,\ninstead of misbehaving at runtime.\n\nSigned-off-by: Koichiro Den \n---\n drivers/ntb/hw/epf/ntb_hw_epf.c | 44 +++++-\n drivers/pci/endpoint/functions/pci-epf-vntb.c | 136 ++++++++++++++++--\n 2 files changed, 160 insertions(+), 20 deletions(-)","diff":"diff --git a/drivers/ntb/hw/epf/ntb_hw_epf.c b/drivers/ntb/hw/epf/ntb_hw_epf.c\nindex d3ecf25a5162..126ba38e32ea 100644\n--- a/drivers/ntb/hw/epf/ntb_hw_epf.c\n+++ b/drivers/ntb/hw/epf/ntb_hw_epf.c\n@@ -30,18 +30,22 @@\n #define NTB_EPF_LINK_STATUS\t0x0A\n #define LINK_STATUS_UP\t\tBIT(0)\n \n-#define NTB_EPF_TOPOLOGY\t0x0C\n+/* 0x24 (32bit) is unused */\n+#define NTB_EPF_CTRL_VERSION\t0x0C\n #define NTB_EPF_LOWER_ADDR\t0x10\n #define NTB_EPF_UPPER_ADDR\t0x14\n #define NTB_EPF_LOWER_SIZE\t0x18\n #define NTB_EPF_UPPER_SIZE\t0x1C\n #define NTB_EPF_MW_COUNT\t0x20\n-#define NTB_EPF_MW1_OFFSET\t0x24\n #define NTB_EPF_SPAD_OFFSET\t0x28\n #define NTB_EPF_SPAD_COUNT\t0x2C\n #define NTB_EPF_DB_ENTRY_SIZE\t0x30\n #define NTB_EPF_DB_DATA(n)\t(0x34 + (n) * 4)\n #define NTB_EPF_DB_OFFSET(n)\t(0xB4 + (n) * 4)\n+#define NTB_EPF_MW_OFFSET(n)\t(0x134 + (n) * 4)\n+#define NTB_EPF_MW_SIZE(n)\t(0x144 + (n) * 4)\n+\n+#define NTB_EPF_CTRL_VERSION_V1\t1\n \n #define NTB_EPF_MIN_DB_COUNT\t3\n #define NTB_EPF_MAX_DB_COUNT\t31\n@@ -451,11 +455,12 @@ static int ntb_epf_peer_mw_get_addr(struct ntb_dev *ntb, int idx,\n \t\t\t\t phys_addr_t *base, resource_size_t *size)\n {\n \tstruct ntb_epf_dev *ndev = ntb_ndev(ntb);\n-\tu32 offset = 0;\n+\tresource_size_t bar_sz;\n+\tu32 offset, sz;\n \tint bar;\n \n-\tif (idx == 0)\n-\t\toffset = readl(ndev->ctrl_reg + NTB_EPF_MW1_OFFSET);\n+\toffset = readl(ndev->ctrl_reg + NTB_EPF_MW_OFFSET(idx));\n+\tsz = readl(ndev->ctrl_reg + NTB_EPF_MW_SIZE(idx));\n \n \tbar = ntb_epf_mw_to_bar(ndev, idx);\n \tif (bar < 0)\n@@ -464,8 +469,11 @@ static int ntb_epf_peer_mw_get_addr(struct ntb_dev *ntb, int idx,\n \tif (base)\n \t\t*base = pci_resource_start(ndev->ntb.pdev, bar) + offset;\n \n-\tif (size)\n-\t\t*size = pci_resource_len(ndev->ntb.pdev, bar) - offset;\n+\tif (size) {\n+\t\tbar_sz = pci_resource_len(ndev->ntb.pdev, bar);\n+\t\t*size = sz ? min_t(resource_size_t, sz, bar_sz - offset)\n+\t\t\t : (bar_sz > offset ? bar_sz - offset : 0);\n+\t}\n \n \treturn 0;\n }\n@@ -547,6 +555,24 @@ static inline void ntb_epf_init_struct(struct ntb_epf_dev *ndev,\n \tndev->ntb.ops = &ntb_epf_ops;\n }\n \n+static int ntb_epf_check_version(struct ntb_epf_dev *ndev)\n+{\n+\tstruct device *dev = ndev->dev;\n+\tu32 ver;\n+\n+\tver = readl(ndev->ctrl_reg + NTB_EPF_CTRL_VERSION);\n+\n+\tswitch (ver) {\n+\tcase NTB_EPF_CTRL_VERSION_V1:\n+\t\tbreak;\n+\tdefault:\n+\t\tdev_err(dev, \"Unsupported NTB EPF version %u\\n\", ver);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn 0;\n+}\n+\n static int ntb_epf_init_dev(struct ntb_epf_dev *ndev)\n {\n \tstruct device *dev = ndev->dev;\n@@ -695,6 +721,10 @@ static int ntb_epf_pci_probe(struct pci_dev *pdev,\n \t\treturn ret;\n \t}\n \n+\tret = ntb_epf_check_version(ndev);\n+\tif (ret)\n+\t\treturn ret;\n+\n \tret = ntb_epf_init_dev(ndev);\n \tif (ret) {\n \t\tdev_err(dev, \"Failed to init device\\n\");\ndiff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/endpoint/functions/pci-epf-vntb.c\nindex 56aab5d354d6..4dfb3e40dffa 100644\n--- a/drivers/pci/endpoint/functions/pci-epf-vntb.c\n+++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c\n@@ -39,6 +39,7 @@\n #include \n #include \n #include \n+#include \n #include \n #include \n \n@@ -61,6 +62,7 @@ static struct workqueue_struct *kpcintb_workqueue;\n \n #define LINK_STATUS_UP\t\t\tBIT(0)\n \n+#define CTRL_VERSION\t\t\t1\n #define SPAD_COUNT\t\t\t64\n #define DB_COUNT\t\t\t4\n #define NTB_MW_OFFSET\t\t\t2\n@@ -107,7 +109,7 @@ struct epf_ntb_ctrl {\n \tu32 argument;\n \tu16 command_status;\n \tu16 link_status;\n-\tu32 topology;\n+\tu32 version;\n \tu64 addr;\n \tu64 size;\n \tu32 num_mws;\n@@ -117,6 +119,8 @@ struct epf_ntb_ctrl {\n \tu32 db_entry_size;\n \tu32 db_data[MAX_DB_COUNT];\n \tu32 db_offset[MAX_DB_COUNT];\n+\tu32 mw_offset[MAX_MW];\n+\tu32 mw_size[MAX_MW];\n } __packed;\n \n struct epf_ntb {\n@@ -128,6 +132,7 @@ struct epf_ntb {\n \tu32 db_count;\n \tu32 spad_count;\n \tu64 mws_size[MAX_MW];\n+\tu64 mws_offset[MAX_MW];\n \tatomic64_t db;\n \tu32 vbus_number;\n \tu16 vntb_pid;\n@@ -454,10 +459,13 @@ static int epf_ntb_config_spad_bar_alloc(struct epf_ntb *ntb)\n \tntb->reg = base;\n \n \tctrl = ntb->reg;\n+\tctrl->version = CTRL_VERSION;\n \tctrl->spad_offset = ctrl_size;\n \n \tctrl->spad_count = spad_count;\n \tctrl->num_mws = ntb->num_mws;\n+\tmemset(ctrl->mw_offset, 0, sizeof(ctrl->mw_offset));\n+\tmemset(ctrl->mw_size, 0, sizeof(ctrl->mw_size));\n \tntb->spad_size = spad_size;\n \n \tctrl->db_entry_size = sizeof(u32);\n@@ -689,15 +697,31 @@ static void epf_ntb_db_bar_clear(struct epf_ntb *ntb)\n */\n static int epf_ntb_mw_bar_init(struct epf_ntb *ntb)\n {\n+\tstruct device *dev = &ntb->epf->dev;\n+\tu64 bar_ends[BAR_5 + 1] = { 0 };\n+\tunsigned long bars_used = 0;\n+\tenum pci_barno barno;\n+\tu64 off, size, end;\n \tint ret = 0;\n \tint i;\n-\tu64 size;\n-\tenum pci_barno barno;\n-\tstruct device *dev = &ntb->epf->dev;\n \n \tfor (i = 0; i < ntb->num_mws; i++) {\n-\t\tsize = ntb->mws_size[i];\n \t\tbarno = ntb->epf_ntb_bar[BAR_MW1 + i];\n+\t\toff = ntb->mws_offset[i];\n+\t\tsize = ntb->mws_size[i];\n+\t\tend = off + size;\n+\t\tif (end > bar_ends[barno])\n+\t\t\tbar_ends[barno] = end;\n+\t\tbars_used |= BIT(barno);\n+\t}\n+\n+\tfor (barno = BAR_0; barno <= BAR_5; barno++) {\n+\t\tif (!(bars_used & BIT(barno)))\n+\t\t\tcontinue;\n+\t\tif (bar_ends[barno] < SZ_4K)\n+\t\t\tsize = SZ_4K;\n+\t\telse\n+\t\t\tsize = roundup_pow_of_two(bar_ends[barno]);\n \n \t\tntb->epf->bar[barno].barno = barno;\n \t\tntb->epf->bar[barno].size = size;\n@@ -713,8 +737,12 @@ static int epf_ntb_mw_bar_init(struct epf_ntb *ntb)\n \t\t\t\t &ntb->epf->bar[barno]);\n \t\tif (ret) {\n \t\t\tdev_err(dev, \"MW set failed\\n\");\n-\t\t\tgoto err_alloc_mem;\n+\t\t\tgoto err_set_bar;\n \t\t}\n+\t}\n+\n+\tfor (i = 0; i < ntb->num_mws; i++) {\n+\t\tsize = ntb->mws_size[i];\n \n \t\t/* Allocate EPC outbound memory windows to vpci vntb device */\n \t\tntb->vpci_mw_addr[i] = pci_epc_mem_alloc_addr(ntb->epf->epc,\n@@ -723,19 +751,31 @@ static int epf_ntb_mw_bar_init(struct epf_ntb *ntb)\n \t\tif (!ntb->vpci_mw_addr[i]) {\n \t\t\tret = -ENOMEM;\n \t\t\tdev_err(dev, \"Failed to allocate source address\\n\");\n-\t\t\tgoto err_set_bar;\n+\t\t\tgoto err_alloc_mem;\n \t\t}\n \t}\n \n+\tfor (i = 0; i < ntb->num_mws; i++) {\n+\t\tntb->reg->mw_offset[i] = (u32)ntb->mws_offset[i];\n+\t\tntb->reg->mw_size[i] = (u32)ntb->mws_size[i];\n+\t}\n+\n \treturn ret;\n \n-err_set_bar:\n-\tpci_epc_clear_bar(ntb->epf->epc,\n-\t\t\t ntb->epf->func_no,\n-\t\t\t ntb->epf->vfunc_no,\n-\t\t\t &ntb->epf->bar[barno]);\n err_alloc_mem:\n-\tepf_ntb_mw_bar_clear(ntb, i);\n+\twhile (--i >= 0)\n+\t\tpci_epc_mem_free_addr(ntb->epf->epc,\n+\t\t\t\t ntb->vpci_mw_phy[i],\n+\t\t\t\t ntb->vpci_mw_addr[i],\n+\t\t\t\t ntb->mws_size[i]);\n+err_set_bar:\n+\twhile (--barno >= BAR_0)\n+\t\tif (bars_used & BIT(barno))\n+\t\t\tpci_epc_clear_bar(ntb->epf->epc,\n+\t\t\t\t\t ntb->epf->func_no,\n+\t\t\t\t\t ntb->epf->vfunc_no,\n+\t\t\t\t\t &ntb->epf->bar[barno]);\n+\n \treturn ret;\n }\n \n@@ -1040,6 +1080,60 @@ static ssize_t epf_ntb_##_name##_store(struct config_item *item,\t\\\n \treturn len;\t\t\t\t\t\t\t\\\n }\n \n+#define EPF_NTB_MW_OFF_R(_name)\t\t\t\t\t\t\\\n+static ssize_t epf_ntb_##_name##_show(struct config_item *item,\t\t\\\n+\t\t\t\t char *page)\t\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tstruct config_group *group = to_config_group(item);\t\t\\\n+\tstruct epf_ntb *ntb = to_epf_ntb(group);\t\t\t\\\n+\tstruct device *dev = &ntb->epf->dev;\t\t\t\t\\\n+\tint win_no, idx;\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tif (sscanf(#_name, \"mw%d_offset\", &win_no) != 1)\t\t\\\n+\t\treturn -EINVAL;\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tidx = win_no - 1;\t\t\t\t\t\t\\\n+\tif (idx < 0 || idx >= ntb->num_mws) {\t\t\t\t\\\n+\t\tdev_err(dev, \"MW%d out of range (num_mws=%d)\\n\",\t\\\n+\t\t\twin_no, ntb->num_mws);\t\t\t\t\\\n+\t\treturn -EINVAL;\t\t\t\t\t\t\\\n+\t}\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tidx = array_index_nospec(idx, ntb->num_mws);\t\t\t\\\n+\treturn sprintf(page, \"%llu\\n\", ntb->mws_offset[idx]);\t\t\\\n+}\n+\n+#define EPF_NTB_MW_OFF_W(_name)\t\t\t\t\t\t\\\n+static ssize_t epf_ntb_##_name##_store(struct config_item *item,\t\\\n+\t\t\t\t const char *page, size_t len)\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tstruct config_group *group = to_config_group(item);\t\t\\\n+\tstruct epf_ntb *ntb = to_epf_ntb(group);\t\t\t\\\n+\tstruct device *dev = &ntb->epf->dev;\t\t\t\t\\\n+\tint win_no, idx;\t\t\t\t\t\t\\\n+\tu64 val;\t\t\t\t\t\t\t\\\n+\tint ret;\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tret = kstrtou64(page, 0, &val);\t\t\t\t\t\\\n+\tif (ret)\t\t\t\t\t\t\t\\\n+\t\treturn ret;\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tif (sscanf(#_name, \"mw%d_offset\", &win_no) != 1)\t\t\\\n+\t\treturn -EINVAL;\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tidx = win_no - 1;\t\t\t\t\t\t\\\n+\tif (idx < 0 || idx >= ntb->num_mws) {\t\t\t\t\\\n+\t\tdev_err(dev, \"MW%d out of range (num_mws=%d)\\n\",\t\\\n+\t\t\twin_no, ntb->num_mws);\t\t\t\t\\\n+\t\treturn -EINVAL;\t\t\t\t\t\t\\\n+\t}\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tidx = array_index_nospec(idx, ntb->num_mws);\t\t\t\\\n+\tntb->mws_offset[idx] = val;\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn len;\t\t\t\t\t\t\t\\\n+}\n+\n #define EPF_NTB_BAR_R(_name, _id)\t\t\t\t\t\\\n \tstatic ssize_t epf_ntb_##_name##_show(struct config_item *item,\t\\\n \t\t\t\t\t char *page)\t\t\\\n@@ -1110,6 +1204,14 @@ EPF_NTB_MW_R(mw3)\n EPF_NTB_MW_W(mw3)\n EPF_NTB_MW_R(mw4)\n EPF_NTB_MW_W(mw4)\n+EPF_NTB_MW_OFF_R(mw1_offset)\n+EPF_NTB_MW_OFF_W(mw1_offset)\n+EPF_NTB_MW_OFF_R(mw2_offset)\n+EPF_NTB_MW_OFF_W(mw2_offset)\n+EPF_NTB_MW_OFF_R(mw3_offset)\n+EPF_NTB_MW_OFF_W(mw3_offset)\n+EPF_NTB_MW_OFF_R(mw4_offset)\n+EPF_NTB_MW_OFF_W(mw4_offset)\n EPF_NTB_BAR_R(ctrl_bar, BAR_CONFIG)\n EPF_NTB_BAR_W(ctrl_bar, BAR_CONFIG)\n EPF_NTB_BAR_R(db_bar, BAR_DB)\n@@ -1130,6 +1232,10 @@ CONFIGFS_ATTR(epf_ntb_, mw1);\n CONFIGFS_ATTR(epf_ntb_, mw2);\n CONFIGFS_ATTR(epf_ntb_, mw3);\n CONFIGFS_ATTR(epf_ntb_, mw4);\n+CONFIGFS_ATTR(epf_ntb_, mw1_offset);\n+CONFIGFS_ATTR(epf_ntb_, mw2_offset);\n+CONFIGFS_ATTR(epf_ntb_, mw3_offset);\n+CONFIGFS_ATTR(epf_ntb_, mw4_offset);\n CONFIGFS_ATTR(epf_ntb_, vbus_number);\n CONFIGFS_ATTR(epf_ntb_, vntb_pid);\n CONFIGFS_ATTR(epf_ntb_, vntb_vid);\n@@ -1148,6 +1254,10 @@ static struct configfs_attribute *epf_ntb_attrs[] = {\n \t&epf_ntb_attr_mw2,\n \t&epf_ntb_attr_mw3,\n \t&epf_ntb_attr_mw4,\n+\t&epf_ntb_attr_mw1_offset,\n+\t&epf_ntb_attr_mw2_offset,\n+\t&epf_ntb_attr_mw3_offset,\n+\t&epf_ntb_attr_mw4_offset,\n \t&epf_ntb_attr_vbus_number,\n \t&epf_ntb_attr_vntb_pid,\n \t&epf_ntb_attr_vntb_vid,\n","prefixes":["RFC","v3","02/35"]}