{"id":2175174,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175174/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20251217143150.94463-4-philmd@linaro.org>","date":"2025-12-17T14:31:39","name":"[03/14] hw/arm: Update bootloader generated with '-kernel' using stl_phys()","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"313a7591b6417a14d92ad22cfec78db134bee1fe","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/1.0/people/85046/?format=json","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20251217143150.94463-4-philmd@linaro.org/mbox/","series":[{"id":485701,"url":"http://patchwork.ozlabs.org/api/1.0/series/485701/?format=json","date":"2025-12-17T14:31:37","name":"system/memory: Clean ups around address_space_ldst() endian variants","version":1,"mbox":"http://patchwork.ozlabs.org/series/485701/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175174/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=YsqxErFs;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Tsirkin\" ,\n Artyom Tarasenko ,\n Peter Maydell ,\n David Hildenbrand , Peter Xu ,\n Richard Henderson , =?utf-8?q?C=C3=A9dric_Le_?=\n\t=?utf-8?q?Goater?= , Steven Lee ,\n Troy Lee , Jamin Lin ,\n Andrew Jeffery , Joel Stanley ","Subject":"[PATCH 03/14] hw/arm: Update bootloader generated with '-kernel'\n using stl_phys()","Date":"Wed, 17 Dec 2025 15:31:39 +0100","Message-ID":"<20251217143150.94463-4-philmd@linaro.org>","X-Mailer":"git-send-email 2.52.0","In-Reply-To":"<20251217143150.94463-1-philmd@linaro.org>","References":"<20251217143150.94463-1-philmd@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::335;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"When the MemTxAttrs value is not specified and no MemTxResult\nprovided, address_space_ld/st() is equivalent to the simpler\nld/st_phys() API variant. Use the latter.\n\nThe _notdirty() variant is supposed to /not/ mark the updated\nCODE page as dirty, to not re-translate it. However this code\nis only used with the '-kernel' CLI option after the machine\nis created and /before/ the vCPUs run, and *only* during the\nfirst (cold) reset; not during following (hot) resets. The\noptimisation is totally not justified, since we haven't\ntranslated any guest code yet. Replace by the normal stl_phys()\nhelper.\n\nSuggested-by: Richard Henderson \nSigned-off-by: Philippe Mathieu-Daudé \n---\n hw/arm/aspeed.c | 3 +--\n hw/arm/boot.c | 6 ++----\n 2 files changed, 3 insertions(+), 6 deletions(-)","diff":"diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c\nindex 3a5071a3841..8ce82f1f622 100644\n--- a/hw/arm/aspeed.c\n+++ b/hw/arm/aspeed.c\n@@ -77,8 +77,7 @@ static void aspeed_reset_secondary(ARMCPU *cpu,\n CPUState *cs = CPU(cpu);\n \n /* info->smp_bootreg_addr */\n- address_space_stl_notdirty(as, AST_SMP_MBOX_FIELD_GOSIGN, 0,\n- MEMTXATTRS_UNSPECIFIED, NULL);\n+ stl_phys(as, AST_SMP_MBOX_FIELD_GOSIGN, 0);\n cpu_set_pc(cs, info->smp_loader_start);\n }\n \ndiff --git a/hw/arm/boot.c b/hw/arm/boot.c\nindex b91660208f5..5ca9c8db5cc 100644\n--- a/hw/arm/boot.c\n+++ b/hw/arm/boot.c\n@@ -266,8 +266,7 @@ static void default_reset_secondary(ARMCPU *cpu,\n AddressSpace *as = arm_boot_address_space(cpu, info);\n CPUState *cs = CPU(cpu);\n \n- address_space_stl_notdirty(as, info->smp_bootreg_addr,\n- 0, MEMTXATTRS_UNSPECIFIED, NULL);\n+ stl_phys(as, info->smp_bootreg_addr, 0);\n cpu_set_pc(cs, info->smp_loader_start);\n }\n \n@@ -277,8 +276,7 @@ static inline bool have_dtb(const struct arm_boot_info *info)\n }\n \n #define WRITE_WORD(p, value) do { \\\n- address_space_stl_notdirty(as, p, value, \\\n- MEMTXATTRS_UNSPECIFIED, NULL); \\\n+ stl_phys(as, p, value); \\\n p += 4; \\\n } while (0)\n \n","prefixes":["03/14"]}