{"id":2175158,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175158/?format=json","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/1.0/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20251217-eyeq6lplus-v1-9-e9cdbd3af4c2@bootlin.com>","date":"2025-12-17T13:35:59","name":"[09/13] clk: eyeq: Add Mobileye EyeQ6Lplus OLB","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"7099d1a50101997cb37c26f5c02a2b9cf3cb66dd","submitter":{"id":91083,"url":"http://patchwork.ozlabs.org/api/1.0/people/91083/?format=json","name":"Benoît Monin","email":"benoit.monin@bootlin.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20251217-eyeq6lplus-v1-9-e9cdbd3af4c2@bootlin.com/mbox/","series":[{"id":485688,"url":"http://patchwork.ozlabs.org/api/1.0/series/485688/?format=json","date":"2025-12-17T13:35:54","name":"Introducing the Mobileye EyeQ6Lplus SoC","version":1,"mbox":"http://patchwork.ozlabs.org/series/485688/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175158/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=BrkoqiPX;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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c=relaxed/relaxed; d=bootlin.com; s=dkim;\n\tt=1765978588; h=from:subject:date:message-id:to:cc:mime-version:content-type:\n\t content-transfer-encoding:in-reply-to:references;\n\tbh=EH8rYAmhJ47awiMD1tWjLL/LEcg7N7ZexU7I3RgfR78=;\n\tb=BrkoqiPXE4tRE6eH73YWwa4nYvawp8xyWUaXzHSGWf2jriS/3ekWGatgJw9LPMig48qE7C\n\te944/Azx5LzebJo2QXa47DdVhzYXOAaJT+SEbwx/DM9grNjKff3aWrBpUxR9aKYy7SZExG\n\t7AU+rXfqhSFC/OykLIQF39BQgD9yY4s8RUL57I0qbGxhEmkAmHbkwKxgiBAcI64P4MALio\n\t+7bWWOoREhBj8LQdkp/4MqhWtTxQsqxxDxRbKXwmDKxLpnc+NVlGxtQgTygTtjl/qyANyH\n\t5YUGxD5fzTGFzLWRhnw5Uw/pN0K0Wtf/5RnBJIhlUIo+sAJJN1sepFn7svoa5w==","From":"=?utf-8?q?Beno=C3=AEt_Monin?= ","Date":"Wed, 17 Dec 2025 14:35:59 +0100","Subject":"[PATCH 09/13] clk: eyeq: Add Mobileye EyeQ6Lplus OLB","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"8bit","Message-Id":"<20251217-eyeq6lplus-v1-9-e9cdbd3af4c2@bootlin.com>","References":"<20251217-eyeq6lplus-v1-0-e9cdbd3af4c2@bootlin.com>","In-Reply-To":"<20251217-eyeq6lplus-v1-0-e9cdbd3af4c2@bootlin.com>","To":"Vladimir Kondratiev ,\n Gregory CLEMENT ,\n =?utf-8?q?Th=C3=A9o_Lebrun?= ,\n Thomas Bogendoerfer ,\n Rob Herring , Krzysztof Kozlowski ,\n Conor Dooley ,\n Michael Turquette ,\n Stephen Boyd , Philipp Zabel ,\n Linus Walleij ","Cc":"Thomas Petazzoni ,\n Tawfik Bayouk , linux-mips@vger.kernel.org,\n devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?Beno?=\n\t=?utf-8?q?=C3=AEt_Monin?= ","X-Mailer":"b4 0.14.3","X-Last-TLS-Session-Version":"TLSv1.3"},"content":"Declare the PLLs and fixed factors found in the EyeQ6Lplus OLB as part\nof the match data for the \"mobileye,eyeq6lplus-olb\" compatible.\n\nThe PLL and fixed factor of the CPU are registered in early init as they\nare required during the boot by the GIC timer.\n\nSigned-off-by: Benoît Monin \n---\n drivers/clk/Kconfig | 4 +--\n drivers/clk/clk-eyeq.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++++++\n 2 files changed, 72 insertions(+), 2 deletions(-)","diff":"diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig\nindex 3a1611008e48..418c8f526279 100644\n--- a/drivers/clk/Kconfig\n+++ b/drivers/clk/Kconfig\n@@ -236,9 +236,9 @@ config COMMON_CLK_EP93XX\n \n config COMMON_CLK_EYEQ\n \tbool \"Clock driver for the Mobileye EyeQ platform\"\n-\tdepends on MACH_EYEQ5 || MACH_EYEQ6H || COMPILE_TEST\n+\tdepends on MACH_EYEQ5 || MACH_EYEQ6H || MACH_EYEQ6LPLUS || COMPILE_TEST\n \tselect AUXILIARY_BUS\n-\tdefault MACH_EYEQ5 || MACH_EYEQ6H\n+\tdefault MACH_EYEQ5 || MACH_EYEQ6H || MACH_EYEQ6LPLUS\n \thelp\n \t This driver provides clocks found on Mobileye EyeQ5, EyeQ6L and Eye6H\n \t SoCs. Controllers live in shared register regions called OLB. Driver\ndiff --git a/drivers/clk/clk-eyeq.c b/drivers/clk/clk-eyeq.c\nindex 8fb32f365f3d..239ddcb59383 100644\n--- a/drivers/clk/clk-eyeq.c\n+++ b/drivers/clk/clk-eyeq.c\n@@ -45,6 +45,7 @@\n #include \n \n #include \n+#include \n \n /* In frac mode, it enables fractional noise canceling DAC. Else, no function. */\n #define PCSR0_DAC_EN\t\t\tBIT(0)\n@@ -571,6 +572,68 @@ static const struct eqc_match_data eqc_eyeq6l_match_data = {\n \t.reset_auxdev_name = \"reset\",\n };\n \n+static const struct eqc_pll eqc_eyeq6lplus_early_plls[] = {\n+\t{ .index = EQ6LPC_PLL_CPU, .name = \"pll-cpu\", .reg64 = 0x058 },\n+};\n+\n+static const struct eqc_pll eqc_eyeq6lplus_plls[] = {\n+\t{ .index = EQ6LPC_PLL_DDR, .name = \"pll-ddr\", .reg64 = 0x02C },\n+\t{ .index = EQ6LPC_PLL_ACC, .name = \"pll-acc\", .reg64 = 0x034 },\n+\t{ .index = EQ6LPC_PLL_PER, .name = \"pll-per\", .reg64 = 0x03C },\n+\t{ .index = EQ6LPC_PLL_VDI, .name = \"pll-vdi\", .reg64 = 0x044 },\n+};\n+\n+static const struct eqc_fixed_factor eqc_eyeq6lplus_early_fixed_factors[] = {\n+\t{ EQ6LPC_CPU_OCC,\t\"occ-cpu\",\t1, 1,\tEQ6LPC_PLL_CPU },\n+};\n+\n+static const struct eqc_fixed_factor eqc_eyeq6lplus_fixed_factors[] = {\n+\t{ EQ6LPC_DDR_OCC,\t\"occ-ddr\",\t1, 1,\tEQ6LPC_PLL_DDR },\n+\n+\t{ EQ6LPC_ACC_VDI,\t\"vdi-div\",\t1, 10,\tEQ6LPC_PLL_ACC },\n+\t{ EQ6LPC_ACC_OCC,\t\"occ-acc\",\t1, 1,\tEQ6LPC_PLL_ACC },\n+\t{ EQ6LPC_ACC_FCMU,\t\"fcmu-a-clk\",\t1, 10,\tEQ6LPC_ACC_OCC },\n+\n+\t{ EQ6LPC_PER_OCC,\t\"occ-per\",\t1, 1,\tEQ6LPC_PLL_PER },\n+\t{ EQ6LPC_PER_I2C_SER,\t\"i2c-ser-clk\",\t1, 10,\tEQ6LPC_PER_OCC },\n+\t{ EQ6LPC_PER_PCLK,\t\"pclk\",\t\t1, 4,\tEQ6LPC_PER_OCC },\n+\t{ EQ6LPC_PER_TSU,\t\"tsu-clk\",\t1, 8,\tEQ6LPC_PER_OCC },\n+\t{ EQ6LPC_PER_OSPI,\t\"ospi-ref-clk\",\t1, 10,\tEQ6LPC_PER_OCC },\n+\t{ EQ6LPC_PER_GPIO,\t\"gpio-clk\",\t1, 4,\tEQ6LPC_PER_OCC },\n+\t{ EQ6LPC_PER_TIMER,\t\"timer-clk\",\t1, 4,\tEQ6LPC_PER_OCC },\n+\t{ EQ6LPC_PER_I2C,\t\"i2c-clk\",\t1, 4,\tEQ6LPC_PER_OCC },\n+\t{ EQ6LPC_PER_UART,\t\"uart-clk\",\t1, 4,\tEQ6LPC_PER_OCC },\n+\t{ EQ6LPC_PER_SPI,\t\"spi-clk\",\t1, 4,\tEQ6LPC_PER_OCC },\n+\t{ EQ6LPC_PER_PERIPH,\t\"periph-clk\",\t1, 1,\tEQ6LPC_PER_OCC },\n+\n+\t{ EQ6LPC_VDI_OCC,\t\"occ-vdi\",\t1, 1,\tEQ6LPC_PLL_VDI },\n+};\n+\n+static const struct eqc_early_match_data eqc_eyeq6lplus_early_match_data __initconst = {\n+\t.early_pll_count = ARRAY_SIZE(eqc_eyeq6lplus_early_plls),\n+\t.early_plls = eqc_eyeq6lplus_early_plls,\n+\n+\t.early_fixed_factor_count = ARRAY_SIZE(eqc_eyeq6lplus_early_fixed_factors),\n+\t.early_fixed_factors = eqc_eyeq6lplus_early_fixed_factors,\n+\n+\t.late_clk_count = ARRAY_SIZE(eqc_eyeq6lplus_plls) +\n+\tARRAY_SIZE(eqc_eyeq6lplus_fixed_factors),\n+};\n+\n+static const struct eqc_match_data eqc_eyeq6lplus_match_data = {\n+\t.pll_count = ARRAY_SIZE(eqc_eyeq6lplus_plls),\n+\t.plls = eqc_eyeq6lplus_plls,\n+\n+\t.fixed_factor_count = ARRAY_SIZE(eqc_eyeq6lplus_fixed_factors),\n+\t.fixed_factors = eqc_eyeq6lplus_fixed_factors,\n+\n+\t.reset_auxdev_name = \"reset\",\n+\t.pinctrl_auxdev_name = \"pinctrl\",\n+\n+\t.early_clk_count = ARRAY_SIZE(eqc_eyeq6lplus_early_plls) +\n+\tARRAY_SIZE(eqc_eyeq6lplus_early_fixed_factors),\n+};\n+\n static const struct eqc_match_data eqc_eyeq6h_west_match_data = {\n \t.reset_auxdev_name = \"reset_west\",\n };\n@@ -672,6 +735,7 @@ static const struct eqc_match_data eqc_eyeq6h_acc_match_data = {\n static const struct of_device_id eqc_match_table[] = {\n \t{ .compatible = \"mobileye,eyeq5-olb\", .data = &eqc_eyeq5_match_data },\n \t{ .compatible = \"mobileye,eyeq6l-olb\", .data = &eqc_eyeq6l_match_data },\n+\t{ .compatible = \"mobileye,eyeq6lplus-olb\", .data = &eqc_eyeq6lplus_match_data },\n \t{ .compatible = \"mobileye,eyeq6h-west-olb\", .data = &eqc_eyeq6h_west_match_data },\n \t{ .compatible = \"mobileye,eyeq6h-east-olb\", .data = &eqc_eyeq6h_east_match_data },\n \t{ .compatible = \"mobileye,eyeq6h-south-olb\", .data = &eqc_eyeq6h_south_match_data },\n@@ -855,3 +919,9 @@ static void __init eqc_eyeq6h_west_early_init(struct device_node *np)\n }\n CLK_OF_DECLARE_DRIVER(eqc_eyeq6h_west, \"mobileye,eyeq6h-west-olb\",\n \t\t eqc_eyeq6h_west_early_init);\n+\n+static void __init eqc_eyeq6lplus_early_init(struct device_node *np)\n+{\n+\teqc_early_init(np, &eqc_eyeq6lplus_early_match_data);\n+}\n+CLK_OF_DECLARE_DRIVER(eqc_eyeq6lplus, \"mobileye,eyeq6lplus-olb\", eqc_eyeq6lplus_early_init);\n","prefixes":["09/13"]}