{"id":2175156,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175156/?format=json","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/1.0/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20251217-eyeq6lplus-v1-8-e9cdbd3af4c2@bootlin.com>","date":"2025-12-17T13:35:58","name":"[08/13] clk: eyeq: Adjust PLL accuracy computation","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"2e0b4f10377277d3bd0da375af5b807d76fc57ab","submitter":{"id":91083,"url":"http://patchwork.ozlabs.org/api/1.0/people/91083/?format=json","name":"Benoît Monin","email":"benoit.monin@bootlin.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20251217-eyeq6lplus-v1-8-e9cdbd3af4c2@bootlin.com/mbox/","series":[{"id":485688,"url":"http://patchwork.ozlabs.org/api/1.0/series/485688/?format=json","date":"2025-12-17T13:35:54","name":"Introducing the Mobileye EyeQ6Lplus SoC","version":1,"mbox":"http://patchwork.ozlabs.org/series/485688/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175156/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=gFqGncF2;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim;\n\tt=1765978586; h=from:subject:date:message-id:to:cc:mime-version:content-type:\n\t content-transfer-encoding:in-reply-to:references;\n\tbh=LAlm/ECW4o7ColMRo13P/K3LTb6LJ/lSZfggJLOeA6M=;\n\tb=gFqGncF2wLvyyMPFk4X7yRi+dd3uuG2xCrQYe8laAWzlFjsHmwYm+oQgBRc6RK7LqzZwcq\n\tbhXjcgVZi3vga0aTtOyXaedjcR9SNex5J3yDAOmhAjN8p++phfC1xbBxmMovfU1xj9fSJz\n\tUb6Jh47UrHGXL2gyc71tUxxaBuRBKdABgRDpgPNeyt8kJ/b7NRJJu0NujCAZ/8V01wV5YC\n\t1CaCjEVI0+CJKEAlLW/7fXEJrH9hJrijJgINeoNzH5Zxg0rZUWxdIUjs6c6NNZce72SICm\n\tCqKibbiBOBRf/ypga7o6nuVLepv+t8ivo3dqQ/q6tqk58mpHwunPZA8cszJj7w==","From":"=?utf-8?q?Beno=C3=AEt_Monin?= ","Date":"Wed, 17 Dec 2025 14:35:58 +0100","Subject":"[PATCH 08/13] clk: eyeq: Adjust PLL accuracy computation","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"8bit","Message-Id":"<20251217-eyeq6lplus-v1-8-e9cdbd3af4c2@bootlin.com>","References":"<20251217-eyeq6lplus-v1-0-e9cdbd3af4c2@bootlin.com>","In-Reply-To":"<20251217-eyeq6lplus-v1-0-e9cdbd3af4c2@bootlin.com>","To":"Vladimir Kondratiev ,\n Gregory CLEMENT ,\n =?utf-8?q?Th=C3=A9o_Lebrun?= ,\n Thomas Bogendoerfer ,\n Rob Herring , Krzysztof Kozlowski ,\n Conor Dooley ,\n Michael Turquette ,\n Stephen Boyd , Philipp Zabel ,\n Linus Walleij ","Cc":"Thomas Petazzoni ,\n Tawfik Bayouk , linux-mips@vger.kernel.org,\n devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?Beno?=\n\t=?utf-8?q?=C3=AEt_Monin?= ","X-Mailer":"b4 0.14.3","X-Last-TLS-Session-Version":"TLSv1.3"},"content":"The spread spectrum of the PLL found in eyeQ OLB is in 1/1024 parts of the\nfrequency, not in 1/1000, so adjust the computation of the accuracy. Also\ncorrect the downspreading to match.\n\nSigned-off-by: Benoît Monin \n---\n drivers/clk/clk-eyeq.c | 18 +++++++++---------\n 1 file changed, 9 insertions(+), 9 deletions(-)","diff":"diff --git a/drivers/clk/clk-eyeq.c b/drivers/clk/clk-eyeq.c\nindex 182b408b6aa4..8fb32f365f3d 100644\n--- a/drivers/clk/clk-eyeq.c\n+++ b/drivers/clk/clk-eyeq.c\n@@ -163,7 +163,7 @@ static void eqc_pll_downshift_factors(unsigned long *mult, unsigned long *div)\n static int eqc_pll_parse_registers(u32 r0, u32 r1, unsigned long *mult,\n \t\t\t\t unsigned long *div, unsigned long *acc)\n {\n-\tu32 spread;\n+\tunsigned long spread;\n \n \tif (r0 & PCSR0_BYPASS) {\n \t\t*mult = 1;\n@@ -195,23 +195,23 @@ static int eqc_pll_parse_registers(u32 r0, u32 r1, unsigned long *mult,\n \t/*\n \t * Spread spectrum.\n \t *\n-\t * Spread is 1/1000 parts of frequency, accuracy is half of\n-\t * that. To get accuracy, convert to ppb (parts per billion).\n+\t * Spread is in 1/1024 parts of frequency. Clock accuracy\n+\t * is half the spread value expressed in parts per billion.\n \t *\n-\t * acc = spread * 1e6 / 2\n-\t * with acc in parts per billion and,\n-\t * spread in parts per thousand.\n+\t * accuracy = (spread * 1e9) / (1024 * 2)\n+\t *\n+\t * Care is taken to avoid overflowing or losing precision.\n \t */\n \tspread = FIELD_GET(PCSR1_SPREAD, r1);\n-\t*acc = spread * 500000;\n+\t*acc = DIV_ROUND_CLOSEST(spread * 1000000000, 1024 * 2);\n \n \tif (r1 & PCSR1_DOWN_SPREAD) {\n \t\t/*\n \t\t * Downspreading: the central frequency is half a\n \t\t * spread lower.\n \t\t */\n-\t\t*mult *= 2000 - spread;\n-\t\t*div *= 2000;\n+\t\t*mult *= 2048 - spread;\n+\t\t*div *= 2048;\n \n \t\t/*\n \t\t * Previous operation might overflow 32 bits. If it\n","prefixes":["08/13"]}