{"id":2175102,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2175102/?format=json","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.0/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20251217111510.138848-3-claudiu.beznea.uj@bp.renesas.com>","date":"2025-12-17T11:15:10","name":"[v2,2/2] PCI: rzg3s-host: Drop the lock on RZG3S_PCI_MSIRS and RZG3S_PCI_PINTRCVIS","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"5866feb1780fb28b51263e5b6cf23ebe9ee4610d","submitter":{"id":86830,"url":"http://patchwork.ozlabs.org/api/1.0/people/86830/?format=json","name":"Claudiu Beznea","email":"claudiu.beznea@tuxon.dev"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20251217111510.138848-3-claudiu.beznea.uj@bp.renesas.com/mbox/","series":[{"id":485663,"url":"http://patchwork.ozlabs.org/api/1.0/series/485663/?format=json","date":"2025-12-17T11:15:08","name":"PCI: rzg3s-host: Cleanups","version":2,"mbox":"http://patchwork.ozlabs.org/series/485663/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2175102/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=tuxon.dev header.i=@tuxon.dev header.a=rsa-sha256\n header.s=google header.b=n3JLNqqS;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-43166-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev\n header.b=\"n3JLNqqS\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.218.54","smtp.subspace.kernel.org;\n dmarc=none (p=none dis=none) header.from=tuxon.dev","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=tuxon.dev"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4dWWSN5Wxtz1y0P\n\tfor ; Wed, 17 Dec 2025 22:15:48 +1100 (AEDT)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id C28A630329F1\n\tfor ; Wed, 17 Dec 2025 11:15:27 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 23FBD343D9D;\n\tWed, 17 Dec 2025 11:15:20 +0000 (UTC)","from mail-ej1-f54.google.com (mail-ej1-f54.google.com\n [209.85.218.54])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 2A6D033F8D6\n\tfor ; Wed, 17 Dec 2025 11:15:17 +0000 (UTC)","by mail-ej1-f54.google.com with SMTP id\n a640c23a62f3a-b73161849e1so1314925566b.2\n for ; Wed, 17 Dec 2025 03:15:17 -0800 (PST)","from claudiu-X670E-Pro-RS.. ([82.78.167.134])\n by smtp.gmail.com with ESMTPSA id\n a640c23a62f3a-b7cfa2e817csm1933465066b.19.2025.12.17.03.15.15\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 17 Dec 2025 03:15:15 -0800 (PST)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1765970120; cv=none;\n b=aJsQ6SnSTD5XJUaucdmebd8D7yyu4iIGTwOrdpCI7oXJTjBr8WRqoa8T2IOuo9PPTlL8mM2hv327TUNeeerMELg5kcgAa5K7XqUlIwJ0BzFwtmjbUDPZz0RaYRE4R6+RA7anLhHSEUtaxo5NKuhTOYJxl+0A4DLrH1fX1LWnjWg=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1765970120; c=relaxed/simple;\n\tbh=5Y4gPMP27s7n7uex8rzUJRSTf0es0tnb6FP6Q/Ep6Jo=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=fwfI3JMnDczps3EF6SNti6Hj0CjidnU45Fw3+IRTi7matEqbpm2Hkrru7ZXMMpRZBGQOJSjs5d0MdHbLH4H/gp6fd+/1Uw4GAPx2Ti1OXcH+iMEOJvia3QzIMz5BPtw7DG2CxOWBhjDTZPwzzyIgz2Emf4eGntyHCJJsjGuTQvw=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=none (p=none dis=none) header.from=tuxon.dev;\n spf=pass smtp.mailfrom=tuxon.dev;\n dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev\n header.b=n3JLNqqS; arc=none smtp.client-ip=209.85.218.54","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=tuxon.dev; s=google; t=1765970116; x=1766574916;\n darn=vger.kernel.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=00dbsnXRQYzCZ5pFyuIk2+EAhQKdp0t5ldMAnwaQRhc=;\n b=n3JLNqqSJ5puozmVrWhnOC/Z5rNt3FsMREzb/Y9ZGFy60YQpsTO+nybUy9lVinyKtp\n 6FbaoVctiff3+n15bvQek9yResIohz5bwVW3mJk7DzH6qiQFuNx5VAJpAeuMi4iINiPa\n EaJBz2I788OdlJfsyrJazWVxXSIDhwQmv+G0+BXmQbDWDY3rjiE/tPM3/AGYhJFLGtZ0\n UU+B3kq6X6eMNvY3UWcSIhN+XQo/RdEjgn4RpdR7Ki1X8afLo3qIe0STognWP2b/eE54\n P0NtyGB654uzL38WnscllzERaqqENT8EVflJO5uhT+1szWaCYnuE3w0U5gMSHLhaxqMx\n 5F7g==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20230601; t=1765970116; x=1766574916;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=00dbsnXRQYzCZ5pFyuIk2+EAhQKdp0t5ldMAnwaQRhc=;\n b=bU8rC1qVa3Yza2IEP43dhCL7ahgA5oF2f6gWz8kb5oBnrEXaDHvRTPj6lfHS8iMTnI\n SXSY7JZLMUIzLfC8nhh1TmT/PaK9bp7ncrxlNtlxpE9tg+nXYvtrbf811BdEjqTDAtnL\n Egtuc95iyfdzqd+lCDEcfshqfe7Znfd3BP7kvAzHXJdpE2eBegvtt8XyFvGnlLncthvc\n Gl1lOYJChE/z4UrzY22qWzP6MkM7Cou6yflVmkY74yYZnSoJVE/EszAxg5PEEdaAlG5n\n id6gSfHjxHRYgTzSoPyBG4r4Qh7qKsHSMVUgJLncS0IWf7YPZRIgw7khjmldb38HwP0U\n 398g==","X-Forwarded-Encrypted":"i=1;\n AJvYcCVNJk4ypwp+ydmOx76XrfJDSdvSMtazfZjYeoHKW9Q5GoZGeOLOXATxgdoXtWAQP1Ap2M7DwxtUFp0=@vger.kernel.org","X-Gm-Message-State":"AOJu0YwOHSlVLu7b76lqAJaEYxXRzWQFM4hijATJ+FG/ROBlla9zgV1A\n\tI5ByYZBKDG/AvE8BxXbHGdxIVVmlOIUSbcJ0NDAAEg46IrNxkPj5htyiBv5K1kEQGu8=","X-Gm-Gg":"AY/fxX4+vfKu8IKFPVYyOBFTc4n0wmvYLihoCLabMyx4fFDV//BewgsG+rNfGkPS7SG\n\tOseeOD9AddkyAijArte2XcVd97I1+xrcgRHvj5yb5+do6I3aKHSMADRWMYN8gyvMyY2uHH+949n\n\tgu1inDaMnIDdcCeXEG204TxCQuAKEDwgrLW5kvJxjkwcOMcj9aK1C/0OtsQfKMsdWACl7HuZjta\n\t2+urQU5nrtD/z051gUKhYgzXNlKeAOBKx+B7I/VIzlINNkQoE9egqv2t/83FKoZbjAzxtwOW4PF\n\txAKiHXvWoXD09D4f6PB6Ht+FtSrMgVhKGGl9SlHCqjCbTDUa9ZnxYDIXZVBjEVh/qjSyeJoQ66T\n\tiZT5le5Obfl8aDP1SKAXhi/NJcJJptaHxwMDz+nUGjkOUQpM+eZjW0DDnithdieHdWnXi7RofDg\n\t2zX4FazlngHG0Vx9UyLKepaXofvrEXoVhvvRkv6G+4","X-Google-Smtp-Source":"\n AGHT+IHwzhERrnuAvF/Lpiw/TJhnaVT5ourcEf1VWmOhh5lv6gcjnMP/YqOoOAUxckSeF3VPI0b24w==","X-Received":"by 2002:a17:907:94c6:b0:b76:5143:edea with SMTP id\n a640c23a62f3a-b7d238baa48mr1792946466b.30.1765970116315;\n Wed, 17 Dec 2025 03:15:16 -0800 (PST)","From":"Claudiu ","X-Google-Original-From":"Claudiu ","To":"bhelgaas@google.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\trobh@kernel.org","Cc":"claudiu.beznea@tuxon.dev,\n\tlinux-pci@vger.kernel.org,\n\tlinux-renesas-soc@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tClaudiu Beznea ","Subject":"[PATCH v2 2/2] PCI: rzg3s-host: Drop the lock on RZG3S_PCI_MSIRS and\n RZG3S_PCI_PINTRCVIS","Date":"Wed, 17 Dec 2025 13:15:10 +0200","Message-ID":"<20251217111510.138848-3-claudiu.beznea.uj@bp.renesas.com>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"<20251217111510.138848-1-claudiu.beznea.uj@bp.renesas.com>","References":"<20251217111510.138848-1-claudiu.beznea.uj@bp.renesas.com>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit"},"content":"From: Claudiu Beznea \n\nThe RZG3S_PCI_MSIRS and RZG3S_PCI_PINTRCVIS registers are of the R/W1C\ntype. According to the RZ/G3S HW Manual, Rev. 1.10, chapter 34.2.1\nRegister Type, R/W1C register bits are cleared to 0b by writing 1b, while\nwriting 0b has no effect. Therefore, there is no need to take a lock\naround writes to these registers.\n\nDrop the locking.\n\nAlong with this, add a note about the R/W1C register type to the register\noffset definitions.\n\nSigned-off-by: Claudiu Beznea \n---\n\nChanges in v2:\n- none\n\n drivers/pci/controller/pcie-rzg3s-host.c | 7 +++----\n 1 file changed, 3 insertions(+), 4 deletions(-)","diff":"diff --git a/drivers/pci/controller/pcie-rzg3s-host.c b/drivers/pci/controller/pcie-rzg3s-host.c\nindex ae6d9c7dc2c1..5aa58638903f 100644\n--- a/drivers/pci/controller/pcie-rzg3s-host.c\n+++ b/drivers/pci/controller/pcie-rzg3s-host.c\n@@ -73,6 +73,7 @@\n #define RZG3S_PCI_PINTRCVIE_INTX(i)\t\tBIT(i)\n #define RZG3S_PCI_PINTRCVIE_MSI\t\t\tBIT(4)\n \n+/* Register is R/W1C, it doesn't require locking. */\n #define RZG3S_PCI_PINTRCVIS\t\t\t0x114\n #define RZG3S_PCI_PINTRCVIS_INTX(i)\t\tBIT(i)\n #define RZG3S_PCI_PINTRCVIS_MSI\t\t\tBIT(4)\n@@ -114,6 +115,8 @@\n #define RZG3S_PCI_MSIRE_ENA\t\t\tBIT(0)\n \n #define RZG3S_PCI_MSIRM(id)\t\t\t(0x608 + (id) * 0x10)\n+\n+/* Register is R/W1C, it doesn't require locking. */\n #define RZG3S_PCI_MSIRS(id)\t\t\t(0x60c + (id) * 0x10)\n \n #define RZG3S_PCI_AWBASEL(id)\t\t\t(0x1000 + (id) * 0x20)\n@@ -507,8 +510,6 @@ static void rzg3s_pcie_msi_irq_ack(struct irq_data *d)\n \tu8 reg_bit = d->hwirq % RZG3S_PCI_MSI_INT_PER_REG;\n \tu8 reg_id = d->hwirq / RZG3S_PCI_MSI_INT_PER_REG;\n \n-\tguard(raw_spinlock_irqsave)(&host->hw_lock);\n-\n \twritel_relaxed(BIT(reg_bit), host->axi + RZG3S_PCI_MSIRS(reg_id));\n }\n \n@@ -840,8 +841,6 @@ static void rzg3s_pcie_intx_irq_ack(struct irq_data *d)\n {\n \tstruct rzg3s_pcie_host *host = irq_data_get_irq_chip_data(d);\n \n-\tguard(raw_spinlock_irqsave)(&host->hw_lock);\n-\n \trzg3s_pcie_update_bits(host->axi, RZG3S_PCI_PINTRCVIS,\n \t\t\t RZG3S_PCI_PINTRCVIS_INTX(d->hwirq),\n \t\t\t RZG3S_PCI_PINTRCVIS_INTX(d->hwirq));\n","prefixes":["v2","2/2"]}