{"id":809567,"url":"http://patchwork.ozlabs.org/api/1.0/covers/809567/?format=json","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/1.0/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20170904085119.25981-1-romain.perier@collabora.com>","date":"2017-09-04T08:51:15","name":"[v2,0/4] rockchip: Add efuse support for RK3368 SoCs","submitter":{"id":70720,"url":"http://patchwork.ozlabs.org/api/1.0/people/70720/?format=json","name":"Romain Perier","email":"romain.perier@collabora.com"},"series":[{"id":1336,"url":"http://patchwork.ozlabs.org/api/1.0/series/1336/?format=json","date":"2017-09-04T08:51:15","name":"rockchip: Add efuse support for RK3368 SoCs","version":2,"mbox":"http://patchwork.ozlabs.org/series/1336/mbox/"}],"headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xm3VX1DjTz9s7m\n\tfor ;\n\tMon, 4 Sep 2017 18:51:32 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753335AbdIDIva (ORCPT\n\t);\n\tMon, 4 Sep 2017 04:51:30 -0400","from bhuna.collabora.co.uk ([46.235.227.227]:40543 \"EHLO\n\tbhuna.collabora.co.uk\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1753318AbdIDIva (ORCPT\n\t); Mon, 4 Sep 2017 04:51:30 -0400","from [127.0.0.1] (localhost [127.0.0.1])\n\t(Authenticated sender: rperier) with ESMTPSA id DD8392602DA"],"From":"Romain Perier ","To":"Michael Turquette ,\n\tStephen Boyd , linux-clk@vger.kernel.org,\n\tHeiko Stuebner ,\n\tSrinivas Kandagatla ","Cc":"philipp.tomsich@theobroma-systems.com,\n\tklaus.goger@theobroma-systems.com, devicetree@vger.kernel.org,\n\tRob Herring ,\n\tIan Campbell ,\n\tPawel Moll , Mark Rutland , \n\tKumar Gala , linux-arm-kernel@lists.infradead.org, \n\tlinux-rockchip@lists.infradead.org,\n\tRomain Perier ","Subject":"[PATCH v2 0/4] rockchip: Add efuse support for RK3368 SoCs","Date":"Mon, 4 Sep 2017 10:51:15 +0200","Message-Id":"<20170904085119.25981-1-romain.perier@collabora.com>","X-Mailer":"git-send-email 2.11.0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"This set of patches exports the right clocks, add required functions\nand data, and definition for enabling and supporting eFuse on RK3368\nSoCs.\n\nNote: On my geekbox rk3368, I was unable to flash a working upstream ATF\nor upstream uboot (missing support for LPDDR3 init and timping). I cannot\ntest the driver without the secure mode for this efuse on my hardware.So\nI am asking for testing. I think that it should work like on rk3288\n\nChanges in v2:\n- Removed ARM SMC calls for efuse, we need to do as upstream ATF and\n uboot mainline do, so no secure-regs for efuse\n\nRomain Perier (4):\n clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs\n clk: rockchip: export clock pclk_efuse_256 for RK3368 SoCs\n nvmem: rockchip: add support for RK3368\n arm64: dts: rockchip: add efuse for RK3368 SoCs\n\n Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt | 1 +\n arch/arm64/boot/dts/rockchip/rk3368.dtsi | 14 ++++++++++++++\n drivers/clk/rockchip/clk-rk3368.c | 2 +-\n drivers/nvmem/rockchip-efuse.c | 4 ++++\n include/dt-bindings/clock/rk3368-cru.h | 1 +\n 5 files changed, 21 insertions(+), 1 deletion(-)"}