{"id":2198294,"url":"http://patchwork.ozlabs.org/api/1.0/covers/2198294/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260219191955.83815-1-philmd@linaro.org>","date":"2026-02-19T19:19:02","name":"[v2,00/50] gdbstub: Build once on various targets (single-binary)","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/1.0/people/85046/?format=json","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"series":[{"id":492715,"url":"http://patchwork.ozlabs.org/api/1.0/series/492715/?format=json","date":"2026-02-19T19:19:03","name":"gdbstub: Build once on various targets (single-binary)","version":2,"mbox":"http://patchwork.ozlabs.org/series/492715/mbox/"}],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=exXgHUWl;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"utf-8\"","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::335;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"This series absorbed \"monitor/hmp: Automatically handle\ngdb-xml exposed registers\", thus version 2. Previous cover:\n\n MonitorDef registers parsing is one of the oldest APIs in QEMU,\n thus predates gdbstub and XML register files. The latters are\n maintained by the GDB/binutils project and are more up-to-date.\n Getting the target register list from them allows to expose\n all accessible registers to the HMP commands.\n\n This series adds gdb_get_register() to monitor to use XML\n generated registers, and remove the legacy MonitorDef entries\n which became unreachable.\n\n First we need to have the SPARC target better follow the\n gdb-xml API.\n\nOn top of that we remove more TARGET_LONG_BITS uses, replacing\nldtul_p() -> ldn_p() and gdb_get_regl() -> gdb_get_reg32/64(),\nallowing to build various gdbstub.c files once. Few other meson\ncleanups on the way.\n\nPhilippe Mathieu-Daudé (50):\n target/ppc: Move user_only_helper.c to target_user_arch[] source set\n target/ppc: Remove PPC_DEBUG_SPR left-over comment\n target/i386: Inline GDB_FORCE_64 definition\n target/avr: Fix typo in gdb-xml feature name\n target/alpha: Document gdbstub register indexes\n target/riscv: Extract monitor-related code to monitor.c\n target/ppc: Fix CPUClass::gdb_num_core_regs value\n target/ppc: Remove dead code depending on USE_APPLE_GDB\n gdbstub: Always infer gdb_num_core_regs when using XML file\n target/sparc: Introduce sparc_cpu_register_gdb_regs() stub\n target/sparc: Restore 'gdb-xml/sparc64-cp0.xml'\n target/sparc: Restore 'gdb-xml/sparc64-fpu.xml'\n target/sparc: Restore 'gdb-xml/sparc64-cpu.xml'\n target/sparc: Expose gdbstub registers to sparc32plus target\n target/sparc: Expose gdbstub registers to sparc32 targets\n monitor/hmp: Handle gdb-xml exposed registers via gdb_get_register()\n target/sparc: Remove MonitorDef register entries available via gdbstub\n target/i386: Remove MonitorDef register entries available via gdbstub\n target/m68k: Remove MonitorDef register entries available via gdbstub\n target/ppc: Remove MonitorDef register entries available via gdbstub\n target/ppc: Extract monitor-related code to monitor.c\n target/or1k: Use XML register definitions from GDB\n target/riscv: Remove empty target_monitor_defs() symbol\n target/sparc: Factor sparc_cpu_gdb_write_register() out\n target/ppc: Replace ldtul_p() -> ldn_p()\n target/mips: Replace ldtul_p() -> ldn_p()\n target/riscv: Replace ldtul_p() -> ldn_p()\n target/riscv: Remove unnecessary target_ulong type uses\n target/i386: Replace ldtul_p() -> ldn_p()\n target/i386: Expand 64-bit definitions when TARGET_LONG_BITS == 64\n gdbstub: Remove ldtul*() macros\n target/alpha: Expand gdb_get_regl() -> gdb_get_reg64()\n target/hexagon: Expand gdb_get_regl() -> gdb_get_reg32()\n target/rx: Expand gdb_get_regl() -> gdb_get_reg32()\n target/sh4: Expand gdb_get_regl() -> gdb_get_reg32()\n target/sparc: Expand gdb_get_regl() in gdb_get_rega()\n gdbstub/helpers: Convert gdb_get_regl() macro to inlined helper\n target/microblaze: Build 'gdbstub.c' once for system binaries\n target/sh4: Build 'monitor.c' once for system binaries\n target/sh4: Build 'gdbstub.c' once for system binaries\n target/or1k: Rename 'openrisc' -> 'or1k' in meson.build\n target/or1k: Build 'gdbstub.c' once for system single binary\n target/alpha: Build 'gdbstub.c' once for system single binary\n target/avr: Build 'gdbstub.c' once for system single binary\n target/loongarch: Build 'gdbstub.c' once for system single binary\n target/m68k: Build 'gdbstub.c' once for system single binary\n target/rx: Build 'gdbstub.c' once for system single binary\n target/s390x: Build 'gdbstub.c' once for system single binary\n target/tricore: Build 'gdbstub.c' once for system single binary\n DONOTREVIEW Revert \"target/loongarch: Build 'gdbstub.c' once\"\n\n configs/targets/or1k-linux-user.mak | 1 +\n configs/targets/or1k-softmmu.mak | 1 +\n configs/targets/sparc-linux-user.mak | 1 +\n configs/targets/sparc-softmmu.mak | 1 +\n configs/targets/sparc32plus-linux-user.mak | 1 +\n configs/targets/sparc64-linux-user.mak | 2 +-\n configs/targets/sparc64-softmmu.mak | 2 +-\n include/gdbstub/helpers.h | 28 +-\n include/hw/core/cpu.h | 4 +-\n target/ppc/cpu.h | 2 -\n target/sparc/cpu.h | 1 +\n gdbstub/gdbstub.c | 1 +\n monitor/hmp.c | 49 ++-\n target/alpha/cpu.c | 1 -\n target/alpha/gdbstub.c | 27 +-\n target/hexagon/gdbstub.c | 12 +-\n target/i386/gdbstub.c | 23 +-\n target/i386/monitor.c | 39 ---\n target/m68k/monitor.c | 18 -\n target/mips/gdbstub.c | 14 +-\n target/or1k/cpu.c | 2 +-\n target/ppc/cpu_init.c | 10 -\n target/ppc/gdbstub.c | 146 +-------\n target/ppc/monitor.c | 41 +++\n target/ppc/ppc-qmp-cmds.c | 148 +-------\n target/riscv/gdbstub.c | 20 +-\n target/riscv/monitor.c | 135 ++++++++\n target/riscv/riscv-qmp-cmds.c | 150 ---------\n target/rx/gdbstub.c | 20 +-\n target/sh4/gdbstub.c | 32 +-\n target/sparc/cpu.c | 7 +-\n target/sparc/gdbstub.c | 317 +++++++++++-------\n target/sparc/monitor.c | 107 ------\n gdb-xml/avr-cpu.xml | 2 +-\n gdb-xml/or1k-core.xml | 65 ++++\n gdb-xml/sparc32-cp0.xml | 18 +\n gdb-xml/sparc32-cpu.xml | 42 +++\n gdb-xml/sparc32-fpu.xml | 42 +++\n gdb-xml/sparc64-cp0.xml | 16 +\n gdb-xml/sparc64-cpu.xml | 42 +++\n gdb-xml/{sparc64-core.xml => sparc64-fpu.xml} | 44 +--\n target/alpha/meson.build | 14 +-\n target/avr/meson.build | 5 +-\n target/m68k/meson.build | 9 +-\n target/microblaze/meson.build | 11 +-\n target/or1k/meson.build | 23 +-\n target/ppc/meson.build | 7 +-\n target/rx/meson.build | 6 +-\n target/s390x/meson.build | 3 +-\n target/sh4/meson.build | 14 +-\n target/tricore/meson.build | 10 +-\n 51 files changed, 836 insertions(+), 900 deletions(-)\n create mode 100644 target/ppc/monitor.c\n create mode 100644 gdb-xml/or1k-core.xml\n create mode 100644 gdb-xml/sparc32-cp0.xml\n create mode 100644 gdb-xml/sparc32-cpu.xml\n create mode 100644 gdb-xml/sparc32-fpu.xml\n create mode 100644 gdb-xml/sparc64-cp0.xml\n create mode 100644 gdb-xml/sparc64-cpu.xml\n rename gdb-xml/{sparc64-core.xml => sparc64-fpu.xml} (59%)"}