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CTRY:GB; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:outbound-uk1.az.dlp.m.darktrace.com;\n PTR:InfoDomainNonexistent; CAT:NONE;\n SFS:(13230040)(14060799003)(36860700013)(82310400026)(376014)(35042699022)(1800799024);\n DIR:OUT; SFP:1101;","X-OriginatorOrg":"arm.com","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"18 Dec 2025 17:16:39.4193 (UTC)","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 1b8afad9-d67a-4c81-2fa4-08de3e5934fd","X-MS-Exchange-CrossTenant-Id":"f34e5979-57d9-4aaa-ad4d-b122a662184d","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"\n TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[4.158.2.129];\n Helo=[outbound-uk1.az.dlp.m.darktrace.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n AM1PEPF000252DB.eurprd07.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list <gcc-patches.gcc.gnu.org>","List-Unsubscribe":"<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>","List-Archive":"<https://gcc.gnu.org/pipermail/gcc-patches/>","List-Post":"<mailto:gcc-patches@gcc.gnu.org>","List-Help":"<mailto:gcc-patches-request@gcc.gnu.org?subject=help>","List-Subscribe":"<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"This patch series completes support for SME2 and SME2p1 intrinsics relative to\nmodal 8bit floating point types.\n\n- The first patch in the series introduces tests for using luti intrinsics with\n  mf8 that was already working since their introduction, now that their use is\n  documented in ACLE.\n- The second patch extends the definitions of existing non-interpreting sve2/sme\n  intrinsics to support mfloat8 types.\n- The third and fourth patches add widening and narrowing sme2 fp8 conversions\n  respectively (svcvt).\n- The fifth patch adds multi-vector floating-point adjust exponent intrinsics\n  (svscale).\n- The sixth patch adds support for the sme-f8f16 and sme-f8f32 arch features\n  and related defines.\n- Patch 7 adds Multi-vector 8-bit floating-point multiply-add long intrinsics.\n- Patch 8 adds 8-bit floating-point sum of outer products and accumulate\n  intrinsics.\n- Patch 9 adds 8-bit floating point dot product intrinsics.\n\nCompared to version 1 of this patch series:\n- updated commit messages per requests.\n- fixed gating of intrinsics in patch four (narrowing sme2 conversions to fp8).\n- introduced aarch64_output_asm_with_extra_operand function and updated insns in\n  aarch64-sme.md to no longer use out of bounds operands.\n\nCompared to version 2 of this patch series:\n- replaced aarch64_output_asm_with_extra_operand with\n  aarch64_output_asm_with_offset which does not require allocating space for\n  operands on the stack in patch 7.\n\nCompared to version 3 of this patch series:\n- Entirely removed functions using snprintf and returned to existing use of\n  operands array as the array is long enough for this use.\n- Addressed Richard Ball's feedback (renamed test files, improved readability in\n  exp file, formatting).\n\nCompared to version 4 of this patch series:\n- Reposting patches inline rather than as attachments.\n- Accidentally posted the last 8 rather than 9 patches. Thanks to Artemiy who\n  spotted this.\n\nRegression tested on aarch64-unknown-linux-gnu.\n\nOK to merge?\n\nThanks,\nClaudio Bantaloukas\n\n\nClaudio Bantaloukas (8):\n  aarch64: add tests for sme mfloat8 luti functions\n  aarch64: extend sme intrinsics to mfp8\n  aarch64: add widening sme2 fp8 conversions\n  aarch64: add narrowing sme2 conversions to fp8\n  aarch64: add multi-vector floating-point adjust exponent intrinsics\n  aarch64: add basic support for sme-f8f16 and sme-f8f32\n  aarch64: add Multi-vector 8-bit floating-point multiply-add long\n  aarch64: add 8-bit floating-point sum of outer products and accumulate\n\nKarl Meakin (1):\n  aarch64: add 8-bit floating point dot product\n\n gcc/config/aarch64/aarch64-c.cc               |   4 +\n .../aarch64/aarch64-option-extensions.def     |   4 +\n gcc/config/aarch64/aarch64-sme.md             | 571 ++++++++++++++++++\n .../aarch64/aarch64-sve-builtins-base.cc      |  47 +-\n .../aarch64/aarch64-sve-builtins-functions.h  |  23 +-\n .../aarch64/aarch64-sve-builtins-shapes.cc    |  43 +-\n .../aarch64/aarch64-sve-builtins-shapes.h     |   1 +\n .../aarch64/aarch64-sve-builtins-sme.cc       |  20 +-\n .../aarch64/aarch64-sve-builtins-sme.def      |  55 +-\n gcc/config/aarch64/aarch64-sve-builtins-sme.h |   2 +\n .../aarch64/aarch64-sve-builtins-sve2.cc      |   2 +\n .../aarch64/aarch64-sve-builtins-sve2.def     |  12 +\n .../aarch64/aarch64-sve-builtins-sve2.h       |   2 +\n gcc/config/aarch64/aarch64-sve-builtins.cc    |  34 +-\n gcc/config/aarch64/aarch64-sve2.md            |  52 +-\n gcc/config/aarch64/aarch64.h                  |  10 +\n gcc/config/aarch64/iterators.md               |  73 ++-\n gcc/doc/invoke.texi                           |   6 +\n .../aarch64/sme2/aarch64-sme2-acle-asm.exp    |   3 +-\n .../gcc.target/aarch64/pragma_cpp_predefs_4.c |  34 ++\n .../aarch64/sme/acle-asm/read_hor_za128.c     |  31 +\n .../aarch64/sme/acle-asm/read_hor_za8.c       |  31 +\n .../aarch64/sme/acle-asm/read_ver_za128.c     |  31 +\n .../aarch64/sme/acle-asm/read_ver_za8.c       |  31 +\n .../aarch64/sme/acle-asm/revd_mf8.c           |  76 +++\n .../aarch64/sme/acle-asm/test_sme_acle.h      |   2 +-\n .../aarch64/sme/acle-asm/write_hor_za128.c    |  10 +\n .../aarch64/sme/acle-asm/write_hor_za8.c      |  10 +\n .../aarch64/sme/acle-asm/write_ver_za128.c    |  10 +\n .../aarch64/sme/acle-asm/write_ver_za8.c      |  10 +\n .../aarch64/sme2/aarch64-sme2-acle-asm.exp    |   3 +-\n .../aarch64/sme2/acle-asm/cvt_mf8_bf16_x2.c   |  56 ++\n .../aarch64/sme2/acle-asm/cvt_mf8_f16_x2.c    |  56 ++\n .../aarch64/sme2/acle-asm/cvt_mf8_f32_x4.c    |  72 +++\n .../aarch64/sme2/acle-asm/cvt_mf8_x2.c        |  47 ++\n .../aarch64/sme2/acle-asm/cvtl_mf8_x2.c       |  47 ++\n .../aarch64/sme2/acle-asm/cvtn_mf8_f32_x4.c   |  72 +++\n .../sme2/acle-asm/dot_lane_za16_mf8_vg1x2.c   | 119 ++++\n .../sme2/acle-asm/dot_lane_za16_mf8_vg1x4.c   | 125 ++++\n .../sme2/acle-asm/dot_lane_za32_mf8_vg1x2.c   | 119 ++++\n .../sme2/acle-asm/dot_lane_za32_mf8_vg1x4.c   | 125 ++++\n .../sme2/acle-asm/dot_single_za16_mf8_vg1x2.c | 126 ++++\n .../sme2/acle-asm/dot_single_za16_mf8_vg1x4.c | 126 ++++\n .../sme2/acle-asm/dot_single_za32_mf8_vg1x2.c | 126 ++++\n .../sme2/acle-asm/dot_single_za32_mf8_vg1x4.c | 126 ++++\n .../sme2/acle-asm/dot_za16_mf8_vg1x2.c        | 150 +++++\n .../sme2/acle-asm/dot_za16_mf8_vg1x4.c        | 166 +++++\n .../sme2/acle-asm/dot_za32_mf8_vg1x2.c        | 150 +++++\n .../sme2/acle-asm/dot_za32_mf8_vg1x4.c        | 166 +++++\n .../aarch64/sme2/acle-asm/ld1_mf8_x2.c        | 262 ++++++++\n .../aarch64/sme2/acle-asm/ld1_mf8_x4.c        | 354 +++++++++++\n .../aarch64/sme2/acle-asm/ldnt1_mf8_x2.c      | 262 ++++++++\n .../aarch64/sme2/acle-asm/ldnt1_mf8_x4.c      | 354 +++++++++++\n .../aarch64/sme2/acle-asm/luti2_mf8.c         |  48 ++\n .../aarch64/sme2/acle-asm/luti2_mf8_x2.c      |  50 ++\n .../aarch64/sme2/acle-asm/luti2_mf8_x4.c      |  56 ++\n .../aarch64/sme2/acle-asm/luti4_mf8.c         |  48 ++\n .../aarch64/sme2/acle-asm/luti4_mf8_x2.c      |  50 ++\n .../sme2/acle-asm/mla_lane_za16_mf8_vg2x1.c   | 167 +++++\n .../sme2/acle-asm/mla_lane_za16_mf8_vg2x2.c   | 136 +++++\n .../sme2/acle-asm/mla_lane_za16_mf8_vg2x4.c   | 142 +++++\n .../sme2/acle-asm/mla_lane_za32_mf8_vg4x1.c   | 169 ++++++\n .../sme2/acle-asm/mla_lane_za32_mf8_vg4x2.c   | 137 +++++\n .../sme2/acle-asm/mla_lane_za32_mf8_vg4x4.c   | 143 +++++\n .../sme2/acle-asm/mla_za16_mf8_vg2x1.c        | 167 +++++\n .../sme2/acle-asm/mla_za16_mf8_vg2x2.c        | 285 +++++++++\n .../sme2/acle-asm/mla_za16_mf8_vg2x4.c        | 287 +++++++++\n .../sme2/acle-asm/mla_za32_mf8_vg4x1.c        | 167 +++++\n .../sme2/acle-asm/mla_za32_mf8_vg4x2.c        | 277 +++++++++\n .../sme2/acle-asm/mla_za32_mf8_vg4x4.c        | 289 +++++++++\n .../aarch64/sme2/acle-asm/mopa_za16_mf8.c     |  36 ++\n .../aarch64/sme2/acle-asm/mopa_za32_mf8.c     |  36 ++\n .../aarch64/sme2/acle-asm/read_hor_za8_vg2.c  |  78 +++\n .../aarch64/sme2/acle-asm/read_hor_za8_vg4.c  |  91 +++\n .../aarch64/sme2/acle-asm/read_ver_za8_vg2.c  |  78 +++\n .../aarch64/sme2/acle-asm/read_ver_za8_vg4.c  |  91 +++\n .../aarch64/sme2/acle-asm/read_za8_vg1x2.c    |  48 ++\n .../aarch64/sme2/acle-asm/read_za8_vg1x4.c    |  54 ++\n .../aarch64/sme2/acle-asm/readz_hor_za128.c   |  10 +\n .../aarch64/sme2/acle-asm/readz_hor_za8.c     |  10 +\n .../aarch64/sme2/acle-asm/readz_hor_za8_vg2.c |  78 +++\n .../aarch64/sme2/acle-asm/readz_hor_za8_vg4.c |  91 +++\n .../aarch64/sme2/acle-asm/readz_ver_za128.c   | 197 ++++++\n .../aarch64/sme2/acle-asm/readz_ver_za8.c     |  10 +\n .../aarch64/sme2/acle-asm/readz_ver_za8_vg2.c |  77 +++\n .../aarch64/sme2/acle-asm/readz_ver_za8_vg4.c |  90 +++\n .../aarch64/sme2/acle-asm/readz_za8_vg1x2.c   |  48 ++\n .../aarch64/sme2/acle-asm/readz_za8_vg1x4.c   |  56 ++\n .../aarch64/sme2/acle-asm/scale_f16_x2.c      | 192 ++++++\n .../aarch64/sme2/acle-asm/scale_f16_x4.c      | 229 +++++++\n .../aarch64/sme2/acle-asm/scale_f32_x2.c      | 208 +++++++\n .../aarch64/sme2/acle-asm/scale_f32_x4.c      | 229 +++++++\n .../aarch64/sme2/acle-asm/scale_f64_x2.c      | 208 +++++++\n .../aarch64/sme2/acle-asm/scale_f64_x4.c      | 229 +++++++\n .../aarch64/sme2/acle-asm/sel_mf8_x2.c        |  92 +++\n .../aarch64/sme2/acle-asm/sel_mf8_x4.c        |  92 +++\n .../aarch64/sme2/acle-asm/st1_mf8_x2.c        | 262 ++++++++\n .../aarch64/sme2/acle-asm/st1_mf8_x4.c        | 354 +++++++++++\n .../aarch64/sme2/acle-asm/stnt1_mf8_x2.c      | 262 ++++++++\n .../aarch64/sme2/acle-asm/stnt1_mf8_x4.c      | 354 +++++++++++\n .../aarch64/sme2/acle-asm/test_sme2_acle.h    |  12 +-\n .../aarch64/sme2/acle-asm/uzp_mf8_x2.c        |  77 +++\n .../aarch64/sme2/acle-asm/uzp_mf8_x4.c        |  73 +++\n .../aarch64/sme2/acle-asm/uzpq_mf8_x2.c       |  77 +++\n .../aarch64/sme2/acle-asm/uzpq_mf8_x4.c       |  73 +++\n .../sme2/acle-asm/vdot_lane_za16_mf8_vg1x2.c  | 119 ++++\n .../sme2/acle-asm/vdotb_lane_za32_mf8_vg1x4.c | 119 ++++\n .../sme2/acle-asm/vdott_lane_za32_mf8_vg1x4.c | 119 ++++\n .../aarch64/sme2/acle-asm/write_hor_za8_vg2.c |  78 +++\n .../aarch64/sme2/acle-asm/write_hor_za8_vg4.c |  91 +++\n .../aarch64/sme2/acle-asm/write_ver_za8_vg2.c |  78 +++\n .../aarch64/sme2/acle-asm/write_ver_za8_vg4.c |  91 +++\n .../aarch64/sme2/acle-asm/write_za8_vg1x2.c   |  48 ++\n .../aarch64/sme2/acle-asm/write_za8_vg1x4.c   |  54 ++\n .../aarch64/sme2/acle-asm/zip_mf8_x2.c        |  77 +++\n .../aarch64/sme2/acle-asm/zip_mf8_x4.c        |  73 +++\n .../aarch64/sme2/acle-asm/zipq_mf8_x2.c       |  77 +++\n .../aarch64/sme2/acle-asm/zipq_mf8_x4.c       |  73 +++\n .../aarch64/sve/acle/asm/test_sve_acle.h      |   3 +\n .../sve/acle/general-c/binary_za_m_1.c        |  14 +\n .../acle/general-c/binary_za_slice_lane_1.c   |  14 +\n .../general-c/binary_za_slice_opt_single_1.c  |  16 +\n .../general-c/dot_half_za_slice_lane_fpm.c    | 106 ++++\n .../aarch64/sve2/acle/asm/ld1_mf8_x2.c        | 269 +++++++++\n .../aarch64/sve2/acle/asm/ld1_mf8_x4.c        | 361 +++++++++++\n .../aarch64/sve2/acle/asm/ldnt1_mf8_x2.c      | 269 +++++++++\n .../aarch64/sve2/acle/asm/ldnt1_mf8_x4.c      | 361 +++++++++++\n .../aarch64/sve2/acle/asm/revd_mf8.c          |  80 +++\n .../aarch64/sve2/acle/asm/stnt1_mf8_x2.c      | 269 +++++++++\n .../aarch64/sve2/acle/asm/stnt1_mf8_x4.c      | 361 +++++++++++\n gcc/testsuite/lib/target-supports.exp         |   1 +\n 131 files changed, 14445 insertions(+), 45 deletions(-)\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme/acle-asm/revd_mf8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/cvt_mf8_bf16_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/cvt_mf8_f16_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/cvt_mf8_f32_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/cvt_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/cvtl_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/cvtn_mf8_f32_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_lane_za16_mf8_vg1x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_lane_za16_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_lane_za32_mf8_vg1x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_lane_za32_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_single_za16_mf8_vg1x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_single_za16_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_single_za32_mf8_vg1x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_single_za32_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_za16_mf8_vg1x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_za16_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_za32_mf8_vg1x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_za32_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/luti2_mf8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/luti2_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/luti2_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/luti4_mf8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/luti4_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_lane_za16_mf8_vg2x1.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_lane_za16_mf8_vg2x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_lane_za16_mf8_vg2x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_lane_za32_mf8_vg4x1.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_lane_za32_mf8_vg4x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_lane_za32_mf8_vg4x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_za16_mf8_vg2x1.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_za16_mf8_vg2x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_za16_mf8_vg2x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_za32_mf8_vg4x1.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_za32_mf8_vg4x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_za32_mf8_vg4x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mopa_za16_mf8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mopa_za32_mf8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za128.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/scale_f16_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/scale_f16_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/scale_f32_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/scale_f32_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/scale_f64_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/scale_f64_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/sel_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/sel_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/st1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/st1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/vdot_lane_za16_mf8_vg1x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/vdotb_lane_za32_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/vdott_lane_za32_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zip_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zip_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_half_za_slice_lane_fpm.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/revd_mf8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x4.c"}