From patchwork Tue Mar 26 08:18:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1065301 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44T3tx2lGjz9sSX for ; Tue, 26 Mar 2019 19:19:05 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Io6LXBJ/"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 44T3tx0DmlzDqK9 for ; Tue, 26 Mar 2019 19:19:05 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::541; helo=mail-pg1-x541.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Io6LXBJ/"; dkim-atps=neutral Received: from mail-pg1-x541.google.com (mail-pg1-x541.google.com [IPv6:2607:f8b0:4864:20::541]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 44T3tN3BwJzDqG8 for ; Tue, 26 Mar 2019 19:18:36 +1100 (AEDT) Received: by mail-pg1-x541.google.com with SMTP id f6so3770735pgs.8 for ; Tue, 26 Mar 2019 01:18:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=w9QacEoMcgdCtlaJLnzpElCVRUpHvcN0VvXQhBj9NzI=; b=Io6LXBJ/EMJAMF45oriWoBY1q4gMIDNm/SygTUmc6bhQSHAj1hA6+PSZGpHtE1Nn2E 9epDZhbKrL5zMDIPyyM0GGYp6RpgQy8DOeiyfNN5am4pgCkD7HXSxqvNVOW6ZIZcoE+A UAEvbpGsS2RHSLnwbEpbhSOqsDbqxNZkGM7zvtC3yvNpgwzG1tRykrEfa7CL4oXb8f1g CdOthNgqO8CpW7moRYqKiTpghE9Af7rsGbegneHwc81f2nF0Wn/60M0BmavzZsttQ62N sygOLq4gk2820Bu5vlf6FSBi3di9CECEbsPDoN4PVv6PntHQvSJQ8+63Jkd50EmkdLOX P88w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=w9QacEoMcgdCtlaJLnzpElCVRUpHvcN0VvXQhBj9NzI=; b=jQRKtNPjIw1AK6xZTKX2nZUQjKhEwAx5Xo+ckZz6areYQXkJGt29oz9heWujOwwrQ7 4eNYlVGkJvW/gv/3OKhHBYf4Y3Sp7lvG6854KO6djzmEiZpyZxECvU8pEFDpUiROIj8I PtAm3nRy2hbz7XZoO7G4tmM/bVEcaKR09FUdLMduzXbv+BqO47TyE92qjPa513AE0ISx PXAQkOzRz9MyGWBg5oIS4pMJkS17ZQxnLJBHYUoGt9DP6kJm/jfFHWA66z4ThUT3S9Z5 RLc7nAua07aMDtqh9tp6MPrTmyS0cYO2BwphDr/y4fr20nYOEcC9I/m4UDNv8R6ZIgiO KIAA== X-Gm-Message-State: APjAAAUdB3Mx/eAfha/8lj7LBfhwHi+QbppMtZNJUNaPRdPC67i+FMkH l9LnPJJQG3YKfmSLbVQrS3omxwJo X-Google-Smtp-Source: APXvYqzxTWhnv9dYv8xvVKuQqQpaLUF+Q+skrSIGXBPfGZP5xZ19VUZDWwN6RcfmspxSToLfhVQiKw== X-Received: by 2002:a63:ef57:: with SMTP id c23mr27598108pgk.176.1553588312663; Tue, 26 Mar 2019 01:18:32 -0700 (PDT) Received: from wafer.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id g64sm28651658pfg.13.2019.03.26.01.18.30 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 26 Mar 2019 01:18:31 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 26 Mar 2019 19:18:16 +1100 Message-Id: <20190326081819.9570-1-oohall@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Subject: [Skiboot] [PATCH 1/4] core/i2c: Add request state tracking X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Allow the submitter to track the state of an I2C request by adding a state field to the request. This avoids the need to use a stub completion callback in some cases. Signed-off-by: Oliver O'Halloran --- hw/p8-i2c.c | 1 + include/i2c.h | 14 ++++++++++++-- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/hw/p8-i2c.c b/hw/p8-i2c.c index a45769c0edb8..599614cf40e9 100644 --- a/hw/p8-i2c.c +++ b/hw/p8-i2c.c @@ -441,6 +441,7 @@ static void p8_i2c_complete_request(struct p8_i2c_master *master, list_del(&req->link); master->state = state_idle; req->result = ret; + req->req_state = i2c_req_done; /* Schedule re-enabling of sensor cache */ if (master->occ_cache_dis) diff --git a/include/i2c.h b/include/i2c.h index a06cca0dd31c..484176f93508 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -57,6 +57,12 @@ struct i2c_request { uint32_t offset; /* Internal device offset */ uint32_t rw_len; /* Length of the data request */ void *rw_buf; /* Data request buffer */ + enum i2c_request_state { + i2c_req_new, /* un-initialised */ + i2c_req_queued, /* waiting in the queue */ + i2c_req_done, /* request has been completed */ + } req_state; + void (*completion)( /* Completion callback */ int rc, struct i2c_request *req); void *user_data; /* Client data */ @@ -68,9 +74,13 @@ struct i2c_request { extern void i2c_add_bus(struct i2c_bus *bus); extern struct i2c_bus *i2c_find_bus_by_id(uint32_t opal_id); -static inline int i2c_queue_req(struct i2c_request *req) +static inline int64_t i2c_queue_req(struct i2c_request *req) { - return req->bus->queue_req(req); + int64_t ret = req->bus->queue_req(req); + + if (!ret) + req->req_state = i2c_req_queued; + return ret; } static inline uint64_t i2c_run_req(struct i2c_request *req) From patchwork Tue Mar 26 08:18:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1065300 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44T3tX30f1z9sSX for ; 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Tue, 26 Mar 2019 01:18:34 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 26 Mar 2019 19:18:17 +1100 Message-Id: <20190326081819.9570-2-oohall@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190326081819.9570-1-oohall@gmail.com> References: <20190326081819.9570-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 2/4] core/i2c: Poll on request state in i2c_request_send() X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Use the new built-in state variable rather than a single-use completion function. Makes things a bit cleaner. Signed-off-by: Oliver O'Halloran --- core/i2c.c | 26 ++++---------------------- 1 file changed, 4 insertions(+), 22 deletions(-) diff --git a/core/i2c.c b/core/i2c.c index 00dac0d12abb..e78b6b616494 100644 --- a/core/i2c.c +++ b/core/i2c.c @@ -140,20 +140,6 @@ opal_call(OPAL_I2C_REQUEST, opal_i2c_request, 3); #define MAX_NACK_RETRIES 2 #define REQ_COMPLETE_POLLING 5 /* Check if req is complete in 5ms interval */ - -struct i2c_sync_userdata { - int rc; - bool done; -}; - -static void i2c_sync_request_complete(int rc, struct i2c_request *req) -{ - struct i2c_sync_userdata *ud = req->user_data; - ud->rc = rc; - lwsync(); - ud->done = true; -} - /** * i2c_request_send - send request to i2c bus synchronously * @bus_id: i2c bus id @@ -177,7 +163,6 @@ int i2c_request_send(int bus_id, int dev_addr, int read_write, struct i2c_request *req; struct i2c_bus *bus; uint64_t time_to_wait = 0; - struct i2c_sync_userdata ud; uint64_t timer_period = msecs_to_tb(5), timer_count; bus = i2c_find_bus_by_id(bus_id); @@ -210,10 +195,7 @@ int i2c_request_send(int bus_id, int dev_addr, int read_write, req->offset_bytes = offset_bytes; req->rw_buf = (void*) buf; req->rw_len = buflen; - req->completion = i2c_sync_request_complete; req->timeout = timeout; - ud.done = false; - req->user_data = &ud; for (retries = 0; retries <= MAX_NACK_RETRIES; retries++) { waited = 0; @@ -240,15 +222,15 @@ int i2c_request_send(int bus_id, int dev_addr, int read_write, check_timers(false); timer_count = 0; } - } while (!ud.done); + } while (req->req_state != i2c_req_done); lwsync(); - rc = ud.rc; + rc = req->result; - /* error or success */ + /* retry on NACK, otherwise exit */ if (rc != OPAL_I2C_NACK_RCVD) break; - ud.done = false; + req->req_state = i2c_req_new; } prlog(PR_DEBUG, "I2C: %s req op=%x offset=%x buf=%016llx buflen=%d " From patchwork Tue Mar 26 08:18:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1065302 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44T3vH4kwsz9sSX for ; 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Tue, 26 Mar 2019 01:18:36 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 26 Mar 2019 19:18:18 +1100 Message-Id: <20190326081819.9570-3-oohall@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190326081819.9570-1-oohall@gmail.com> References: <20190326081819.9570-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 3/4] core/i2c: split i2c_request_send() X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Split the i2c_request_send() method into two methods: i2c_request_send() which allocates and populates and i2c_request structure, and i2c_request_sync() which take a request structure and blocks until it completes. This allows code that allocates a i2c_request structure elsewhere to make use of the existing busy-wait and request retry logic. Fix the return types to use int64_t while we're here since these are returning OPAL_API error codes. Signed-off-by: Oliver O'Halloran --- core/i2c.c | 97 ++++++++++++++++++++++++++++----------------------- include/i2c.h | 3 +- 2 files changed, 55 insertions(+), 45 deletions(-) diff --git a/core/i2c.c b/core/i2c.c index e78b6b616494..07303e7539b6 100644 --- a/core/i2c.c +++ b/core/i2c.c @@ -140,6 +140,56 @@ opal_call(OPAL_I2C_REQUEST, opal_i2c_request, 3); #define MAX_NACK_RETRIES 2 #define REQ_COMPLETE_POLLING 5 /* Check if req is complete in 5ms interval */ +int64_t i2c_request_sync(struct i2c_request *req) +{ + uint64_t timer_period = msecs_to_tb(5), timer_count; + uint64_t time_to_wait = 0; + int64_t rc, waited, retries; + + for (retries = 0; retries <= MAX_NACK_RETRIES; retries++) { + waited = 0; + timer_count = 0; + + i2c_queue_req(req); + + do { + time_to_wait = i2c_run_req(req); + if (!time_to_wait) + time_to_wait = REQ_COMPLETE_POLLING; + time_wait(time_to_wait); + waited += time_to_wait; + timer_count += time_to_wait; + if (timer_count > timer_period) { + /* + * The above request may be relying on + * timers to complete, yet there may + * not be called, especially during + * opal init. We could be looping here + * forever. So explicitly check the + * timers once in a while + */ + check_timers(false); + timer_count = 0; + } + } while (req->req_state != i2c_req_done); + + lwsync(); + rc = req->result; + + /* retry on NACK, otherwise exit */ + if (rc != OPAL_I2C_NACK_RCVD) + break; + req->req_state = i2c_req_new; + } + + prlog(PR_DEBUG, "I2C: %s req op=%x offset=%x buf=%016llx buflen=%d " + "delay=%lu/%lld rc=%lld\n", + (rc) ? "!!!!" : "----", req->op, req->offset, + *(uint64_t*) req->rw_buf, req->rw_len, tb_to_msecs(waited), req->timeout, rc); + + return rc; +} + /** * i2c_request_send - send request to i2c bus synchronously * @bus_id: i2c bus id @@ -155,15 +205,13 @@ opal_call(OPAL_I2C_REQUEST, opal_i2c_request, 3); * * Returns: Zero on success otherwise a negative error code */ -int i2c_request_send(int bus_id, int dev_addr, int read_write, +int64_t i2c_request_send(int bus_id, int dev_addr, int read_write, uint32_t offset, uint32_t offset_bytes, void* buf, size_t buflen, int timeout) { - int rc, waited, retries; struct i2c_request *req; struct i2c_bus *bus; - uint64_t time_to_wait = 0; - uint64_t timer_period = msecs_to_tb(5), timer_count; + int64_t rc; bus = i2c_find_bus_by_id(bus_id); if (!bus) { @@ -197,46 +245,7 @@ int i2c_request_send(int bus_id, int dev_addr, int read_write, req->rw_len = buflen; req->timeout = timeout; - for (retries = 0; retries <= MAX_NACK_RETRIES; retries++) { - waited = 0; - timer_count = 0; - - i2c_queue_req(req); - - do { - time_to_wait = i2c_run_req(req); - if (!time_to_wait) - time_to_wait = REQ_COMPLETE_POLLING; - time_wait(time_to_wait); - waited += time_to_wait; - timer_count += time_to_wait; - if (timer_count > timer_period) { - /* - * The above request may be relying on - * timers to complete, yet there may - * not be called, especially during - * opal init. We could be looping here - * forever. So explicitly check the - * timers once in a while - */ - check_timers(false); - timer_count = 0; - } - } while (req->req_state != i2c_req_done); - - lwsync(); - rc = req->result; - - /* retry on NACK, otherwise exit */ - if (rc != OPAL_I2C_NACK_RCVD) - break; - req->req_state = i2c_req_new; - } - - prlog(PR_DEBUG, "I2C: %s req op=%x offset=%x buf=%016llx buflen=%d " - "delay=%lu/%d rc=%d\n", - (rc) ? "!!!!" : "----", req->op, req->offset, - *(uint64_t*) buf, req->rw_len, tb_to_msecs(waited), timeout, rc); + rc = i2c_request_sync(req); free(req); if (rc) diff --git a/include/i2c.h b/include/i2c.h index 484176f93508..e5306837fe36 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -98,7 +98,8 @@ static inline int i2c_check_quirk(struct i2c_request *req, int *rc) } /* I2C synchronous request API */ -int i2c_request_send(int bus_id, int dev_addr, int read_write, +int64_t i2c_request_sync(struct i2c_request *req); +int64_t i2c_request_send(int bus_id, int dev_addr, int read_write, uint32_t offset, uint32_t offset_bytes, void* buf, size_t buflen, int timeout); From patchwork Tue Mar 26 08:18:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1065303 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44T3vY6SWtz9sSZ for ; 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Tue, 26 Mar 2019 01:18:37 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 26 Mar 2019 19:18:19 +1100 Message-Id: <20190326081819.9570-4-oohall@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190326081819.9570-1-oohall@gmail.com> References: <20190326081819.9570-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 4/4] platforms/firenze: Rework I2C controller fixups X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" For some system planars we need to apply some fixups to the PCI slot power controllers. These are done at boot time and a slightly bizzare in their construction since they share the I2C request completion callback with the runtime slot power on method which affects the PCI slot state machine. This is confusing to say the least, so this patch reworks the fixup code to use the synchronus I2C request code rather than open-coding the wait based on what PCI slot state is in use. It also does some general control flow cleanup and adds some comments explaining what the fixups are for. Signed-off-by: Oliver O'Halloran --- Tested on P83 and P84 which have 1S4U and 2S4U planars respectively. --- platforms/ibm-fsp/firenze-pci.c | 100 ++++++++++++++++---------------- 1 file changed, 51 insertions(+), 49 deletions(-) diff --git a/platforms/ibm-fsp/firenze-pci.c b/platforms/ibm-fsp/firenze-pci.c index b87c65bfc082..853e9685cc77 100644 --- a/platforms/ibm-fsp/firenze-pci.c +++ b/platforms/ibm-fsp/firenze-pci.c @@ -146,6 +146,11 @@ static struct firenze_pci_slot_info firenze_pci_slots[] = { { 0x07, "C3", 1, 1, 0x10, 1, 0, 0x3A, 1, 0xAA, 12 }, { 0x06, "C2", 1, 1, 0x10, 1, 0, 0x3A, 0, 0xAA, 12 } }; + +/* + * I2C power controller register fix up table. Not sure what they do, but + * they seem to relate to the fast-trip setpoint. + */ static struct firenze_pci_slot_fixup_info firenze_pci_slot_fixup_tbl[] = { { "C3", 0x5e, 0xfb }, { "C3", 0x5b, 0xff }, @@ -737,62 +742,52 @@ static struct i2c_bus *firenze_pci_find_i2c_bus(uint8_t chip, } static int64_t firenze_pci_slot_fixup_one_reg(struct pci_slot *slot, - struct firenze_pci_slot_fixup_info *fixup, - bool write) + struct firenze_pci_slot_fixup_info *fixup) { struct firenze_pci_slot *plat_slot = slot->data; - struct i2c_request *req = plat_slot->req; - int32_t retries = FIRENZE_PCI_SLOT_RETRIES; - int64_t rc = OPAL_SUCCESS; - - req->offset = fixup->reg; - if (write) { - req->op = SMBUS_WRITE; - *(uint8_t *)(req->rw_buf) = fixup->val; - } else { - req->op = SMBUS_READ; - *(uint8_t *)(req->rw_buf) = 0; - } - pci_slot_set_state(slot, FIRENZE_PCI_SLOT_FRESET_WAIT_RSP); - req->timeout = FIRENZE_PCI_I2C_TIMEOUT; - i2c_queue_req(plat_slot->req); - - while (retries-- > 0) { - check_timers(false); - if (slot->state == FIRENZE_PCI_SLOT_FRESET_DELAY) - break; - - time_wait_ms(FIRENZE_PCI_SLOT_DELAY); - } + struct i2c_request req; + uint8_t buf; + int64_t rc; - if (slot->state != FIRENZE_PCI_SLOT_FRESET_DELAY) { - rc = OPAL_BUSY; - prlog(PR_ERR, "Timeout %s PCI slot [%s] - (%02x, %02x)\n", - write ? "writing" : "reading", fixup->label, - fixup->reg, fixup->val); - goto out; - } + /* + * Fill out our own request structure since we don't want to invoke the + * normal completion handler. + */ + memset(&req, 0, sizeof(req)); + req.dev_addr = plat_slot->req->dev_addr; + req.bus = plat_slot->req->bus; + req.offset = fixup->reg; + req.offset_bytes = 1; + req.rw_buf = &buf; + req.rw_len = 1; + req.timeout = FIRENZE_PCI_I2C_TIMEOUT; + + req.op = SMBUS_WRITE; + buf = fixup->val; + rc = i2c_request_sync(&req); + if (rc < 0) + return rc; - if (!write && (*(uint8_t *)(req->rw_buf)) != fixup->val) { - rc = OPAL_INTERNAL_ERROR; - prlog(PR_ERR, "Error fixing PCI slot [%s] - (%02x, %02x, %02x)\n", - fixup->label, fixup->reg, fixup->val, - (*(uint8_t *)(req->rw_buf))); + /* + * Check the register fixup has been applied. It's not the end of the + * world we don't, but eh... + */ + req.op = SMBUS_READ; + rc = i2c_request_sync(&req); + if (rc == OPAL_SUCCESS && buf != fixup->val) { + prlog(PR_ERR, "Error verifying fixup [%s] - (%02x, %02x, %02x)\n", + fixup->label, fixup->reg, fixup->val, buf); } -out: - pci_slot_set_state(slot, FIRENZE_PCI_SLOT_NORMAL); return rc; } static void firenze_pci_slot_fixup(struct pci_slot *slot, struct firenze_pci_slot_info *info) { - struct firenze_pci_slot_fixup_info *fixup; + int64_t rc, i, applied = 0; const uint32_t *p; uint64_t id; - uint32_t i; - int64_t rc; p = dt_prop_get_def(dt_root, "ibm,vpd-lx-info", NULL); id = p ? (((uint64_t)p[1] << 32) | p[2]) : 0ul; @@ -800,19 +795,26 @@ static void firenze_pci_slot_fixup(struct pci_slot *slot, id != LX_VPD_1S4U_BACKPLANE) return; - fixup = firenze_pci_slot_fixup_tbl; - for (i = 0; i < ARRAY_SIZE(firenze_pci_slot_fixup_tbl); i++, fixup++) { + for (i = 0; i < ARRAY_SIZE(firenze_pci_slot_fixup_tbl); i++) { + struct firenze_pci_slot_fixup_info *fixup = + &firenze_pci_slot_fixup_tbl[i]; + if (strcmp(info->label, fixup->label)) continue; - rc = firenze_pci_slot_fixup_one_reg(slot, fixup, true); - if (rc) + rc = firenze_pci_slot_fixup_one_reg(slot, fixup); + if (rc) { + prlog(PR_ERR, "I2C error (%lld) applying fixup [%s] - (%02x, %02x)\n", + rc, fixup->label, fixup->reg, fixup->val); return; + } - rc = firenze_pci_slot_fixup_one_reg(slot, fixup, false); - if (rc) - return; + applied++; } + + if (applied) + prlog(PR_INFO, "Applied %lld fixups for [%s]\n", + applied, info->label); } static void firenze_pci_setup_power_mgt(struct pci_slot *slot,