From patchwork Thu Mar 14 11:53:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 1056475 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44KnFX4P2cz9s4V for ; Thu, 14 Mar 2019 22:54:56 +1100 (AEDT) Received: from localhost ([127.0.0.1]:34910 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h4Owo-0005dB-C2 for incoming@patchwork.ozlabs.org; Thu, 14 Mar 2019 07:54:54 -0400 Received: from eggs.gnu.org ([209.51.188.92]:60990) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h4Ow6-0005bp-6b for qemu-devel@nongnu.org; Thu, 14 Mar 2019 07:54:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h4Ow4-0006IN-8t for qemu-devel@nongnu.org; Thu, 14 Mar 2019 07:54:10 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42106) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h4Ow2-0006GG-BQ for qemu-devel@nongnu.org; Thu, 14 Mar 2019 07:54:07 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 82A8A3168BC3 for ; Thu, 14 Mar 2019 11:54:05 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-24.ams2.redhat.com [10.36.116.24]) by smtp.corp.redhat.com (Postfix) with ESMTP id E9110282E1; Thu, 14 Mar 2019 11:53:59 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id C6BFB16E0A; Thu, 14 Mar 2019 12:53:58 +0100 (CET) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Thu, 14 Mar 2019 12:53:57 +0100 Message-Id: <20190314115358.26678-2-kraxel@redhat.com> In-Reply-To: <20190314115358.26678-1-kraxel@redhat.com> References: <20190314115358.26678-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.41]); Thu, 14 Mar 2019 11:54:05 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 1/2] virtio-gpu: delay virglrenderer reset when blocked. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann , "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" If renderer_blocked is set do not call virtio_gpu_virgl_reset(). Instead set a flag indicating that virglrenderer needs a reset. When renderer_blocked gets cleared do the actual reset call. Without this we can trigger an assert in spice due to calling spice_qxl_gl_scanout() while another operation is still running: spice_qxl_gl_scanout: condition `qxl_state->gl_draw_cookie == GL_DRAW_COOKIE_INVALID' failed Signed-off-by: Gerd Hoffmann --- include/hw/virtio/virtio-gpu.h | 1 + hw/display/virtio-gpu.c | 12 +++++++++++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index ce0ca7217175..60425c5d58dc 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -113,6 +113,7 @@ typedef struct VirtIOGPU { bool use_virgl_renderer; bool renderer_inited; int renderer_blocked; + bool renderer_reset; QEMUTimer *fence_poll; QEMUTimer *print_stats; diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 4dbf48e42482..fbd8d908ad32 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1084,6 +1084,12 @@ static void virtio_gpu_gl_block(void *opaque, bool block) assert(g->renderer_blocked >= 0); if (g->renderer_blocked == 0) { +#ifdef CONFIG_VIRGL + if (g->renderer_reset) { + g->renderer_reset = false; + virtio_gpu_virgl_reset(g); + } +#endif virtio_gpu_process_cmdq(g); } } @@ -1368,7 +1374,11 @@ static void virtio_gpu_reset(VirtIODevice *vdev) #ifdef CONFIG_VIRGL if (g->use_virgl_renderer) { - virtio_gpu_virgl_reset(g); + if (g->renderer_blocked) { + g->renderer_reset = true; + } else { + virtio_gpu_virgl_reset(g); + } g->use_virgl_renderer = 0; } #endif From patchwork Thu Mar 14 11:53:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 1056476 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44KnFY0cPzz9s55 for ; Thu, 14 Mar 2019 22:54:56 +1100 (AEDT) Received: from localhost ([127.0.0.1]:34912 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h4Owo-0005dM-Qh for incoming@patchwork.ozlabs.org; Thu, 14 Mar 2019 07:54:54 -0400 Received: from eggs.gnu.org ([209.51.188.92]:60983) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h4Ow4-0005ag-99 for qemu-devel@nongnu.org; Thu, 14 Mar 2019 07:54:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h4Ow1-0006GZ-VA for qemu-devel@nongnu.org; Thu, 14 Mar 2019 07:54:08 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56726) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h4Ow1-0006Fa-ID for qemu-devel@nongnu.org; Thu, 14 Mar 2019 07:54:05 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D7C0B2EED0B for ; Thu, 14 Mar 2019 11:54:04 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-24.ams2.redhat.com [10.36.116.24]) by smtp.corp.redhat.com (Postfix) with ESMTP id CB80A5DD84; Thu, 14 Mar 2019 11:53:59 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id DC45B17535; Thu, 14 Mar 2019 12:53:58 +0100 (CET) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Thu, 14 Mar 2019 12:53:58 +0100 Message-Id: <20190314115358.26678-3-kraxel@redhat.com> In-Reply-To: <20190314115358.26678-1-kraxel@redhat.com> References: <20190314115358.26678-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Thu, 14 Mar 2019 11:54:04 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 2/2] virtio-gpu: clear command and fence queues on reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann , "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" It was never correct to not clear them. Due to commit "3912e66a3feb virtio-vga: fix reset." this became more obvious though. The virtio rings get properly reset now, and trying to process the stale commands will trigger an assert in the virtio core. Signed-off-by: Gerd Hoffmann Reviewed-by: Marc-André Lureau --- hw/display/virtio-gpu.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index fbd8d908ad32..9e37e0ac96b7 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1356,6 +1356,7 @@ static void virtio_gpu_reset(VirtIODevice *vdev) { VirtIOGPU *g = VIRTIO_GPU(vdev); struct virtio_gpu_simple_resource *res, *tmp; + struct virtio_gpu_ctrl_command *cmd; int i; g->enable = 0; @@ -1372,6 +1373,19 @@ static void virtio_gpu_reset(VirtIODevice *vdev) g->scanout[i].ds = NULL; } + while (!QTAILQ_EMPTY(&g->cmdq)) { + cmd = QTAILQ_FIRST(&g->cmdq); + QTAILQ_REMOVE(&g->cmdq, cmd, next); + g_free(cmd); + } + + while (!QTAILQ_EMPTY(&g->fenceq)) { + cmd = QTAILQ_FIRST(&g->fenceq); + QTAILQ_REMOVE(&g->fenceq, cmd, next); + g->inflight--; + g_free(cmd); + } + #ifdef CONFIG_VIRGL if (g->use_virgl_renderer) { if (g->renderer_blocked) {