From patchwork Wed Mar 13 04:15:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 1055887 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44JzFL5PpRz9s4Y for ; Wed, 13 Mar 2019 15:21:58 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 44JzFL4KxFzDqK3 for ; Wed, 13 Mar 2019 15:21:58 +1100 (AEDT) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=au1.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 44Jz6v0QXVzDqC0 for ; Wed, 13 Mar 2019 15:16:22 +1100 (AEDT) Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x2D4FIC1041147 for ; Wed, 13 Mar 2019 00:16:20 -0400 Received: from e06smtp01.uk.ibm.com (e06smtp01.uk.ibm.com [195.75.94.97]) by mx0b-001b2d01.pphosted.com with ESMTP id 2r6nmu3u64-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 13 Mar 2019 00:16:20 -0400 Received: from localhost by e06smtp01.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 13 Mar 2019 04:16:15 -0000 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2D4GEsW26280078 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 13 Mar 2019 04:16:14 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E5C02AE05D; Wed, 13 Mar 2019 04:16:13 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4A538AE053; Wed, 13 Mar 2019 04:16:13 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 13 Mar 2019 04:16:13 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 2AF80A01B5; Wed, 13 Mar 2019 15:16:12 +1100 (AEDT) From: "Alastair D'Silva" To: Subject: [PATCH 1/7] ocxl: Provide global MMIO accessors for external drivers Date: Wed, 13 Mar 2019 15:15:16 +1100 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190313041524.14644-1-alastair@au1.ibm.com> References: <20190313041524.14644-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19031304-4275-0000-0000-0000031A489A X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19031304-4276-0000-0000-00003828B56D Message-Id: <20190313041524.14644-2-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=699 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903130029 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arnd Bergmann , Greg Kroah-Hartman , Greg Kurz , linux-kernel@vger.kernel.org, Andrew Donnellan , Alastair D'Silva , Frederic Barrat , linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Alastair D'Silva External drivers that communicate via OpenCAPI will need to make MMIO calls to interact with the devices. Signed-off-by: Alastair D'Silva Reviewed-by: Greg Kurz Acked-by: Andrew Donnellan --- drivers/misc/ocxl/Makefile | 2 +- drivers/misc/ocxl/mmio.c | 234 +++++++++++++++++++++++++++++++++++++ include/misc/ocxl.h | 113 ++++++++++++++++++ 3 files changed, 348 insertions(+), 1 deletion(-) create mode 100644 drivers/misc/ocxl/mmio.c diff --git a/drivers/misc/ocxl/Makefile b/drivers/misc/ocxl/Makefile index 5229dcda8297..922e47cd4f0d 100644 --- a/drivers/misc/ocxl/Makefile +++ b/drivers/misc/ocxl/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ ccflags-$(CONFIG_PPC_WERROR) += -Werror -ocxl-y += main.o pci.o config.o file.o pasid.o +ocxl-y += main.o pci.o config.o file.o pasid.o mmio.o ocxl-y += link.o context.o afu_irq.o sysfs.o trace.o obj-$(CONFIG_OCXL) += ocxl.o diff --git a/drivers/misc/ocxl/mmio.c b/drivers/misc/ocxl/mmio.c new file mode 100644 index 000000000000..7f6ebae1c6c7 --- /dev/null +++ b/drivers/misc/ocxl/mmio.c @@ -0,0 +1,234 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright 2017 IBM Corp. +#include +#include "trace.h" +#include "ocxl_internal.h" + +int ocxl_global_mmio_read32(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u32 *val) +{ + if (offset > afu->config.global_mmio_size - 4) + return -EINVAL; + +#ifdef __BIG_ENDIAN__ + if (endian == OCXL_HOST_ENDIAN) + endian = OCXL_BIG_ENDIAN; +#endif + + switch (endian) { + case OCXL_BIG_ENDIAN: + *val = readl_be((char *)afu->global_mmio_ptr + offset); + break; + + default: + *val = readl((char *)afu->global_mmio_ptr + offset); + break; + } + + return 0; +} +EXPORT_SYMBOL_GPL(ocxl_global_mmio_read32); + +int ocxl_global_mmio_read64(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u64 *val) +{ + if (offset > afu->config.global_mmio_size - 8) + return -EINVAL; + +#ifdef __BIG_ENDIAN__ + if (endian == OCXL_HOST_ENDIAN) + endian = OCXL_BIG_ENDIAN; +#endif + + switch (endian) { + case OCXL_BIG_ENDIAN: + *val = readq_be((char *)afu->global_mmio_ptr + offset); + break; + + default: + *val = readq((char *)afu->global_mmio_ptr + offset); + break; + } + + return 0; +} +EXPORT_SYMBOL_GPL(ocxl_global_mmio_read64); + +int ocxl_global_mmio_write32(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u32 val) +{ + if (offset > afu->config.global_mmio_size - 4) + return -EINVAL; + +#ifdef __BIG_ENDIAN__ + if (endian == OCXL_HOST_ENDIAN) + endian = OCXL_BIG_ENDIAN; +#endif + + switch (endian) { + case OCXL_BIG_ENDIAN: + writel_be(val, (char *)afu->global_mmio_ptr + offset); + break; + + default: + writel(val, (char *)afu->global_mmio_ptr + offset); + break; + } + + + return 0; +} +EXPORT_SYMBOL_GPL(ocxl_global_mmio_write32); + +int ocxl_global_mmio_write64(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u64 val) +{ + if (offset > afu->config.global_mmio_size - 8) + return -EINVAL; + +#ifdef __BIG_ENDIAN__ + if (endian == OCXL_HOST_ENDIAN) + endian = OCXL_BIG_ENDIAN; +#endif + + switch (endian) { + case OCXL_BIG_ENDIAN: + writeq_be(val, (char *)afu->global_mmio_ptr + offset); + break; + + default: + writeq(val, (char *)afu->global_mmio_ptr + offset); + break; + } + + + return 0; +} +EXPORT_SYMBOL_GPL(ocxl_global_mmio_write64); + +int ocxl_global_mmio_set32(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u32 mask) +{ + u32 tmp; + + if (offset > afu->config.global_mmio_size - 4) + return -EINVAL; + +#ifdef __BIG_ENDIAN__ + if (endian == OCXL_HOST_ENDIAN) + endian = OCXL_BIG_ENDIAN; +#endif + + switch (endian) { + case OCXL_BIG_ENDIAN: + tmp = readl_be((char *)afu->global_mmio_ptr + offset); + tmp |= mask; + writel_be(tmp, (char *)afu->global_mmio_ptr + offset); + break; + + default: + tmp = readl((char *)afu->global_mmio_ptr + offset); + tmp |= mask; + writel(tmp, (char *)afu->global_mmio_ptr + offset); + break; + } + + return 0; +} +EXPORT_SYMBOL_GPL(ocxl_global_mmio_set32); + +int ocxl_global_mmio_set64(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u64 mask) +{ + u64 tmp; + + if (offset > afu->config.global_mmio_size - 8) + return -EINVAL; + +#ifdef __BIG_ENDIAN__ + if (endian == OCXL_HOST_ENDIAN) + endian = OCXL_BIG_ENDIAN; +#endif + + switch (endian) { + case OCXL_BIG_ENDIAN: + tmp = readq_be((char *)afu->global_mmio_ptr + offset); + tmp |= mask; + writeq_be(tmp, (char *)afu->global_mmio_ptr + offset); + break; + + default: + tmp = readq((char *)afu->global_mmio_ptr + offset); + tmp |= mask; + writeq(tmp, (char *)afu->global_mmio_ptr + offset); + break; + } + + return 0; +} +EXPORT_SYMBOL_GPL(ocxl_global_mmio_set64); + +int ocxl_global_mmio_clear32(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u32 mask) +{ + u32 tmp; + + if (offset > afu->config.global_mmio_size - 4) + return -EINVAL; + +#ifdef __BIG_ENDIAN__ + if (endian == OCXL_HOST_ENDIAN) + endian = OCXL_BIG_ENDIAN; +#endif + + switch (endian) { + case OCXL_BIG_ENDIAN: + tmp = readl_be((char *)afu->global_mmio_ptr + offset); + tmp &= ~mask; + writel_be(tmp, (char *)afu->global_mmio_ptr + offset); + break; + + default: + tmp = readl((char *)afu->global_mmio_ptr + offset); + tmp &= ~mask; + writel(tmp, (char *)afu->global_mmio_ptr + offset); + break; + } + + + return 0; +} +EXPORT_SYMBOL_GPL(ocxl_global_mmio_clear32); + +int ocxl_global_mmio_clear64(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u64 mask) +{ + u64 tmp; + + if (offset > afu->config.global_mmio_size - 8) + return -EINVAL; + +#ifdef __BIG_ENDIAN__ + if (endian == OCXL_HOST_ENDIAN) + endian = OCXL_BIG_ENDIAN; +#endif + + switch (endian) { + case OCXL_BIG_ENDIAN: + tmp = readq_be((char *)afu->global_mmio_ptr + offset); + tmp &= ~mask; + writeq_be(tmp, (char *)afu->global_mmio_ptr + offset); + break; + + default: + tmp = readq((char *)afu->global_mmio_ptr + offset); + tmp &= ~mask; + writeq(tmp, (char *)afu->global_mmio_ptr + offset); + break; + } + + writeq(tmp, (char *)afu->global_mmio_ptr + offset); + + return 0; +} +EXPORT_SYMBOL_GPL(ocxl_global_mmio_clear64); diff --git a/include/misc/ocxl.h b/include/misc/ocxl.h index 9530d3be1b30..3b320c39f0af 100644 --- a/include/misc/ocxl.h +++ b/include/misc/ocxl.h @@ -49,6 +49,119 @@ struct ocxl_fn_config { s8 max_afu_index; }; +// These are opaque outside the ocxl driver +struct ocxl_afu; + +enum ocxl_endian { + OCXL_BIG_ENDIAN = 0, /**< AFU data is big-endian */ + OCXL_LITTLE_ENDIAN = 1, /**< AFU data is little-endian */ + OCXL_HOST_ENDIAN = 2, /**< AFU data is the same endianness as the host */ +}; + +/** + * Read a 32 bit value from global MMIO + * + * @afu: The AFU + * @offset: The Offset from the start of MMIO + * @endian: the endianness that the MMIO data is in + * @val: returns the value + * + * Returns 0 for success, negative on error + */ +int ocxl_global_mmio_read32(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u32 *val); + +/** + * Read a 64 bit value from global MMIO + * + * @afu: The AFU + * @offset: The Offset from the start of MMIO + * @endian: the endianness that the MMIO data is in + * @val: returns the value + * + * Returns 0 for success, negative on error + */ +int ocxl_global_mmio_read64(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u64 *val); + +/** + * Write a 32 bit value to global MMIO + * + * @afu: The AFU + * @offset: The Offset from the start of MMIO + * @endian: the endianness that the MMIO data is in + * @val: The value to write + * + * Returns 0 for success, negative on error + */ +int ocxl_global_mmio_write32(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u32 val); + +/** + * Write a 64 bit value to global MMIO + * + * @afu: The AFU + * @offset: The Offset from the start of MMIO + * @endian: the endianness that the MMIO data is in + * @val: The value to write + * + * Returns 0 for success, negative on error + */ +int ocxl_global_mmio_write64(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u64 val); + +/** + * Set bits in a 32 bit global MMIO register + * + * @afu: The AFU + * @offset: The Offset from the start of MMIO + * @endian: the endianness that the MMIO data is in + * @mask: a mask of the bits to set + * + * Returns 0 for success, negative on error + */ +int ocxl_global_mmio_set32(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u32 mask); + +/** + * Set bits in a 64 bit global MMIO register + * + * @afu: The AFU + * @offset: The Offset from the start of MMIO + * @endian: the endianness that the MMIO data is in + * @mask: a mask of the bits to set + * + * Returns 0 for success, negative on error + */ +int ocxl_global_mmio_set64(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u64 mask); + +/** + * Set bits in a 32 bit global MMIO register + * + * @afu: The AFU + * @offset: The Offset from the start of MMIO + * @endian: the endianness that the MMIO data is in + * @mask: a mask of the bits to set + * + * Returns 0 for success, negative on error + */ +int ocxl_global_mmio_clear32(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u32 mask); + +/** + * Set bits in a 64 bit global MMIO register + * + * @afu: The AFU + * @offset: The Offset from the start of MMIO + * @endian: the endianness that the MMIO data is in + * @mask: a mask of the bits to set + * + * Returns 0 for success, negative on error + */ +int ocxl_global_mmio_clear64(struct ocxl_afu *afu, size_t offset, + enum ocxl_endian endian, u64 mask); + /* * Read the configuration space of a function and fill in a * ocxl_fn_config structure with all the function details From patchwork Wed Mar 13 04:15:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 1055888 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44JzH41nplz9s3l for ; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 13 Mar 2019 04:16:16 -0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2D4GF4N61276252 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 13 Mar 2019 04:16:15 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 94C0FA4059; Wed, 13 Mar 2019 04:16:15 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F14B4A404D; Wed, 13 Mar 2019 04:16:14 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 13 Mar 2019 04:16:14 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id DA098A024A; Wed, 13 Mar 2019 15:16:13 +1100 (AEDT) From: "Alastair D'Silva" To: Subject: [PATCH 2/7] ocxl: Allow external drivers to use OpenCAPI contexts Date: Wed, 13 Mar 2019 15:15:17 +1100 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190313041524.14644-1-alastair@au1.ibm.com> References: <20190313041524.14644-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19031304-0020-0000-0000-00000321E76D X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19031304-0021-0000-0000-00002174163D Message-Id: <20190313041524.14644-3-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=504 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903130029 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arnd Bergmann , Greg Kroah-Hartman , Greg Kurz , linux-kernel@vger.kernel.org, Andrew Donnellan , Alastair D'Silva , Frederic Barrat , linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Alastair D'Silva Most OpenCAPI operations require a valid context, so exposing these functions to external drivers is necessary. Signed-off-by: Alastair D'Silva Reviewed-by: Greg Kurz Acked-by: Frederic Barrat --- drivers/misc/ocxl/context.c | 9 +++++-- drivers/misc/ocxl/file.c | 2 +- drivers/misc/ocxl/ocxl_internal.h | 6 ----- include/misc/ocxl.h | 44 +++++++++++++++++++++++++++++++ 4 files changed, 52 insertions(+), 9 deletions(-) diff --git a/drivers/misc/ocxl/context.c b/drivers/misc/ocxl/context.c index 3498a0199bde..1534b56f1db1 100644 --- a/drivers/misc/ocxl/context.c +++ b/drivers/misc/ocxl/context.c @@ -8,6 +8,7 @@ struct ocxl_context *ocxl_context_alloc(void) { return kzalloc(sizeof(struct ocxl_context), GFP_KERNEL); } +EXPORT_SYMBOL_GPL(ocxl_context_alloc); int ocxl_context_init(struct ocxl_context *ctx, struct ocxl_afu *afu, struct address_space *mapping) @@ -43,6 +44,7 @@ int ocxl_context_init(struct ocxl_context *ctx, struct ocxl_afu *afu, ocxl_afu_get(afu); return 0; } +EXPORT_SYMBOL_GPL(ocxl_context_init); /* * Callback for when a translation fault triggers an error @@ -63,7 +65,7 @@ static void xsl_fault_error(void *data, u64 addr, u64 dsisr) wake_up_all(&ctx->events_wq); } -int ocxl_context_attach(struct ocxl_context *ctx, u64 amr) +int ocxl_context_attach(struct ocxl_context *ctx, u64 amr, struct mm_struct *mm) { int rc; @@ -75,7 +77,7 @@ int ocxl_context_attach(struct ocxl_context *ctx, u64 amr) } rc = ocxl_link_add_pe(ctx->afu->fn->link, ctx->pasid, - current->mm->context.id, ctx->tidr, amr, current->mm, + mm->context.id, ctx->tidr, amr, mm, xsl_fault_error, ctx); if (rc) goto out; @@ -85,6 +87,7 @@ int ocxl_context_attach(struct ocxl_context *ctx, u64 amr) mutex_unlock(&ctx->status_mutex); return rc; } +EXPORT_SYMBOL_GPL(ocxl_context_attach); static vm_fault_t map_afu_irq(struct vm_area_struct *vma, unsigned long address, u64 offset, struct ocxl_context *ctx) @@ -243,6 +246,7 @@ int ocxl_context_detach(struct ocxl_context *ctx) } return 0; } +EXPORT_SYMBOL_GPL(ocxl_context_detach); void ocxl_context_detach_all(struct ocxl_afu *afu) { @@ -280,3 +284,4 @@ void ocxl_context_free(struct ocxl_context *ctx) ocxl_afu_put(ctx->afu); kfree(ctx); } +EXPORT_SYMBOL_GPL(ocxl_context_free); diff --git a/drivers/misc/ocxl/file.c b/drivers/misc/ocxl/file.c index 16eb8a60d5c7..865b3d176431 100644 --- a/drivers/misc/ocxl/file.c +++ b/drivers/misc/ocxl/file.c @@ -100,7 +100,7 @@ static long afu_ioctl_attach(struct ocxl_context *ctx, return -EINVAL; amr = arg.amr & mfspr(SPRN_UAMOR); - rc = ocxl_context_attach(ctx, amr); + rc = ocxl_context_attach(ctx, amr, current->mm); return rc; } diff --git a/drivers/misc/ocxl/ocxl_internal.h b/drivers/misc/ocxl/ocxl_internal.h index 06fd98c989c8..779d15ef60b5 100644 --- a/drivers/misc/ocxl/ocxl_internal.h +++ b/drivers/misc/ocxl/ocxl_internal.h @@ -130,15 +130,9 @@ int ocxl_config_check_afu_index(struct pci_dev *dev, */ int ocxl_link_update_pe(void *link_handle, int pasid, __u16 tid); -struct ocxl_context *ocxl_context_alloc(void); -int ocxl_context_init(struct ocxl_context *ctx, struct ocxl_afu *afu, - struct address_space *mapping); -int ocxl_context_attach(struct ocxl_context *ctx, u64 amr); int ocxl_context_mmap(struct ocxl_context *ctx, struct vm_area_struct *vma); -int ocxl_context_detach(struct ocxl_context *ctx); void ocxl_context_detach_all(struct ocxl_afu *afu); -void ocxl_context_free(struct ocxl_context *ctx); int ocxl_sysfs_add_afu(struct ocxl_afu *afu); void ocxl_sysfs_remove_afu(struct ocxl_afu *afu); diff --git a/include/misc/ocxl.h b/include/misc/ocxl.h index 3b320c39f0af..ebbfe83cd5a6 100644 --- a/include/misc/ocxl.h +++ b/include/misc/ocxl.h @@ -51,6 +51,7 @@ struct ocxl_fn_config { // These are opaque outside the ocxl driver struct ocxl_afu; +struct ocxl_context; enum ocxl_endian { OCXL_BIG_ENDIAN = 0, /**< AFU data is big-endian */ @@ -58,6 +59,49 @@ enum ocxl_endian { OCXL_HOST_ENDIAN = 2, /**< AFU data is the same endianness as the host */ }; +/** + * Allocate space for a new OpenCAPI context + * + * Returns NULL on failure + */ +struct ocxl_context *ocxl_context_alloc(void); + +/** + * Initialize an OpenCAPI context + * + * @ctx: The OpenCAPI context to initialize + * @afu: The AFU the context belongs to + * @mapping: The mapping to unmap when the context is closed (may be NULL) + */ +int ocxl_context_init(struct ocxl_context *ctx, struct ocxl_afu *afu, + struct address_space *mapping); + +/** + * Free an OpenCAPI context + * + * @ctx: The OpenCAPI context to free + */ +void ocxl_context_free(struct ocxl_context *ctx); + +/** + * Grant access to an MM to an OpenCAPI context + * @ctx: The OpenCAPI context to attach + * @amr: The value of the AMR register to restrict access + * @mm: The mm to attach to the context + * + * Returns 0 on success, negative on failure + */ +int ocxl_context_attach(struct ocxl_context *ctx, u64 amr, + struct mm_struct *mm); + +/** + * Detach an MM from an OpenCAPI context + * @ctx: The OpenCAPI context to attach + * + * Returns 0 on success, negative on failure + */ +int ocxl_context_detach(struct ocxl_context *ctx); + /** * Read a 32 bit value from global MMIO * From patchwork Wed Mar 13 04:15:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 1055889 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44JzJl37cCz9s3l for ; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 13 Mar 2019 04:16:18 -0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2D4GHLd51249344 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 13 Mar 2019 04:16:17 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9691611C058; Wed, 13 Mar 2019 04:16:17 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AFDAB11C050; Wed, 13 Mar 2019 04:16:16 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 13 Mar 2019 04:16:16 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 9309DA01B5; Wed, 13 Mar 2019 15:16:15 +1100 (AEDT) From: "Alastair D'Silva" To: Subject: [PATCH 3/7] ocxl: Split pci.c Date: Wed, 13 Mar 2019 15:15:18 +1100 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190313041524.14644-1-alastair@au1.ibm.com> References: <20190313041524.14644-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19031304-0028-0000-0000-0000035354F7 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19031304-0029-0000-0000-00002411DB2F Message-Id: <20190313041524.14644-4-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903130029 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arnd Bergmann , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Andrew Donnellan , Alastair D'Silva , Frederic Barrat , linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Alastair D'Silva In preparation for making core code available for external drivers, move the core code out of pci.c and into core.c Signed-off-by: Alastair D'Silva Acked-by: Frederic Barrat --- drivers/misc/ocxl/Makefile | 1 + drivers/misc/ocxl/core.c | 517 ++++++++++++++++++++++++++++++ drivers/misc/ocxl/ocxl_internal.h | 5 + drivers/misc/ocxl/pci.c | 517 ------------------------------ 4 files changed, 523 insertions(+), 517 deletions(-) create mode 100644 drivers/misc/ocxl/core.c diff --git a/drivers/misc/ocxl/Makefile b/drivers/misc/ocxl/Makefile index 922e47cd4f0d..d07d1bb8e8d4 100644 --- a/drivers/misc/ocxl/Makefile +++ b/drivers/misc/ocxl/Makefile @@ -3,6 +3,7 @@ ccflags-$(CONFIG_PPC_WERROR) += -Werror ocxl-y += main.o pci.o config.o file.o pasid.o mmio.o ocxl-y += link.o context.o afu_irq.o sysfs.o trace.o +ocxl-y += core.o obj-$(CONFIG_OCXL) += ocxl.o # For tracepoints to include our trace.h from tracepoint infrastructure: diff --git a/drivers/misc/ocxl/core.c b/drivers/misc/ocxl/core.c new file mode 100644 index 000000000000..b47cfda83e46 --- /dev/null +++ b/drivers/misc/ocxl/core.c @@ -0,0 +1,517 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright 2017 IBM Corp. +#include +#include "ocxl_internal.h" + +static struct ocxl_fn *ocxl_fn_get(struct ocxl_fn *fn) +{ + return (get_device(&fn->dev) == NULL) ? NULL : fn; +} + +static void ocxl_fn_put(struct ocxl_fn *fn) +{ + put_device(&fn->dev); +} + +struct ocxl_afu *ocxl_afu_get(struct ocxl_afu *afu) +{ + return (get_device(&afu->dev) == NULL) ? NULL : afu; +} + +void ocxl_afu_put(struct ocxl_afu *afu) +{ + put_device(&afu->dev); +} + +static struct ocxl_afu *alloc_afu(struct ocxl_fn *fn) +{ + struct ocxl_afu *afu; + + afu = kzalloc(sizeof(struct ocxl_afu), GFP_KERNEL); + if (!afu) + return NULL; + + mutex_init(&afu->contexts_lock); + mutex_init(&afu->afu_control_lock); + idr_init(&afu->contexts_idr); + afu->fn = fn; + ocxl_fn_get(fn); + return afu; +} + +static void free_afu(struct ocxl_afu *afu) +{ + idr_destroy(&afu->contexts_idr); + ocxl_fn_put(afu->fn); + kfree(afu); +} + +static void free_afu_dev(struct device *dev) +{ + struct ocxl_afu *afu = to_ocxl_afu(dev); + + ocxl_unregister_afu(afu); + free_afu(afu); +} + +static int set_afu_device(struct ocxl_afu *afu, const char *location) +{ + struct ocxl_fn *fn = afu->fn; + int rc; + + afu->dev.parent = &fn->dev; + afu->dev.release = free_afu_dev; + rc = dev_set_name(&afu->dev, "%s.%s.%hhu", afu->config.name, location, + afu->config.idx); + return rc; +} + +static int assign_afu_actag(struct ocxl_afu *afu, struct pci_dev *dev) +{ + struct ocxl_fn *fn = afu->fn; + int actag_count, actag_offset; + + /* + * if there were not enough actags for the function, each afu + * reduces its count as well + */ + actag_count = afu->config.actag_supported * + fn->actag_enabled / fn->actag_supported; + actag_offset = ocxl_actag_afu_alloc(fn, actag_count); + if (actag_offset < 0) { + dev_err(&afu->dev, "Can't allocate %d actags for AFU: %d\n", + actag_count, actag_offset); + return actag_offset; + } + afu->actag_base = fn->actag_base + actag_offset; + afu->actag_enabled = actag_count; + + ocxl_config_set_afu_actag(dev, afu->config.dvsec_afu_control_pos, + afu->actag_base, afu->actag_enabled); + dev_dbg(&afu->dev, "actag base=%d enabled=%d\n", + afu->actag_base, afu->actag_enabled); + return 0; +} + +static void reclaim_afu_actag(struct ocxl_afu *afu) +{ + struct ocxl_fn *fn = afu->fn; + int start_offset, size; + + start_offset = afu->actag_base - fn->actag_base; + size = afu->actag_enabled; + ocxl_actag_afu_free(afu->fn, start_offset, size); +} + +static int assign_afu_pasid(struct ocxl_afu *afu, struct pci_dev *dev) +{ + struct ocxl_fn *fn = afu->fn; + int pasid_count, pasid_offset; + + /* + * We only support the case where the function configuration + * requested enough PASIDs to cover all AFUs. + */ + pasid_count = 1 << afu->config.pasid_supported_log; + pasid_offset = ocxl_pasid_afu_alloc(fn, pasid_count); + if (pasid_offset < 0) { + dev_err(&afu->dev, "Can't allocate %d PASIDs for AFU: %d\n", + pasid_count, pasid_offset); + return pasid_offset; + } + afu->pasid_base = fn->pasid_base + pasid_offset; + afu->pasid_count = 0; + afu->pasid_max = pasid_count; + + ocxl_config_set_afu_pasid(dev, afu->config.dvsec_afu_control_pos, + afu->pasid_base, + afu->config.pasid_supported_log); + dev_dbg(&afu->dev, "PASID base=%d, enabled=%d\n", + afu->pasid_base, pasid_count); + return 0; +} + +static void reclaim_afu_pasid(struct ocxl_afu *afu) +{ + struct ocxl_fn *fn = afu->fn; + int start_offset, size; + + start_offset = afu->pasid_base - fn->pasid_base; + size = 1 << afu->config.pasid_supported_log; + ocxl_pasid_afu_free(afu->fn, start_offset, size); +} + +static int reserve_fn_bar(struct ocxl_fn *fn, int bar) +{ + struct pci_dev *dev = to_pci_dev(fn->dev.parent); + int rc, idx; + + if (bar != 0 && bar != 2 && bar != 4) + return -EINVAL; + + idx = bar >> 1; + if (fn->bar_used[idx]++ == 0) { + rc = pci_request_region(dev, bar, "ocxl"); + if (rc) + return rc; + } + return 0; +} + +static void release_fn_bar(struct ocxl_fn *fn, int bar) +{ + struct pci_dev *dev = to_pci_dev(fn->dev.parent); + int idx; + + if (bar != 0 && bar != 2 && bar != 4) + return; + + idx = bar >> 1; + if (--fn->bar_used[idx] == 0) + pci_release_region(dev, bar); + WARN_ON(fn->bar_used[idx] < 0); +} + +static int map_mmio_areas(struct ocxl_afu *afu, struct pci_dev *dev) +{ + int rc; + + rc = reserve_fn_bar(afu->fn, afu->config.global_mmio_bar); + if (rc) + return rc; + + rc = reserve_fn_bar(afu->fn, afu->config.pp_mmio_bar); + if (rc) { + release_fn_bar(afu->fn, afu->config.global_mmio_bar); + return rc; + } + + afu->global_mmio_start = + pci_resource_start(dev, afu->config.global_mmio_bar) + + afu->config.global_mmio_offset; + afu->pp_mmio_start = + pci_resource_start(dev, afu->config.pp_mmio_bar) + + afu->config.pp_mmio_offset; + + afu->global_mmio_ptr = ioremap(afu->global_mmio_start, + afu->config.global_mmio_size); + if (!afu->global_mmio_ptr) { + release_fn_bar(afu->fn, afu->config.pp_mmio_bar); + release_fn_bar(afu->fn, afu->config.global_mmio_bar); + dev_err(&dev->dev, "Error mapping global mmio area\n"); + return -ENOMEM; + } + + /* + * Leave an empty page between the per-process mmio area and + * the AFU interrupt mappings + */ + afu->irq_base_offset = afu->config.pp_mmio_stride + PAGE_SIZE; + return 0; +} + +static void unmap_mmio_areas(struct ocxl_afu *afu) +{ + if (afu->global_mmio_ptr) { + iounmap(afu->global_mmio_ptr); + afu->global_mmio_ptr = NULL; + } + afu->global_mmio_start = 0; + afu->pp_mmio_start = 0; + release_fn_bar(afu->fn, afu->config.pp_mmio_bar); + release_fn_bar(afu->fn, afu->config.global_mmio_bar); +} + +static int configure_afu(struct ocxl_afu *afu, u8 afu_idx, struct pci_dev *dev) +{ + int rc; + + rc = ocxl_config_read_afu(dev, &afu->fn->config, &afu->config, afu_idx); + if (rc) + return rc; + + rc = set_afu_device(afu, dev_name(&dev->dev)); + if (rc) + return rc; + + rc = assign_afu_actag(afu, dev); + if (rc) + return rc; + + rc = assign_afu_pasid(afu, dev); + if (rc) { + reclaim_afu_actag(afu); + return rc; + } + + rc = map_mmio_areas(afu, dev); + if (rc) { + reclaim_afu_pasid(afu); + reclaim_afu_actag(afu); + return rc; + } + return 0; +} + +static void deconfigure_afu(struct ocxl_afu *afu) +{ + unmap_mmio_areas(afu); + reclaim_afu_pasid(afu); + reclaim_afu_actag(afu); +} + +static int activate_afu(struct pci_dev *dev, struct ocxl_afu *afu) +{ + int rc; + + ocxl_config_set_afu_state(dev, afu->config.dvsec_afu_control_pos, 1); + /* + * Char device creation is the last step, as processes can + * call our driver immediately, so all our inits must be finished. + */ + rc = ocxl_create_cdev(afu); + if (rc) + return rc; + return 0; +} + +static void deactivate_afu(struct ocxl_afu *afu) +{ + struct pci_dev *dev = to_pci_dev(afu->fn->dev.parent); + + ocxl_destroy_cdev(afu); + ocxl_config_set_afu_state(dev, afu->config.dvsec_afu_control_pos, 0); +} + +int init_afu(struct pci_dev *dev, struct ocxl_fn *fn, u8 afu_idx) +{ + int rc; + struct ocxl_afu *afu; + + afu = alloc_afu(fn); + if (!afu) + return -ENOMEM; + + rc = configure_afu(afu, afu_idx, dev); + if (rc) { + free_afu(afu); + return rc; + } + + rc = ocxl_register_afu(afu); + if (rc) + goto err; + + rc = ocxl_sysfs_add_afu(afu); + if (rc) + goto err; + + rc = activate_afu(dev, afu); + if (rc) + goto err_sys; + + list_add_tail(&afu->list, &fn->afu_list); + return 0; + +err_sys: + ocxl_sysfs_remove_afu(afu); +err: + deconfigure_afu(afu); + device_unregister(&afu->dev); + return rc; +} + +void remove_afu(struct ocxl_afu *afu) +{ + list_del(&afu->list); + ocxl_context_detach_all(afu); + deactivate_afu(afu); + ocxl_sysfs_remove_afu(afu); + deconfigure_afu(afu); + device_unregister(&afu->dev); +} + +static struct ocxl_fn *alloc_function(struct pci_dev *dev) +{ + struct ocxl_fn *fn; + + fn = kzalloc(sizeof(struct ocxl_fn), GFP_KERNEL); + if (!fn) + return NULL; + + INIT_LIST_HEAD(&fn->afu_list); + INIT_LIST_HEAD(&fn->pasid_list); + INIT_LIST_HEAD(&fn->actag_list); + return fn; +} + +static void free_function(struct ocxl_fn *fn) +{ + WARN_ON(!list_empty(&fn->afu_list)); + WARN_ON(!list_empty(&fn->pasid_list)); + kfree(fn); +} + +static void free_function_dev(struct device *dev) +{ + struct ocxl_fn *fn = to_ocxl_function(dev); + + free_function(fn); +} + +static int set_function_device(struct ocxl_fn *fn, struct pci_dev *dev) +{ + int rc; + + fn->dev.parent = &dev->dev; + fn->dev.release = free_function_dev; + rc = dev_set_name(&fn->dev, "ocxlfn.%s", dev_name(&dev->dev)); + if (rc) + return rc; + pci_set_drvdata(dev, fn); + return 0; +} + +static int assign_function_actag(struct ocxl_fn *fn) +{ + struct pci_dev *dev = to_pci_dev(fn->dev.parent); + u16 base, enabled, supported; + int rc; + + rc = ocxl_config_get_actag_info(dev, &base, &enabled, &supported); + if (rc) + return rc; + + fn->actag_base = base; + fn->actag_enabled = enabled; + fn->actag_supported = supported; + + ocxl_config_set_actag(dev, fn->config.dvsec_function_pos, + fn->actag_base, fn->actag_enabled); + dev_dbg(&fn->dev, "actag range starting at %d, enabled %d\n", + fn->actag_base, fn->actag_enabled); + return 0; +} + +static int set_function_pasid(struct ocxl_fn *fn) +{ + struct pci_dev *dev = to_pci_dev(fn->dev.parent); + int rc, desired_count, max_count; + + /* A function may not require any PASID */ + if (fn->config.max_pasid_log < 0) + return 0; + + rc = ocxl_config_get_pasid_info(dev, &max_count); + if (rc) + return rc; + + desired_count = 1 << fn->config.max_pasid_log; + + if (desired_count > max_count) { + dev_err(&fn->dev, + "Function requires more PASIDs than is available (%d vs. %d)\n", + desired_count, max_count); + return -ENOSPC; + } + + fn->pasid_base = 0; + return 0; +} + +static int configure_function(struct ocxl_fn *fn, struct pci_dev *dev) +{ + int rc; + + rc = pci_enable_device(dev); + if (rc) { + dev_err(&dev->dev, "pci_enable_device failed: %d\n", rc); + return rc; + } + + /* + * Once it has been confirmed to work on our hardware, we + * should reset the function, to force the adapter to restart + * from scratch. + * A function reset would also reset all its AFUs. + * + * Some hints for implementation: + * + * - there's not status bit to know when the reset is done. We + * should try reading the config space to know when it's + * done. + * - probably something like: + * Reset + * wait 100ms + * issue config read + * allow device up to 1 sec to return success on config + * read before declaring it broken + * + * Some shared logic on the card (CFG, TLX) won't be reset, so + * there's no guarantee that it will be enough. + */ + rc = ocxl_config_read_function(dev, &fn->config); + if (rc) + return rc; + + rc = set_function_device(fn, dev); + if (rc) + return rc; + + rc = assign_function_actag(fn); + if (rc) + return rc; + + rc = set_function_pasid(fn); + if (rc) + return rc; + + rc = ocxl_link_setup(dev, 0, &fn->link); + if (rc) + return rc; + + rc = ocxl_config_set_TL(dev, fn->config.dvsec_tl_pos); + if (rc) { + ocxl_link_release(dev, fn->link); + return rc; + } + return 0; +} + +static void deconfigure_function(struct ocxl_fn *fn) +{ + struct pci_dev *dev = to_pci_dev(fn->dev.parent); + + ocxl_link_release(dev, fn->link); + pci_disable_device(dev); +} + +struct ocxl_fn *init_function(struct pci_dev *dev) +{ + struct ocxl_fn *fn; + int rc; + + fn = alloc_function(dev); + if (!fn) + return ERR_PTR(-ENOMEM); + + rc = configure_function(fn, dev); + if (rc) { + free_function(fn); + return ERR_PTR(rc); + } + + rc = device_register(&fn->dev); + if (rc) { + deconfigure_function(fn); + put_device(&fn->dev); + return ERR_PTR(rc); + } + return fn; +} + +void remove_function(struct ocxl_fn *fn) +{ + deconfigure_function(fn); + device_unregister(&fn->dev); +} diff --git a/drivers/misc/ocxl/ocxl_internal.h b/drivers/misc/ocxl/ocxl_internal.h index 779d15ef60b5..1319406ce5c6 100644 --- a/drivers/misc/ocxl/ocxl_internal.h +++ b/drivers/misc/ocxl/ocxl_internal.h @@ -144,4 +144,9 @@ int ocxl_afu_irq_set_fd(struct ocxl_context *ctx, u64 irq_offset, int eventfd); u64 ocxl_afu_irq_get_addr(struct ocxl_context *ctx, u64 irq_offset); +struct ocxl_fn *init_function(struct pci_dev *dev); +void remove_function(struct ocxl_fn *fn); +int init_afu(struct pci_dev *dev, struct ocxl_fn *fn, u8 afu_idx); +void remove_afu(struct ocxl_afu *afu); + #endif /* _OCXL_INTERNAL_H_ */ diff --git a/drivers/misc/ocxl/pci.c b/drivers/misc/ocxl/pci.c index 21f425472a82..5926c863716c 100644 --- a/drivers/misc/ocxl/pci.c +++ b/drivers/misc/ocxl/pci.c @@ -1,9 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ // Copyright 2017 IBM Corp. #include -#include -#include -#include #include "ocxl_internal.h" /* @@ -17,520 +14,6 @@ static const struct pci_device_id ocxl_pci_tbl[] = { }; MODULE_DEVICE_TABLE(pci, ocxl_pci_tbl); - -static struct ocxl_fn *ocxl_fn_get(struct ocxl_fn *fn) -{ - return (get_device(&fn->dev) == NULL) ? NULL : fn; -} - -static void ocxl_fn_put(struct ocxl_fn *fn) -{ - put_device(&fn->dev); -} - -struct ocxl_afu *ocxl_afu_get(struct ocxl_afu *afu) -{ - return (get_device(&afu->dev) == NULL) ? NULL : afu; -} - -void ocxl_afu_put(struct ocxl_afu *afu) -{ - put_device(&afu->dev); -} - -static struct ocxl_afu *alloc_afu(struct ocxl_fn *fn) -{ - struct ocxl_afu *afu; - - afu = kzalloc(sizeof(struct ocxl_afu), GFP_KERNEL); - if (!afu) - return NULL; - - mutex_init(&afu->contexts_lock); - mutex_init(&afu->afu_control_lock); - idr_init(&afu->contexts_idr); - afu->fn = fn; - ocxl_fn_get(fn); - return afu; -} - -static void free_afu(struct ocxl_afu *afu) -{ - idr_destroy(&afu->contexts_idr); - ocxl_fn_put(afu->fn); - kfree(afu); -} - -static void free_afu_dev(struct device *dev) -{ - struct ocxl_afu *afu = to_ocxl_afu(dev); - - ocxl_unregister_afu(afu); - free_afu(afu); -} - -static int set_afu_device(struct ocxl_afu *afu, const char *location) -{ - struct ocxl_fn *fn = afu->fn; - int rc; - - afu->dev.parent = &fn->dev; - afu->dev.release = free_afu_dev; - rc = dev_set_name(&afu->dev, "%s.%s.%hhu", afu->config.name, location, - afu->config.idx); - return rc; -} - -static int assign_afu_actag(struct ocxl_afu *afu, struct pci_dev *dev) -{ - struct ocxl_fn *fn = afu->fn; - int actag_count, actag_offset; - - /* - * if there were not enough actags for the function, each afu - * reduces its count as well - */ - actag_count = afu->config.actag_supported * - fn->actag_enabled / fn->actag_supported; - actag_offset = ocxl_actag_afu_alloc(fn, actag_count); - if (actag_offset < 0) { - dev_err(&afu->dev, "Can't allocate %d actags for AFU: %d\n", - actag_count, actag_offset); - return actag_offset; - } - afu->actag_base = fn->actag_base + actag_offset; - afu->actag_enabled = actag_count; - - ocxl_config_set_afu_actag(dev, afu->config.dvsec_afu_control_pos, - afu->actag_base, afu->actag_enabled); - dev_dbg(&afu->dev, "actag base=%d enabled=%d\n", - afu->actag_base, afu->actag_enabled); - return 0; -} - -static void reclaim_afu_actag(struct ocxl_afu *afu) -{ - struct ocxl_fn *fn = afu->fn; - int start_offset, size; - - start_offset = afu->actag_base - fn->actag_base; - size = afu->actag_enabled; - ocxl_actag_afu_free(afu->fn, start_offset, size); -} - -static int assign_afu_pasid(struct ocxl_afu *afu, struct pci_dev *dev) -{ - struct ocxl_fn *fn = afu->fn; - int pasid_count, pasid_offset; - - /* - * We only support the case where the function configuration - * requested enough PASIDs to cover all AFUs. - */ - pasid_count = 1 << afu->config.pasid_supported_log; - pasid_offset = ocxl_pasid_afu_alloc(fn, pasid_count); - if (pasid_offset < 0) { - dev_err(&afu->dev, "Can't allocate %d PASIDs for AFU: %d\n", - pasid_count, pasid_offset); - return pasid_offset; - } - afu->pasid_base = fn->pasid_base + pasid_offset; - afu->pasid_count = 0; - afu->pasid_max = pasid_count; - - ocxl_config_set_afu_pasid(dev, afu->config.dvsec_afu_control_pos, - afu->pasid_base, - afu->config.pasid_supported_log); - dev_dbg(&afu->dev, "PASID base=%d, enabled=%d\n", - afu->pasid_base, pasid_count); - return 0; -} - -static void reclaim_afu_pasid(struct ocxl_afu *afu) -{ - struct ocxl_fn *fn = afu->fn; - int start_offset, size; - - start_offset = afu->pasid_base - fn->pasid_base; - size = 1 << afu->config.pasid_supported_log; - ocxl_pasid_afu_free(afu->fn, start_offset, size); -} - -static int reserve_fn_bar(struct ocxl_fn *fn, int bar) -{ - struct pci_dev *dev = to_pci_dev(fn->dev.parent); - int rc, idx; - - if (bar != 0 && bar != 2 && bar != 4) - return -EINVAL; - - idx = bar >> 1; - if (fn->bar_used[idx]++ == 0) { - rc = pci_request_region(dev, bar, "ocxl"); - if (rc) - return rc; - } - return 0; -} - -static void release_fn_bar(struct ocxl_fn *fn, int bar) -{ - struct pci_dev *dev = to_pci_dev(fn->dev.parent); - int idx; - - if (bar != 0 && bar != 2 && bar != 4) - return; - - idx = bar >> 1; - if (--fn->bar_used[idx] == 0) - pci_release_region(dev, bar); - WARN_ON(fn->bar_used[idx] < 0); -} - -static int map_mmio_areas(struct ocxl_afu *afu, struct pci_dev *dev) -{ - int rc; - - rc = reserve_fn_bar(afu->fn, afu->config.global_mmio_bar); - if (rc) - return rc; - - rc = reserve_fn_bar(afu->fn, afu->config.pp_mmio_bar); - if (rc) { - release_fn_bar(afu->fn, afu->config.global_mmio_bar); - return rc; - } - - afu->global_mmio_start = - pci_resource_start(dev, afu->config.global_mmio_bar) + - afu->config.global_mmio_offset; - afu->pp_mmio_start = - pci_resource_start(dev, afu->config.pp_mmio_bar) + - afu->config.pp_mmio_offset; - - afu->global_mmio_ptr = ioremap(afu->global_mmio_start, - afu->config.global_mmio_size); - if (!afu->global_mmio_ptr) { - release_fn_bar(afu->fn, afu->config.pp_mmio_bar); - release_fn_bar(afu->fn, afu->config.global_mmio_bar); - dev_err(&dev->dev, "Error mapping global mmio area\n"); - return -ENOMEM; - } - - /* - * Leave an empty page between the per-process mmio area and - * the AFU interrupt mappings - */ - afu->irq_base_offset = afu->config.pp_mmio_stride + PAGE_SIZE; - return 0; -} - -static void unmap_mmio_areas(struct ocxl_afu *afu) -{ - if (afu->global_mmio_ptr) { - iounmap(afu->global_mmio_ptr); - afu->global_mmio_ptr = NULL; - } - afu->global_mmio_start = 0; - afu->pp_mmio_start = 0; - release_fn_bar(afu->fn, afu->config.pp_mmio_bar); - release_fn_bar(afu->fn, afu->config.global_mmio_bar); -} - -static int configure_afu(struct ocxl_afu *afu, u8 afu_idx, struct pci_dev *dev) -{ - int rc; - - rc = ocxl_config_read_afu(dev, &afu->fn->config, &afu->config, afu_idx); - if (rc) - return rc; - - rc = set_afu_device(afu, dev_name(&dev->dev)); - if (rc) - return rc; - - rc = assign_afu_actag(afu, dev); - if (rc) - return rc; - - rc = assign_afu_pasid(afu, dev); - if (rc) { - reclaim_afu_actag(afu); - return rc; - } - - rc = map_mmio_areas(afu, dev); - if (rc) { - reclaim_afu_pasid(afu); - reclaim_afu_actag(afu); - return rc; - } - return 0; -} - -static void deconfigure_afu(struct ocxl_afu *afu) -{ - unmap_mmio_areas(afu); - reclaim_afu_pasid(afu); - reclaim_afu_actag(afu); -} - -static int activate_afu(struct pci_dev *dev, struct ocxl_afu *afu) -{ - int rc; - - ocxl_config_set_afu_state(dev, afu->config.dvsec_afu_control_pos, 1); - /* - * Char device creation is the last step, as processes can - * call our driver immediately, so all our inits must be finished. - */ - rc = ocxl_create_cdev(afu); - if (rc) - return rc; - return 0; -} - -static void deactivate_afu(struct ocxl_afu *afu) -{ - struct pci_dev *dev = to_pci_dev(afu->fn->dev.parent); - - ocxl_destroy_cdev(afu); - ocxl_config_set_afu_state(dev, afu->config.dvsec_afu_control_pos, 0); -} - -static int init_afu(struct pci_dev *dev, struct ocxl_fn *fn, u8 afu_idx) -{ - int rc; - struct ocxl_afu *afu; - - afu = alloc_afu(fn); - if (!afu) - return -ENOMEM; - - rc = configure_afu(afu, afu_idx, dev); - if (rc) { - free_afu(afu); - return rc; - } - - rc = ocxl_register_afu(afu); - if (rc) - goto err; - - rc = ocxl_sysfs_add_afu(afu); - if (rc) - goto err; - - rc = activate_afu(dev, afu); - if (rc) - goto err_sys; - - list_add_tail(&afu->list, &fn->afu_list); - return 0; - -err_sys: - ocxl_sysfs_remove_afu(afu); -err: - deconfigure_afu(afu); - device_unregister(&afu->dev); - return rc; -} - -static void remove_afu(struct ocxl_afu *afu) -{ - list_del(&afu->list); - ocxl_context_detach_all(afu); - deactivate_afu(afu); - ocxl_sysfs_remove_afu(afu); - deconfigure_afu(afu); - device_unregister(&afu->dev); -} - -static struct ocxl_fn *alloc_function(struct pci_dev *dev) -{ - struct ocxl_fn *fn; - - fn = kzalloc(sizeof(struct ocxl_fn), GFP_KERNEL); - if (!fn) - return NULL; - - INIT_LIST_HEAD(&fn->afu_list); - INIT_LIST_HEAD(&fn->pasid_list); - INIT_LIST_HEAD(&fn->actag_list); - return fn; -} - -static void free_function(struct ocxl_fn *fn) -{ - WARN_ON(!list_empty(&fn->afu_list)); - WARN_ON(!list_empty(&fn->pasid_list)); - kfree(fn); -} - -static void free_function_dev(struct device *dev) -{ - struct ocxl_fn *fn = to_ocxl_function(dev); - - free_function(fn); -} - -static int set_function_device(struct ocxl_fn *fn, struct pci_dev *dev) -{ - int rc; - - fn->dev.parent = &dev->dev; - fn->dev.release = free_function_dev; - rc = dev_set_name(&fn->dev, "ocxlfn.%s", dev_name(&dev->dev)); - if (rc) - return rc; - pci_set_drvdata(dev, fn); - return 0; -} - -static int assign_function_actag(struct ocxl_fn *fn) -{ - struct pci_dev *dev = to_pci_dev(fn->dev.parent); - u16 base, enabled, supported; - int rc; - - rc = ocxl_config_get_actag_info(dev, &base, &enabled, &supported); - if (rc) - return rc; - - fn->actag_base = base; - fn->actag_enabled = enabled; - fn->actag_supported = supported; - - ocxl_config_set_actag(dev, fn->config.dvsec_function_pos, - fn->actag_base, fn->actag_enabled); - dev_dbg(&fn->dev, "actag range starting at %d, enabled %d\n", - fn->actag_base, fn->actag_enabled); - return 0; -} - -static int set_function_pasid(struct ocxl_fn *fn) -{ - struct pci_dev *dev = to_pci_dev(fn->dev.parent); - int rc, desired_count, max_count; - - /* A function may not require any PASID */ - if (fn->config.max_pasid_log < 0) - return 0; - - rc = ocxl_config_get_pasid_info(dev, &max_count); - if (rc) - return rc; - - desired_count = 1 << fn->config.max_pasid_log; - - if (desired_count > max_count) { - dev_err(&fn->dev, - "Function requires more PASIDs than is available (%d vs. %d)\n", - desired_count, max_count); - return -ENOSPC; - } - - fn->pasid_base = 0; - return 0; -} - -static int configure_function(struct ocxl_fn *fn, struct pci_dev *dev) -{ - int rc; - - rc = pci_enable_device(dev); - if (rc) { - dev_err(&dev->dev, "pci_enable_device failed: %d\n", rc); - return rc; - } - - /* - * Once it has been confirmed to work on our hardware, we - * should reset the function, to force the adapter to restart - * from scratch. - * A function reset would also reset all its AFUs. - * - * Some hints for implementation: - * - * - there's not status bit to know when the reset is done. We - * should try reading the config space to know when it's - * done. - * - probably something like: - * Reset - * wait 100ms - * issue config read - * allow device up to 1 sec to return success on config - * read before declaring it broken - * - * Some shared logic on the card (CFG, TLX) won't be reset, so - * there's no guarantee that it will be enough. - */ - rc = ocxl_config_read_function(dev, &fn->config); - if (rc) - return rc; - - rc = set_function_device(fn, dev); - if (rc) - return rc; - - rc = assign_function_actag(fn); - if (rc) - return rc; - - rc = set_function_pasid(fn); - if (rc) - return rc; - - rc = ocxl_link_setup(dev, 0, &fn->link); - if (rc) - return rc; - - rc = ocxl_config_set_TL(dev, fn->config.dvsec_tl_pos); - if (rc) { - ocxl_link_release(dev, fn->link); - return rc; - } - return 0; -} - -static void deconfigure_function(struct ocxl_fn *fn) -{ - struct pci_dev *dev = to_pci_dev(fn->dev.parent); - - ocxl_link_release(dev, fn->link); - pci_disable_device(dev); -} - -static struct ocxl_fn *init_function(struct pci_dev *dev) -{ - struct ocxl_fn *fn; - int rc; - - fn = alloc_function(dev); - if (!fn) - return ERR_PTR(-ENOMEM); - - rc = configure_function(fn, dev); - if (rc) { - free_function(fn); - return ERR_PTR(rc); - } - - rc = device_register(&fn->dev); - if (rc) { - deconfigure_function(fn); - put_device(&fn->dev); - return ERR_PTR(rc); - } - return fn; -} - -static void remove_function(struct ocxl_fn *fn) -{ - deconfigure_function(fn); - device_unregister(&fn->dev); -} - static int ocxl_probe(struct pci_dev *dev, const struct pci_device_id *id) { int rc, afu_count = 0; From patchwork Wed Mar 13 04:15:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 1055890 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44JzLh00cpz9s3l for ; Wed, 13 Mar 2019 15:26:36 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 44JzLg65BQzDqL7 for ; Wed, 13 Mar 2019 15:26:35 +1100 (AEDT) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=au1.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 44Jz6y3tTQzDqJc for ; Wed, 13 Mar 2019 15:16:26 +1100 (AEDT) Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x2D4DeYX004180 for ; Wed, 13 Mar 2019 00:16:24 -0400 Received: from e06smtp07.uk.ibm.com (e06smtp07.uk.ibm.com [195.75.94.103]) by mx0a-001b2d01.pphosted.com with ESMTP id 2r6q6aqyrh-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 13 Mar 2019 00:16:24 -0400 Received: from localhost by e06smtp07.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Wed, 13 Mar 2019 15:16:17 +1100 (AEDT) From: "Alastair D'Silva" To: Subject: [PATCH 4/7] ocxl: Don't pass pci_dev around Date: Wed, 13 Mar 2019 15:15:19 +1100 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190313041524.14644-1-alastair@au1.ibm.com> References: <20190313041524.14644-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19031304-0028-0000-0000-0000035354F8 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19031304-0029-0000-0000-00002411DB31 Message-Id: <20190313041524.14644-5-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903130029 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arnd Bergmann , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Andrew Donnellan , Alastair D'Silva , Frederic Barrat , linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Alastair D'Silva This data is already available in a struct Signed-off-by: Alastair D'Silva Acked-by: Frederic Barrat Acked-by: Andrew Donnellan --- drivers/misc/ocxl/core.c | 38 +++++++++++++++++++++----------------- 1 file changed, 21 insertions(+), 17 deletions(-) diff --git a/drivers/misc/ocxl/core.c b/drivers/misc/ocxl/core.c index b47cfda83e46..2fd0c700e8a0 100644 --- a/drivers/misc/ocxl/core.c +++ b/drivers/misc/ocxl/core.c @@ -66,10 +66,11 @@ static int set_afu_device(struct ocxl_afu *afu, const char *location) return rc; } -static int assign_afu_actag(struct ocxl_afu *afu, struct pci_dev *dev) +static int assign_afu_actag(struct ocxl_afu *afu) { struct ocxl_fn *fn = afu->fn; int actag_count, actag_offset; + struct pci_dev *pci_dev = to_pci_dev(fn->dev.parent); /* * if there were not enough actags for the function, each afu @@ -79,16 +80,16 @@ static int assign_afu_actag(struct ocxl_afu *afu, struct pci_dev *dev) fn->actag_enabled / fn->actag_supported; actag_offset = ocxl_actag_afu_alloc(fn, actag_count); if (actag_offset < 0) { - dev_err(&afu->dev, "Can't allocate %d actags for AFU: %d\n", + dev_err(&pci_dev->dev, "Can't allocate %d actags for AFU: %d\n", actag_count, actag_offset); return actag_offset; } afu->actag_base = fn->actag_base + actag_offset; afu->actag_enabled = actag_count; - ocxl_config_set_afu_actag(dev, afu->config.dvsec_afu_control_pos, + ocxl_config_set_afu_actag(pci_dev, afu->config.dvsec_afu_control_pos, afu->actag_base, afu->actag_enabled); - dev_dbg(&afu->dev, "actag base=%d enabled=%d\n", + dev_dbg(&pci_dev->dev, "actag base=%d enabled=%d\n", afu->actag_base, afu->actag_enabled); return 0; } @@ -103,10 +104,11 @@ static void reclaim_afu_actag(struct ocxl_afu *afu) ocxl_actag_afu_free(afu->fn, start_offset, size); } -static int assign_afu_pasid(struct ocxl_afu *afu, struct pci_dev *dev) +static int assign_afu_pasid(struct ocxl_afu *afu) { struct ocxl_fn *fn = afu->fn; int pasid_count, pasid_offset; + struct pci_dev *pci_dev = to_pci_dev(fn->dev.parent); /* * We only support the case where the function configuration @@ -115,7 +117,7 @@ static int assign_afu_pasid(struct ocxl_afu *afu, struct pci_dev *dev) pasid_count = 1 << afu->config.pasid_supported_log; pasid_offset = ocxl_pasid_afu_alloc(fn, pasid_count); if (pasid_offset < 0) { - dev_err(&afu->dev, "Can't allocate %d PASIDs for AFU: %d\n", + dev_err(&pci_dev->dev, "Can't allocate %d PASIDs for AFU: %d\n", pasid_count, pasid_offset); return pasid_offset; } @@ -123,10 +125,10 @@ static int assign_afu_pasid(struct ocxl_afu *afu, struct pci_dev *dev) afu->pasid_count = 0; afu->pasid_max = pasid_count; - ocxl_config_set_afu_pasid(dev, afu->config.dvsec_afu_control_pos, + ocxl_config_set_afu_pasid(pci_dev, afu->config.dvsec_afu_control_pos, afu->pasid_base, afu->config.pasid_supported_log); - dev_dbg(&afu->dev, "PASID base=%d, enabled=%d\n", + dev_dbg(&pci_dev->dev, "PASID base=%d, enabled=%d\n", afu->pasid_base, pasid_count); return 0; } @@ -172,9 +174,10 @@ static void release_fn_bar(struct ocxl_fn *fn, int bar) WARN_ON(fn->bar_used[idx] < 0); } -static int map_mmio_areas(struct ocxl_afu *afu, struct pci_dev *dev) +static int map_mmio_areas(struct ocxl_afu *afu) { int rc; + struct pci_dev *pci_dev = to_pci_dev(afu->fn->dev.parent); rc = reserve_fn_bar(afu->fn, afu->config.global_mmio_bar); if (rc) @@ -187,10 +190,10 @@ static int map_mmio_areas(struct ocxl_afu *afu, struct pci_dev *dev) } afu->global_mmio_start = - pci_resource_start(dev, afu->config.global_mmio_bar) + + pci_resource_start(pci_dev, afu->config.global_mmio_bar) + afu->config.global_mmio_offset; afu->pp_mmio_start = - pci_resource_start(dev, afu->config.pp_mmio_bar) + + pci_resource_start(pci_dev, afu->config.pp_mmio_bar) + afu->config.pp_mmio_offset; afu->global_mmio_ptr = ioremap(afu->global_mmio_start, @@ -198,7 +201,7 @@ static int map_mmio_areas(struct ocxl_afu *afu, struct pci_dev *dev) if (!afu->global_mmio_ptr) { release_fn_bar(afu->fn, afu->config.pp_mmio_bar); release_fn_bar(afu->fn, afu->config.global_mmio_bar); - dev_err(&dev->dev, "Error mapping global mmio area\n"); + dev_err(&pci_dev->dev, "Error mapping global mmio area\n"); return -ENOMEM; } @@ -234,17 +237,17 @@ static int configure_afu(struct ocxl_afu *afu, u8 afu_idx, struct pci_dev *dev) if (rc) return rc; - rc = assign_afu_actag(afu, dev); + rc = assign_afu_actag(afu); if (rc) return rc; - rc = assign_afu_pasid(afu, dev); + rc = assign_afu_pasid(afu); if (rc) { reclaim_afu_actag(afu); return rc; } - rc = map_mmio_areas(afu, dev); + rc = map_mmio_areas(afu); if (rc) { reclaim_afu_pasid(afu); reclaim_afu_actag(afu); @@ -331,7 +334,7 @@ void remove_afu(struct ocxl_afu *afu) device_unregister(&afu->dev); } -static struct ocxl_fn *alloc_function(struct pci_dev *dev) +static struct ocxl_fn *alloc_function(void) { struct ocxl_fn *fn; @@ -342,6 +345,7 @@ static struct ocxl_fn *alloc_function(struct pci_dev *dev) INIT_LIST_HEAD(&fn->afu_list); INIT_LIST_HEAD(&fn->pasid_list); INIT_LIST_HEAD(&fn->actag_list); + return fn; } @@ -491,7 +495,7 @@ struct ocxl_fn *init_function(struct pci_dev *dev) struct ocxl_fn *fn; int rc; - fn = alloc_function(dev); + fn = alloc_function(); if (!fn) return ERR_PTR(-ENOMEM); From patchwork Wed Mar 13 04:15:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 1055891 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44JzPP3ZZ3z9s3l for ; Wed, 13 Mar 2019 15:28:57 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 44JzPP2WPdzDqL2 for ; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 13 Mar 2019 04:16:22 -0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2D4GLRi30933138 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 13 Mar 2019 04:16:21 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 067C7A4040; Wed, 13 Mar 2019 04:16:21 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1EB92A4051; Wed, 13 Mar 2019 04:16:20 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 13 Mar 2019 04:16:20 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 0466AA01B5; Wed, 13 Mar 2019 15:16:19 +1100 (AEDT) From: "Alastair D'Silva" To: Subject: [PATCH 5/7] ocxl: Create a clear delineation between ocxl backend & frontend Date: Wed, 13 Mar 2019 15:15:20 +1100 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190313041524.14644-1-alastair@au1.ibm.com> References: <20190313041524.14644-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19031304-0008-0000-0000-000002CBEF1B X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19031304-0009-0000-0000-00002238116F Message-Id: <20190313041524.14644-6-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903130029 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arnd Bergmann , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Andrew Donnellan , Alastair D'Silva , Frederic Barrat , linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Alastair D'Silva The OCXL driver contains both frontend code for interacting with userspace, as well as backend code for interacting with the hardware. This patch separates the backend code from the frontend so that it can be used by other device drivers that communicate via OpenCAPI. Relocate dev, cdev & sysfs files to the frontend code to allow external drivers to maintain their own devices. Reference counting on the device in the backend is replaced with kref counting. Move file & sysfs layer initialisation from core.c (backend) to pci.c (frontend). Create an ocxl_function oriented interface for initing devices & enumerating AFUs. Signed-off-by: Alastair D'Silva --- drivers/misc/ocxl/context.c | 2 +- drivers/misc/ocxl/core.c | 205 +++++++++++++++++++----------- drivers/misc/ocxl/file.c | 122 +++++++++++------- drivers/misc/ocxl/ocxl_internal.h | 39 +++--- drivers/misc/ocxl/pci.c | 61 ++++----- drivers/misc/ocxl/sysfs.c | 58 +++++---- include/misc/ocxl.h | 121 ++++++++++++++++-- 7 files changed, 411 insertions(+), 197 deletions(-) diff --git a/drivers/misc/ocxl/context.c b/drivers/misc/ocxl/context.c index 1534b56f1db1..9a37e9632cd9 100644 --- a/drivers/misc/ocxl/context.c +++ b/drivers/misc/ocxl/context.c @@ -241,7 +241,7 @@ int ocxl_context_detach(struct ocxl_context *ctx) } rc = ocxl_link_remove_pe(ctx->afu->fn->link, ctx->pasid); if (rc) { - dev_warn(&ctx->afu->dev, + dev_warn(&dev->dev, "Couldn't remove PE entry cleanly: %d\n", rc); } return 0; diff --git a/drivers/misc/ocxl/core.c b/drivers/misc/ocxl/core.c index 2fd0c700e8a0..c632ec372342 100644 --- a/drivers/misc/ocxl/core.c +++ b/drivers/misc/ocxl/core.c @@ -13,16 +13,6 @@ static void ocxl_fn_put(struct ocxl_fn *fn) put_device(&fn->dev); } -struct ocxl_afu *ocxl_afu_get(struct ocxl_afu *afu) -{ - return (get_device(&afu->dev) == NULL) ? NULL : afu; -} - -void ocxl_afu_put(struct ocxl_afu *afu) -{ - put_device(&afu->dev); -} - static struct ocxl_afu *alloc_afu(struct ocxl_fn *fn) { struct ocxl_afu *afu; @@ -31,6 +21,7 @@ static struct ocxl_afu *alloc_afu(struct ocxl_fn *fn) if (!afu) return NULL; + kref_init(&afu->kref); mutex_init(&afu->contexts_lock); mutex_init(&afu->afu_control_lock); idr_init(&afu->contexts_idr); @@ -39,32 +30,26 @@ static struct ocxl_afu *alloc_afu(struct ocxl_fn *fn) return afu; } -static void free_afu(struct ocxl_afu *afu) +static void afu_release(struct kref *kref) { + struct ocxl_afu *afu = container_of(kref, struct ocxl_afu, kref); + idr_destroy(&afu->contexts_idr); ocxl_fn_put(afu->fn); kfree(afu); } -static void free_afu_dev(struct device *dev) +void ocxl_afu_get(struct ocxl_afu *afu) { - struct ocxl_afu *afu = to_ocxl_afu(dev); - - ocxl_unregister_afu(afu); - free_afu(afu); + kref_get(&afu->kref); } +EXPORT_SYMBOL_GPL(ocxl_afu_get); -static int set_afu_device(struct ocxl_afu *afu, const char *location) +void ocxl_afu_put(struct ocxl_afu *afu) { - struct ocxl_fn *fn = afu->fn; - int rc; - - afu->dev.parent = &fn->dev; - afu->dev.release = free_afu_dev; - rc = dev_set_name(&afu->dev, "%s.%s.%hhu", afu->config.name, location, - afu->config.idx); - return rc; + kref_put(&afu->kref, afu_release); } +EXPORT_SYMBOL_GPL(ocxl_afu_put); static int assign_afu_actag(struct ocxl_afu *afu) { @@ -233,27 +218,25 @@ static int configure_afu(struct ocxl_afu *afu, u8 afu_idx, struct pci_dev *dev) if (rc) return rc; - rc = set_afu_device(afu, dev_name(&dev->dev)); - if (rc) - return rc; - rc = assign_afu_actag(afu); if (rc) return rc; rc = assign_afu_pasid(afu); - if (rc) { - reclaim_afu_actag(afu); - return rc; - } + if (rc) + goto err_free_actag; rc = map_mmio_areas(afu); - if (rc) { - reclaim_afu_pasid(afu); - reclaim_afu_actag(afu); - return rc; - } + if (rc) + goto err_free_pasid; + return 0; + +err_free_pasid: + reclaim_afu_pasid(afu); +err_free_actag: + reclaim_afu_actag(afu); + return rc; } static void deconfigure_afu(struct ocxl_afu *afu) @@ -265,16 +248,8 @@ static void deconfigure_afu(struct ocxl_afu *afu) static int activate_afu(struct pci_dev *dev, struct ocxl_afu *afu) { - int rc; - ocxl_config_set_afu_state(dev, afu->config.dvsec_afu_control_pos, 1); - /* - * Char device creation is the last step, as processes can - * call our driver immediately, so all our inits must be finished. - */ - rc = ocxl_create_cdev(afu); - if (rc) - return rc; + return 0; } @@ -282,11 +257,10 @@ static void deactivate_afu(struct ocxl_afu *afu) { struct pci_dev *dev = to_pci_dev(afu->fn->dev.parent); - ocxl_destroy_cdev(afu); ocxl_config_set_afu_state(dev, afu->config.dvsec_afu_control_pos, 0); } -int init_afu(struct pci_dev *dev, struct ocxl_fn *fn, u8 afu_idx) +static int init_afu(struct pci_dev *dev, struct ocxl_fn *fn, u8 afu_idx) { int rc; struct ocxl_afu *afu; @@ -297,41 +271,29 @@ int init_afu(struct pci_dev *dev, struct ocxl_fn *fn, u8 afu_idx) rc = configure_afu(afu, afu_idx, dev); if (rc) { - free_afu(afu); + ocxl_afu_put(afu); return rc; } - rc = ocxl_register_afu(afu); - if (rc) - goto err; - - rc = ocxl_sysfs_add_afu(afu); - if (rc) - goto err; - rc = activate_afu(dev, afu); - if (rc) - goto err_sys; + if (rc) { + deconfigure_afu(afu); + ocxl_afu_put(afu); + return rc; + } list_add_tail(&afu->list, &fn->afu_list); - return 0; -err_sys: - ocxl_sysfs_remove_afu(afu); -err: - deconfigure_afu(afu); - device_unregister(&afu->dev); - return rc; + return 0; } -void remove_afu(struct ocxl_afu *afu) +static void remove_afu(struct ocxl_afu *afu) { list_del(&afu->list); ocxl_context_detach_all(afu); deactivate_afu(afu); - ocxl_sysfs_remove_afu(afu); deconfigure_afu(afu); - device_unregister(&afu->dev); + ocxl_afu_put(afu); // matches the implicit get in alloc_afu } static struct ocxl_fn *alloc_function(void) @@ -358,7 +320,7 @@ static void free_function(struct ocxl_fn *fn) static void free_function_dev(struct device *dev) { - struct ocxl_fn *fn = to_ocxl_function(dev); + struct ocxl_fn *fn = container_of(dev, struct ocxl_fn, dev); free_function(fn); } @@ -372,7 +334,6 @@ static int set_function_device(struct ocxl_fn *fn, struct pci_dev *dev) rc = dev_set_name(&fn->dev, "ocxlfn.%s", dev_name(&dev->dev)); if (rc) return rc; - pci_set_drvdata(dev, fn); return 0; } @@ -490,7 +451,7 @@ static void deconfigure_function(struct ocxl_fn *fn) pci_disable_device(dev); } -struct ocxl_fn *init_function(struct pci_dev *dev) +static struct ocxl_fn *init_function(struct pci_dev *dev) { struct ocxl_fn *fn; int rc; @@ -514,8 +475,104 @@ struct ocxl_fn *init_function(struct pci_dev *dev) return fn; } -void remove_function(struct ocxl_fn *fn) +// Device detection & initialisation + +struct ocxl_fn *ocxl_function_open(struct pci_dev *dev) +{ + int rc, afu_count = 0; + u8 afu; + struct ocxl_fn *fn; + + if (!radix_enabled()) { + dev_err(&dev->dev, "Unsupported memory model (hash)\n"); + return ERR_PTR(-ENODEV); + } + + fn = init_function(dev); + if (IS_ERR(fn)) { + dev_err(&dev->dev, "function init failed: %li\n", + PTR_ERR(fn)); + return fn; + } + + for (afu = 0; afu <= fn->config.max_afu_index; afu++) { + rc = ocxl_config_check_afu_index(dev, &fn->config, afu); + if (rc > 0) { + rc = init_afu(dev, fn, afu); + if (rc) { + dev_err(&dev->dev, + "Can't initialize AFU index %d\n", afu); + continue; + } + afu_count++; + } + } + dev_info(&dev->dev, "%d AFU(s) configured\n", afu_count); + return fn; +} +EXPORT_SYMBOL_GPL(ocxl_function_open); + +struct list_head *ocxl_function_afu_list(struct ocxl_fn *fn) +{ + return &fn->afu_list; +} +EXPORT_SYMBOL_GPL(ocxl_function_afu_list); + +struct ocxl_afu *ocxl_function_fetch_afu(struct ocxl_fn *fn, u8 afu_idx) +{ + struct ocxl_afu *afu; + + list_for_each_entry(afu, &fn->afu_list, list) { + if (afu->config.idx == afu_idx) + return afu; + } + + return NULL; +} +EXPORT_SYMBOL_GPL(ocxl_function_fetch_afu); + +const struct ocxl_fn_config *ocxl_function_config(struct ocxl_fn *fn) { + return &fn->config; +} +EXPORT_SYMBOL_GPL(ocxl_function_config); + +void ocxl_function_close(struct ocxl_fn *fn) +{ + struct ocxl_afu *afu, *tmp; + + list_for_each_entry_safe(afu, tmp, &fn->afu_list, list) { + if (afu->private && afu->private_release) + afu->private_release(afu->private); + remove_afu(afu); + } + deconfigure_function(fn); device_unregister(&fn->dev); } +EXPORT_SYMBOL_GPL(ocxl_function_close); + +// AFU Metadata + +struct ocxl_afu_config *ocxl_afu_config(struct ocxl_afu *afu) +{ + return &afu->config; +} +EXPORT_SYMBOL_GPL(ocxl_afu_config); + +void ocxl_afu_set_private(struct ocxl_afu *afu, void *private, + void (*private_release)(void *private)) +{ + afu->private = private; + afu->private_release = private_release; +} +EXPORT_SYMBOL_GPL(ocxl_afu_set_private); + +void *ocxl_afu_get_private(struct ocxl_afu *afu) +{ + if (afu) + return afu->private; + + return NULL; +} +EXPORT_SYMBOL_GPL(ocxl_afu_get_private); diff --git a/drivers/misc/ocxl/file.c b/drivers/misc/ocxl/file.c index 865b3d176431..424bb0b40afb 100644 --- a/drivers/misc/ocxl/file.c +++ b/drivers/misc/ocxl/file.c @@ -17,12 +17,10 @@ static struct class *ocxl_class; static struct mutex minors_idr_lock; static struct idr minors_idr; -static struct ocxl_afu *find_and_get_afu(dev_t devno) +static struct ocxl_file_info *find_file_info(dev_t devno) { - struct ocxl_afu *afu; - int afu_minor; + struct ocxl_file_info *info; - afu_minor = MINOR(devno); /* * We don't declare an RCU critical section here, as our AFU * is protected by a reference counter on the device. By the time the @@ -30,56 +28,52 @@ static struct ocxl_afu *find_and_get_afu(dev_t devno) * the device is already at 0, so no user API will access that AFU and * this function can't return it. */ - afu = idr_find(&minors_idr, afu_minor); - if (afu) - ocxl_afu_get(afu); - return afu; + info = idr_find(&minors_idr, MINOR(devno)); + return info; } -static int allocate_afu_minor(struct ocxl_afu *afu) +static int allocate_minor(struct ocxl_file_info *info) { int minor; mutex_lock(&minors_idr_lock); - minor = idr_alloc(&minors_idr, afu, 0, OCXL_NUM_MINORS, GFP_KERNEL); + minor = idr_alloc(&minors_idr, info, 0, OCXL_NUM_MINORS, GFP_KERNEL); mutex_unlock(&minors_idr_lock); return minor; } -static void free_afu_minor(struct ocxl_afu *afu) +static void free_minor(struct ocxl_file_info *info) { mutex_lock(&minors_idr_lock); - idr_remove(&minors_idr, MINOR(afu->dev.devt)); + idr_remove(&minors_idr, MINOR(info->dev.devt)); mutex_unlock(&minors_idr_lock); } static int afu_open(struct inode *inode, struct file *file) { - struct ocxl_afu *afu; + struct ocxl_file_info *info; struct ocxl_context *ctx; int rc; pr_debug("%s for device %x\n", __func__, inode->i_rdev); - afu = find_and_get_afu(inode->i_rdev); - if (!afu) + info = find_file_info(inode->i_rdev); + if (!info) return -ENODEV; ctx = ocxl_context_alloc(); if (!ctx) { rc = -ENOMEM; - goto put_afu; + goto err; } - rc = ocxl_context_init(ctx, afu, inode->i_mapping); + rc = ocxl_context_init(ctx, info->afu, inode->i_mapping); if (rc) - goto put_afu; + goto err; file->private_data = ctx; - ocxl_afu_put(afu); return 0; -put_afu: - ocxl_afu_put(afu); +err: return rc; } @@ -205,11 +199,16 @@ static long afu_ioctl(struct file *file, unsigned int cmd, struct ocxl_ioctl_irq_fd irq_fd; u64 irq_offset; long rc; + bool closed; pr_debug("%s for context %d, command %s\n", __func__, ctx->pasid, CMD_STR(cmd)); - if (ctx->status == CLOSED) + mutex_lock(&ctx->status_mutex); + closed = (ctx->status == CLOSED); + mutex_unlock(&ctx->status_mutex); + + if (closed) return -EIO; switch (cmd) { @@ -469,39 +468,76 @@ static const struct file_operations ocxl_afu_fops = { .release = afu_release, }; -int ocxl_create_cdev(struct ocxl_afu *afu) +// Called when there are no more consumers of the AFU +static void ocxl_file_release(void *private) { - int rc; + struct ocxl_file_info *info = private; - cdev_init(&afu->cdev, &ocxl_afu_fops); - rc = cdev_add(&afu->cdev, afu->dev.devt, 1); - if (rc) { - dev_err(&afu->dev, "Unable to add afu char device: %d\n", rc); - return rc; - } - return 0; -} + ocxl_sysfs_unregister_afu(info->afu); + device_unregister(&info->dev); -void ocxl_destroy_cdev(struct ocxl_afu *afu) -{ - cdev_del(&afu->cdev); + free_minor(info); + kfree(info); } -int ocxl_register_afu(struct ocxl_afu *afu) +int ocxl_file_register_afu(struct ocxl_afu *afu) { int minor; + int rc; + struct ocxl_file_info *info; + struct ocxl_fn *fn = afu->fn; + struct pci_dev *pci_dev = to_pci_dev(fn->dev.parent); + + info = kzalloc(sizeof(*info), GFP_KERNEL); + if (info == NULL) + return -ENOMEM; - minor = allocate_afu_minor(afu); - if (minor < 0) + info->afu = afu; + + minor = allocate_minor(info); + if (minor < 0) { + kfree(info); return minor; - afu->dev.devt = MKDEV(MAJOR(ocxl_dev), minor); - afu->dev.class = ocxl_class; - return device_register(&afu->dev); + } + + info->dev.parent = &fn->dev; + info->dev.devt = MKDEV(MAJOR(ocxl_dev), minor); + info->dev.class = ocxl_class; + + ocxl_afu_set_private(afu, info, ocxl_file_release); + + rc = dev_set_name(&info->dev, "%s.%s.%hhu", + afu->config.name, dev_name(&pci_dev->dev), afu->config.idx); + if (rc) + return rc; + + rc = device_register(&info->dev); + if (rc) + return rc; + + return ocxl_sysfs_register_afu(afu); +} + +int ocxl_file_make_visible(struct ocxl_afu *afu) +{ + int rc; + struct ocxl_file_info *info = ocxl_afu_get_private(afu); + + cdev_init(&info->cdev, &ocxl_afu_fops); + rc = cdev_add(&info->cdev, info->dev.devt, 1); + if (rc) { + dev_err(&info->dev, "Unable to add afu char device: %d\n", rc); + return rc; + } + + return 0; } -void ocxl_unregister_afu(struct ocxl_afu *afu) +void ocxl_file_make_invisible(struct ocxl_afu *afu) { - free_afu_minor(afu); + struct ocxl_file_info *info = ocxl_afu_get_private(afu); + + cdev_del(&info->cdev); } static char *ocxl_devnode(struct device *dev, umode_t *mode) diff --git a/drivers/misc/ocxl/ocxl_internal.h b/drivers/misc/ocxl/ocxl_internal.h index 1319406ce5c6..4fc7e9597ede 100644 --- a/drivers/misc/ocxl/ocxl_internal.h +++ b/drivers/misc/ocxl/ocxl_internal.h @@ -11,9 +11,6 @@ #define MAX_IRQ_PER_LINK 2000 #define MAX_IRQ_PER_CONTEXT MAX_IRQ_PER_LINK -#define to_ocxl_function(d) container_of(d, struct ocxl_fn, dev) -#define to_ocxl_afu(d) container_of(d, struct ocxl_afu, dev) - extern struct pci_driver ocxl_pci_driver; struct ocxl_fn { @@ -30,11 +27,17 @@ struct ocxl_fn { void *link; }; +struct ocxl_file_info { + struct ocxl_afu *afu; + struct device dev; + struct cdev cdev; + struct bin_attribute attr_global_mmio; +}; + struct ocxl_afu { + struct kref kref; struct ocxl_fn *fn; struct list_head list; - struct device dev; - struct cdev cdev; struct ocxl_afu_config config; int pasid_base; int pasid_count; /* opened contexts */ @@ -48,7 +51,9 @@ struct ocxl_afu { u64 irq_base_offset; void __iomem *global_mmio_ptr; u64 pp_mmio_start; - struct bin_attribute attr_global_mmio; + void *private; + void (*private_release)(void *private); + }; enum ocxl_context_status { @@ -91,13 +96,11 @@ struct ocxl_process_element { __be32 software_state; }; -struct ocxl_afu *ocxl_afu_get(struct ocxl_afu *afu); -void ocxl_afu_put(struct ocxl_afu *afu); - int ocxl_create_cdev(struct ocxl_afu *afu); void ocxl_destroy_cdev(struct ocxl_afu *afu); -int ocxl_register_afu(struct ocxl_afu *afu); -void ocxl_unregister_afu(struct ocxl_afu *afu); +int ocxl_file_register_afu(struct ocxl_afu *afu); +int ocxl_file_make_visible(struct ocxl_afu *afu); +void ocxl_file_make_invisible(struct ocxl_afu *afu); int ocxl_file_init(void); void ocxl_file_exit(void); @@ -134,8 +137,8 @@ int ocxl_context_mmap(struct ocxl_context *ctx, struct vm_area_struct *vma); void ocxl_context_detach_all(struct ocxl_afu *afu); -int ocxl_sysfs_add_afu(struct ocxl_afu *afu); -void ocxl_sysfs_remove_afu(struct ocxl_afu *afu); +int ocxl_sysfs_register_afu(struct ocxl_afu *afu); +void ocxl_sysfs_unregister_afu(struct ocxl_afu *afu); int ocxl_afu_irq_alloc(struct ocxl_context *ctx, u64 *irq_offset); int ocxl_afu_irq_free(struct ocxl_context *ctx, u64 irq_offset); @@ -144,9 +147,11 @@ int ocxl_afu_irq_set_fd(struct ocxl_context *ctx, u64 irq_offset, int eventfd); u64 ocxl_afu_irq_get_addr(struct ocxl_context *ctx, u64 irq_offset); -struct ocxl_fn *init_function(struct pci_dev *dev); -void remove_function(struct ocxl_fn *fn); -int init_afu(struct pci_dev *dev, struct ocxl_fn *fn, u8 afu_idx); -void remove_afu(struct ocxl_afu *afu); +/** + * Free an AFU + * + * afu: The AFU to free + */ +void ocxl_free_afu(struct ocxl_afu *afu); #endif /* _OCXL_INTERNAL_H_ */ diff --git a/drivers/misc/ocxl/pci.c b/drivers/misc/ocxl/pci.c index 5926c863716c..a1ed2bb02e4b 100644 --- a/drivers/misc/ocxl/pci.c +++ b/drivers/misc/ocxl/pci.c @@ -16,47 +16,48 @@ MODULE_DEVICE_TABLE(pci, ocxl_pci_tbl); static int ocxl_probe(struct pci_dev *dev, const struct pci_device_id *id) { - int rc, afu_count = 0; - u8 afu; + int rc; + struct ocxl_afu *afu, *tmp; struct ocxl_fn *fn; + struct list_head *afu_list; - if (!radix_enabled()) { - dev_err(&dev->dev, "Unsupported memory model (hash)\n"); - return -ENODEV; - } - - fn = init_function(dev); - if (IS_ERR(fn)) { - dev_err(&dev->dev, "function init failed: %li\n", - PTR_ERR(fn)); + fn = ocxl_function_open(dev); + if (IS_ERR(fn)) return PTR_ERR(fn); - } - for (afu = 0; afu <= fn->config.max_afu_index; afu++) { - rc = ocxl_config_check_afu_index(dev, &fn->config, afu); - if (rc > 0) { - rc = init_afu(dev, fn, afu); - if (rc) { - dev_err(&dev->dev, - "Can't initialize AFU index %d\n", afu); - continue; - } - afu_count++; - } + pci_set_drvdata(dev, fn); + + afu_list = ocxl_function_afu_list(fn); + + list_for_each_entry_safe(afu, tmp, afu_list, list) { + rc = ocxl_file_register_afu(afu); + if (rc) + continue; + + rc = ocxl_file_make_visible(afu); + if (rc) + continue; + + // Defer error cleanup until the device is removed } - dev_info(&dev->dev, "%d AFU(s) configured\n", afu_count); + return 0; } -static void ocxl_remove(struct pci_dev *dev) +void ocxl_remove(struct pci_dev *dev) { - struct ocxl_afu *afu, *tmp; - struct ocxl_fn *fn = pci_get_drvdata(dev); + struct ocxl_fn *fn; + struct ocxl_afu *afu; + struct list_head *afu_list; + + fn = pci_get_drvdata(dev); + afu_list = ocxl_function_afu_list(fn); - list_for_each_entry_safe(afu, tmp, &fn->afu_list, list) { - remove_afu(afu); + list_for_each_entry(afu, afu_list, list) { + ocxl_file_make_invisible(afu); } - remove_function(fn); + + ocxl_function_close(fn); } struct pci_driver ocxl_pci_driver = { diff --git a/drivers/misc/ocxl/sysfs.c b/drivers/misc/ocxl/sysfs.c index 0ab1fd1b2682..a67931f1feec 100644 --- a/drivers/misc/ocxl/sysfs.c +++ b/drivers/misc/ocxl/sysfs.c @@ -3,11 +3,18 @@ #include #include "ocxl_internal.h" +static inline struct ocxl_afu *to_afu(struct device *device) +{ + struct ocxl_file_info *info = container_of(device, struct ocxl_file_info, dev); + + return info->afu; +} + static ssize_t global_mmio_size_show(struct device *device, struct device_attribute *attr, char *buf) { - struct ocxl_afu *afu = to_ocxl_afu(device); + struct ocxl_afu *afu = to_afu(device); return scnprintf(buf, PAGE_SIZE, "%d\n", afu->config.global_mmio_size); @@ -17,7 +24,7 @@ static ssize_t pp_mmio_size_show(struct device *device, struct device_attribute *attr, char *buf) { - struct ocxl_afu *afu = to_ocxl_afu(device); + struct ocxl_afu *afu = to_afu(device); return scnprintf(buf, PAGE_SIZE, "%d\n", afu->config.pp_mmio_stride); @@ -27,7 +34,7 @@ static ssize_t afu_version_show(struct device *device, struct device_attribute *attr, char *buf) { - struct ocxl_afu *afu = to_ocxl_afu(device); + struct ocxl_afu *afu = to_afu(device); return scnprintf(buf, PAGE_SIZE, "%hhu:%hhu\n", afu->config.version_major, @@ -38,7 +45,7 @@ static ssize_t contexts_show(struct device *device, struct device_attribute *attr, char *buf) { - struct ocxl_afu *afu = to_ocxl_afu(device); + struct ocxl_afu *afu = to_afu(device); return scnprintf(buf, PAGE_SIZE, "%d/%d\n", afu->pasid_count, afu->pasid_max); @@ -55,7 +62,7 @@ static ssize_t global_mmio_read(struct file *filp, struct kobject *kobj, struct bin_attribute *bin_attr, char *buf, loff_t off, size_t count) { - struct ocxl_afu *afu = to_ocxl_afu(kobj_to_dev(kobj)); + struct ocxl_afu *afu = to_afu(kobj_to_dev(kobj)); if (count == 0 || off < 0 || off >= afu->config.global_mmio_size) @@ -86,7 +93,7 @@ static int global_mmio_mmap(struct file *filp, struct kobject *kobj, struct bin_attribute *bin_attr, struct vm_area_struct *vma) { - struct ocxl_afu *afu = to_ocxl_afu(kobj_to_dev(kobj)); + struct ocxl_afu *afu = to_afu(kobj_to_dev(kobj)); if ((vma_pages(vma) + vma->vm_pgoff) > (afu->config.global_mmio_size >> PAGE_SHIFT)) @@ -99,27 +106,29 @@ static int global_mmio_mmap(struct file *filp, struct kobject *kobj, return 0; } -int ocxl_sysfs_add_afu(struct ocxl_afu *afu) +int ocxl_sysfs_register_afu(struct ocxl_afu *afu) { int i, rc; + struct ocxl_file_info *info = ocxl_afu_get_private(afu); + + if (!info) + return -EFAULT; // ocxl_file_register_afu() must be called first for (i = 0; i < ARRAY_SIZE(afu_attrs); i++) { - rc = device_create_file(&afu->dev, &afu_attrs[i]); + rc = device_create_file(&info->dev, &afu_attrs[i]); if (rc) goto err; } - sysfs_attr_init(&afu->attr_global_mmio.attr); - afu->attr_global_mmio.attr.name = "global_mmio_area"; - afu->attr_global_mmio.attr.mode = 0600; - afu->attr_global_mmio.size = afu->config.global_mmio_size; - afu->attr_global_mmio.read = global_mmio_read; - afu->attr_global_mmio.mmap = global_mmio_mmap; - rc = device_create_bin_file(&afu->dev, &afu->attr_global_mmio); + sysfs_attr_init(&info->attr_global_mmio.attr); + info->attr_global_mmio.attr.name = "global_mmio_area"; + info->attr_global_mmio.attr.mode = 0600; + info->attr_global_mmio.size = afu->config.global_mmio_size; + info->attr_global_mmio.read = global_mmio_read; + info->attr_global_mmio.mmap = global_mmio_mmap; + rc = device_create_bin_file(&info->dev, &info->attr_global_mmio); if (rc) { - dev_err(&afu->dev, - "Unable to create global mmio attr for afu: %d\n", - rc); + dev_err(&info->dev, "Unable to create global mmio attr for afu: %d\n", rc); goto err; } @@ -127,15 +136,20 @@ int ocxl_sysfs_add_afu(struct ocxl_afu *afu) err: for (i--; i >= 0; i--) - device_remove_file(&afu->dev, &afu_attrs[i]); + device_remove_file(&info->dev, &afu_attrs[i]); + return rc; } -void ocxl_sysfs_remove_afu(struct ocxl_afu *afu) +void ocxl_sysfs_unregister_afu(struct ocxl_afu *afu) { + struct ocxl_file_info *info = ocxl_afu_get_private(afu); int i; + if (!info) + return; + for (i = 0; i < ARRAY_SIZE(afu_attrs); i++) - device_remove_file(&afu->dev, &afu_attrs[i]); - device_remove_bin_file(&afu->dev, &afu->attr_global_mmio); + device_remove_file(&info->dev, &afu_attrs[i]); + device_remove_bin_file(&info->dev, &info->attr_global_mmio); } diff --git a/include/misc/ocxl.h b/include/misc/ocxl.h index ebbfe83cd5a6..54f8bafa3caa 100644 --- a/include/misc/ocxl.h +++ b/include/misc/ocxl.h @@ -16,11 +16,7 @@ #define OCXL_AFU_NAME_SZ (24+1) /* add 1 for NULL termination */ -/* - * The following 2 structures are a fairly generic way of representing - * the configuration data for a function and AFU, as read from the - * configuration space. - */ + struct ocxl_afu_config { u8 idx; int dvsec_afu_control_pos; /* offset of AFU control DVSEC */ @@ -51,6 +47,7 @@ struct ocxl_fn_config { // These are opaque outside the ocxl driver struct ocxl_afu; +struct ocxl_fn; struct ocxl_context; enum ocxl_endian { @@ -59,6 +56,74 @@ enum ocxl_endian { OCXL_HOST_ENDIAN = 2, /**< AFU data is the same endianness as the host */ }; +// Device detection & initialisation + +/** + * Open an OpenCAPI function on an OpenCAPI device + * + * @dev: The PCI device that contains the function + * + * Returns an opaque pointer to the function, or an error pointer (check with IS_ERR) + */ +struct ocxl_fn *ocxl_function_open(struct pci_dev *dev); + +/** + * Get the list of AFUs associated with a PCI function device + * + * Returns a list of struct ocxl_afu * + * + * @fn: The OpenCAPI function containing the AFUs + */ +struct list_head *ocxl_function_afu_list(struct ocxl_fn *fn); + +/** + * Fetch an AFU instance from an OpenCAPI function + * + * @fn: The OpenCAPI function to get the AFU from + * @afu_idx: The index of the AFU to get + * + * If successful, the AFU should be released with ocxl_afu_put() + * + * Returns a pointer to the AFU, or NULL on error + */ +struct ocxl_afu *ocxl_function_fetch_afu(struct ocxl_fn *fn, u8 afu_idx); + +/** + * Take a reference to an AFU + * + * @afu: The AFU to increment the reference count on + */ +void ocxl_afu_get(struct ocxl_afu *afu); + +/** + * Release a reference to an AFU + * + * @afu: The AFU to decrement the reference count on + */ +void ocxl_afu_put(struct ocxl_afu *afu); + + +/** + * Get the configuration information for an OpenCAPI function + * + * @fn: The OpenCAPI function to get the config for + * + * Returns the function config, or NULL on error + */ +const struct ocxl_fn_config *ocxl_function_config(struct ocxl_fn *fn); + +/** + * Close an OpenCAPI function + * + * This will free any AFUs previously retrieved from the function, and + * detach and associated contexts. The contexts must by freed by the caller. + * + * @fn: The OpenCAPI function to close + * + */ +void ocxl_function_close(struct ocxl_fn *fn); + +// OpenCAPI contexts /** * Allocate space for a new OpenCAPI context * @@ -102,6 +167,8 @@ int ocxl_context_attach(struct ocxl_context *ctx, u64 amr, */ int ocxl_context_detach(struct ocxl_context *ctx); +// OpenCAPI MMIO accesses + /** * Read a 32 bit value from global MMIO * @@ -206,12 +273,39 @@ int ocxl_global_mmio_clear32(struct ocxl_afu *afu, size_t offset, int ocxl_global_mmio_clear64(struct ocxl_afu *afu, size_t offset, enum ocxl_endian endian, u64 mask); -/* - * Read the configuration space of a function and fill in a - * ocxl_fn_config structure with all the function details +// AFU Metadata + +/** + * Get a pointer to the config for an AFU + * + * @afu: a pointer to the AFU to get the config for + * + * Returns a pointer to the AFU config */ -int ocxl_config_read_function(struct pci_dev *dev, - struct ocxl_fn_config *fn); +struct ocxl_afu_config *ocxl_afu_config(struct ocxl_afu *afu); + +/** + * Assign opaque hardware specific information to an OpenCAPI AFU. + * + * @dev: The PCI device associated with the OpenCAPI device + * @private: the opaque hardware specific information to assign to the driver + * @private_release: A callback to free the private data + */ +void ocxl_afu_set_private(struct ocxl_afu *afu, void *private, + void (*private_release)(void *private)); + +/** + * Fetch the hardware specific information associated with an external OpenCAPI + * AFU. This may be consumed by an external OpenCAPI driver. + * + * @afu: The AFU + * + * Returns the opaque pointer associated with the device, or NULL if not set + */ +void *ocxl_afu_get_private(struct ocxl_afu *dev); + + +// Functions left here are for compatibility with the cxlflash driver /* * Read the configuration space of a function for the AFU specified by @@ -298,6 +392,13 @@ int ocxl_config_set_TL(struct pci_dev *dev, int tl_dvsec); int ocxl_config_terminate_pasid(struct pci_dev *dev, int afu_control_offset, int pasid); +/* + * Read the configuration space of a function and fill in a + * ocxl_fn_config structure with all the function details + */ +int ocxl_config_read_function(struct pci_dev *dev, + struct ocxl_fn_config *fn); + /* * Set up the opencapi link for the function. * From patchwork Wed Mar 13 04:15:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 1055892 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44JzR44rF7z9s3l for ; Wed, 13 Mar 2019 15:30:24 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 44JzR43xGGzDqBH for ; Wed, 13 Mar 2019 15:30:24 +1100 (AEDT) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=au1.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 44Jz721vFszDqJM for ; Wed, 13 Mar 2019 15:16:30 +1100 (AEDT) Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x2D4DXvi042021 for ; Wed, 13 Mar 2019 00:16:28 -0400 Received: from e06smtp01.uk.ibm.com (e06smtp01.uk.ibm.com [195.75.94.97]) by mx0a-001b2d01.pphosted.com with ESMTP id 2r6pnm1dw5-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 13 Mar 2019 00:16:28 -0400 Received: from localhost by e06smtp01.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 13 Mar 2019 04:16:24 -0000 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2D4GNUe58261708 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 13 Mar 2019 04:16:23 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2F34FA405C; Wed, 13 Mar 2019 04:16:23 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 30024A405B; Wed, 13 Mar 2019 04:16:22 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 13 Mar 2019 04:16:22 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id ACC1EA024A; Wed, 13 Mar 2019 15:16:20 +1100 (AEDT) From: "Alastair D'Silva" To: Subject: [PATCH 6/7] ocxl: afu_irq only deals with IRQ IDs, not offsets Date: Wed, 13 Mar 2019 15:15:21 +1100 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190313041524.14644-1-alastair@au1.ibm.com> References: <20190313041524.14644-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19031304-4275-0000-0000-0000031A489E X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19031304-4276-0000-0000-00003828B571 Message-Id: <20190313041524.14644-7-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903130029 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arnd Bergmann , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Andrew Donnellan , Alastair D'Silva , Frederic Barrat , linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Alastair D'Silva The use of offsets is required only in the frontend, so alter the IRQ API to only work with IRQ IDs in the backend. Signed-off-by: Alastair D'Silva --- drivers/misc/ocxl/afu_irq.c | 31 +++++++++++++------------------ drivers/misc/ocxl/context.c | 7 +++++-- drivers/misc/ocxl/file.c | 13 ++++++++----- drivers/misc/ocxl/ocxl_internal.h | 10 ++++++---- drivers/misc/ocxl/trace.h | 12 ++++-------- 5 files changed, 36 insertions(+), 37 deletions(-) diff --git a/drivers/misc/ocxl/afu_irq.c b/drivers/misc/ocxl/afu_irq.c index 11ab996657a2..1885c472df58 100644 --- a/drivers/misc/ocxl/afu_irq.c +++ b/drivers/misc/ocxl/afu_irq.c @@ -14,14 +14,14 @@ struct afu_irq { struct eventfd_ctx *ev_ctx; }; -static int irq_offset_to_id(struct ocxl_context *ctx, u64 offset) +int ocxl_irq_offset_to_id(struct ocxl_context *ctx, u64 offset) { return (offset - ctx->afu->irq_base_offset) >> PAGE_SHIFT; } -static u64 irq_id_to_offset(struct ocxl_context *ctx, int id) +u64 ocxl_irq_id_to_offset(struct ocxl_context *ctx, int irq_id) { - return ctx->afu->irq_base_offset + (id << PAGE_SHIFT); + return ctx->afu->irq_base_offset + (irq_id << PAGE_SHIFT); } static irqreturn_t afu_irq_handler(int virq, void *data) @@ -69,7 +69,7 @@ static void release_afu_irq(struct afu_irq *irq) kfree(irq->name); } -int ocxl_afu_irq_alloc(struct ocxl_context *ctx, u64 *irq_offset) +int ocxl_afu_irq_alloc(struct ocxl_context *ctx, int *irq_id) { struct afu_irq *irq; int rc; @@ -101,10 +101,7 @@ int ocxl_afu_irq_alloc(struct ocxl_context *ctx, u64 *irq_offset) if (rc) goto err_alloc; - *irq_offset = irq_id_to_offset(ctx, irq->id); - - trace_ocxl_afu_irq_alloc(ctx->pasid, irq->id, irq->virq, irq->hw_irq, - *irq_offset); + trace_ocxl_afu_irq_alloc(ctx->pasid, irq->id, irq->virq, irq->hw_irq); mutex_unlock(&ctx->irq_lock); return 0; @@ -123,7 +120,7 @@ static void afu_irq_free(struct afu_irq *irq, struct ocxl_context *ctx) trace_ocxl_afu_irq_free(ctx->pasid, irq->id); if (ctx->mapping) unmap_mapping_range(ctx->mapping, - irq_id_to_offset(ctx, irq->id), + ocxl_irq_id_to_offset(ctx, irq->id), 1 << PAGE_SHIFT, 1); release_afu_irq(irq); if (irq->ev_ctx) @@ -132,14 +129,13 @@ static void afu_irq_free(struct afu_irq *irq, struct ocxl_context *ctx) kfree(irq); } -int ocxl_afu_irq_free(struct ocxl_context *ctx, u64 irq_offset) +int ocxl_afu_irq_free(struct ocxl_context *ctx, int irq_id) { struct afu_irq *irq; - int id = irq_offset_to_id(ctx, irq_offset); mutex_lock(&ctx->irq_lock); - irq = idr_find(&ctx->irq_idr, id); + irq = idr_find(&ctx->irq_idr, irq_id); if (!irq) { mutex_unlock(&ctx->irq_lock); return -EINVAL; @@ -161,14 +157,14 @@ void ocxl_afu_irq_free_all(struct ocxl_context *ctx) mutex_unlock(&ctx->irq_lock); } -int ocxl_afu_irq_set_fd(struct ocxl_context *ctx, u64 irq_offset, int eventfd) +int ocxl_afu_irq_set_fd(struct ocxl_context *ctx, int irq_id, int eventfd) { struct afu_irq *irq; struct eventfd_ctx *ev_ctx; - int rc = 0, id = irq_offset_to_id(ctx, irq_offset); + int rc = 0; mutex_lock(&ctx->irq_lock); - irq = idr_find(&ctx->irq_idr, id); + irq = idr_find(&ctx->irq_idr, irq_id); if (!irq) { rc = -EINVAL; goto unlock; @@ -186,14 +182,13 @@ int ocxl_afu_irq_set_fd(struct ocxl_context *ctx, u64 irq_offset, int eventfd) return rc; } -u64 ocxl_afu_irq_get_addr(struct ocxl_context *ctx, u64 irq_offset) +u64 ocxl_afu_irq_get_addr(struct ocxl_context *ctx, int irq_id) { struct afu_irq *irq; - int id = irq_offset_to_id(ctx, irq_offset); u64 addr = 0; mutex_lock(&ctx->irq_lock); - irq = idr_find(&ctx->irq_idr, id); + irq = idr_find(&ctx->irq_idr, irq_id); if (irq) addr = irq->trigger_page; mutex_unlock(&ctx->irq_lock); diff --git a/drivers/misc/ocxl/context.c b/drivers/misc/ocxl/context.c index 9a37e9632cd9..c04887591837 100644 --- a/drivers/misc/ocxl/context.c +++ b/drivers/misc/ocxl/context.c @@ -93,8 +93,9 @@ static vm_fault_t map_afu_irq(struct vm_area_struct *vma, unsigned long address, u64 offset, struct ocxl_context *ctx) { u64 trigger_addr; + int irq_id = ocxl_irq_offset_to_id(ctx, offset); - trigger_addr = ocxl_afu_irq_get_addr(ctx, offset); + trigger_addr = ocxl_afu_irq_get_addr(ctx, irq_id); if (!trigger_addr) return VM_FAULT_SIGBUS; @@ -154,12 +155,14 @@ static const struct vm_operations_struct ocxl_vmops = { static int check_mmap_afu_irq(struct ocxl_context *ctx, struct vm_area_struct *vma) { + int irq_id = ocxl_irq_offset_to_id(ctx, vma->vm_pgoff << PAGE_SHIFT); + /* only one page */ if (vma_pages(vma) != 1) return -EINVAL; /* check offset validty */ - if (!ocxl_afu_irq_get_addr(ctx, vma->vm_pgoff << PAGE_SHIFT)) + if (!ocxl_afu_irq_get_addr(ctx, irq_id)) return -EINVAL; /* diff --git a/drivers/misc/ocxl/file.c b/drivers/misc/ocxl/file.c index 424bb0b40afb..d28618c161de 100644 --- a/drivers/misc/ocxl/file.c +++ b/drivers/misc/ocxl/file.c @@ -197,6 +197,7 @@ static long afu_ioctl(struct file *file, unsigned int cmd, { struct ocxl_context *ctx = file->private_data; struct ocxl_ioctl_irq_fd irq_fd; + int irq_id; u64 irq_offset; long rc; bool closed; @@ -218,12 +219,13 @@ static long afu_ioctl(struct file *file, unsigned int cmd, break; case OCXL_IOCTL_IRQ_ALLOC: - rc = ocxl_afu_irq_alloc(ctx, &irq_offset); + rc = ocxl_afu_irq_alloc(ctx, &irq_id); if (!rc) { + irq_offset = ocxl_irq_id_to_offset(ctx, irq_id); rc = copy_to_user((u64 __user *) args, &irq_offset, sizeof(irq_offset)); if (rc) { - ocxl_afu_irq_free(ctx, irq_offset); + ocxl_afu_irq_free(ctx, irq_id); return -EFAULT; } } @@ -234,7 +236,8 @@ static long afu_ioctl(struct file *file, unsigned int cmd, sizeof(irq_offset)); if (rc) return -EFAULT; - rc = ocxl_afu_irq_free(ctx, irq_offset); + irq_id = ocxl_irq_offset_to_id(ctx, irq_offset); + rc = ocxl_afu_irq_free(ctx, irq_id); break; case OCXL_IOCTL_IRQ_SET_FD: @@ -244,8 +247,8 @@ static long afu_ioctl(struct file *file, unsigned int cmd, return -EFAULT; if (irq_fd.reserved) return -EINVAL; - rc = ocxl_afu_irq_set_fd(ctx, irq_fd.irq_offset, - irq_fd.eventfd); + irq_id = ocxl_irq_offset_to_id(ctx, irq_fd.irq_offset); + rc = ocxl_afu_irq_set_fd(ctx, irq_id, irq_fd.eventfd); break; case OCXL_IOCTL_GET_METADATA: diff --git a/drivers/misc/ocxl/ocxl_internal.h b/drivers/misc/ocxl/ocxl_internal.h index 4fc7e9597ede..871155b464da 100644 --- a/drivers/misc/ocxl/ocxl_internal.h +++ b/drivers/misc/ocxl/ocxl_internal.h @@ -140,12 +140,14 @@ void ocxl_context_detach_all(struct ocxl_afu *afu); int ocxl_sysfs_register_afu(struct ocxl_afu *afu); void ocxl_sysfs_unregister_afu(struct ocxl_afu *afu); -int ocxl_afu_irq_alloc(struct ocxl_context *ctx, u64 *irq_offset); -int ocxl_afu_irq_free(struct ocxl_context *ctx, u64 irq_offset); +int ocxl_irq_offset_to_id(struct ocxl_context *ctx, u64 offset); +u64 ocxl_irq_id_to_offset(struct ocxl_context *ctx, int irq_id); +int ocxl_afu_irq_alloc(struct ocxl_context *ctx, int *irq_id); +int ocxl_afu_irq_free(struct ocxl_context *ctx, int irq_id); void ocxl_afu_irq_free_all(struct ocxl_context *ctx); -int ocxl_afu_irq_set_fd(struct ocxl_context *ctx, u64 irq_offset, +int ocxl_afu_irq_set_fd(struct ocxl_context *ctx, int irq_id, int eventfd); -u64 ocxl_afu_irq_get_addr(struct ocxl_context *ctx, u64 irq_offset); +u64 ocxl_afu_irq_get_addr(struct ocxl_context *ctx, int irq_id); /** * Free an AFU diff --git a/drivers/misc/ocxl/trace.h b/drivers/misc/ocxl/trace.h index 68bf2f173a1a..a081e644f5f3 100644 --- a/drivers/misc/ocxl/trace.h +++ b/drivers/misc/ocxl/trace.h @@ -107,16 +107,14 @@ DEFINE_EVENT(ocxl_fault_handler, ocxl_fault_ack, ); TRACE_EVENT(ocxl_afu_irq_alloc, - TP_PROTO(int pasid, int irq_id, unsigned int virq, int hw_irq, - u64 irq_offset), - TP_ARGS(pasid, irq_id, virq, hw_irq, irq_offset), + TP_PROTO(int pasid, int irq_id, unsigned int virq, int hw_irq), + TP_ARGS(pasid, irq_id, virq, hw_irq), TP_STRUCT__entry( __field(int, pasid) __field(int, irq_id) __field(unsigned int, virq) __field(int, hw_irq) - __field(u64, irq_offset) ), TP_fast_assign( @@ -124,15 +122,13 @@ TRACE_EVENT(ocxl_afu_irq_alloc, __entry->irq_id = irq_id; __entry->virq = virq; __entry->hw_irq = hw_irq; - __entry->irq_offset = irq_offset; ), - TP_printk("pasid=%#x irq_id=%d virq=%u hw_irq=%d irq_offset=%#llx", + TP_printk("pasid=%#x irq_id=%d virq=%u hw_irq=%d", __entry->pasid, __entry->irq_id, __entry->virq, - __entry->hw_irq, - __entry->irq_offset + __entry->hw_irq ) ); From patchwork Wed Mar 13 04:15:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 1055893 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44JzT51HyBz9s3l for ; Wed, 13 Mar 2019 15:32:09 +1100 (AEDT) Authentication-Results: ozlabs.org; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 13 Mar 2019 04:16:25 -0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2D4GODX50594024 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 13 Mar 2019 04:16:24 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 70EF6A405B; Wed, 13 Mar 2019 04:16:24 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BF6EEA4040; Wed, 13 Mar 2019 04:16:23 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 13 Mar 2019 04:16:23 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 48506A01B5; Wed, 13 Mar 2019 15:16:22 +1100 (AEDT) From: "Alastair D'Silva" To: Subject: [PATCH 7/7] ocxl: move event_fd handling to frontend Date: Wed, 13 Mar 2019 15:15:22 +1100 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190313041524.14644-1-alastair@au1.ibm.com> References: <20190313041524.14644-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19031304-0028-0000-0000-0000035354FA X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19031304-0029-0000-0000-00002411DB33 Message-Id: <20190313041524.14644-8-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903130029 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arnd Bergmann , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Andrew Donnellan , Alastair D'Silva , Frederic Barrat , linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Alastair D'Silva Event_fd is only used in the driver frontend, so it does not need to exist in the backend code. Relocate it to the frontend and provide an opaque mechanism for consumers instead. Signed-off-by: Alastair D'Silva --- drivers/misc/ocxl/afu_irq.c | 69 +++++++++++++++++-------------- drivers/misc/ocxl/file.c | 22 +++++++++- drivers/misc/ocxl/ocxl_internal.h | 5 --- include/misc/ocxl.h | 44 ++++++++++++++++++++ 4 files changed, 102 insertions(+), 38 deletions(-) diff --git a/drivers/misc/ocxl/afu_irq.c b/drivers/misc/ocxl/afu_irq.c index 1885c472df58..bccb89085a29 100644 --- a/drivers/misc/ocxl/afu_irq.c +++ b/drivers/misc/ocxl/afu_irq.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ // Copyright 2017 IBM Corp. #include -#include +#include #include "ocxl_internal.h" #include "trace.h" @@ -11,7 +11,9 @@ struct afu_irq { unsigned int virq; char *name; u64 trigger_page; - struct eventfd_ctx *ev_ctx; + irqreturn_t (*handler)(void *private); + void (*free_private)(void *private); + void *private; }; int ocxl_irq_offset_to_id(struct ocxl_context *ctx, u64 offset) @@ -24,14 +26,42 @@ u64 ocxl_irq_id_to_offset(struct ocxl_context *ctx, int irq_id) return ctx->afu->irq_base_offset + (irq_id << PAGE_SHIFT); } +int ocxl_irq_set_handler(struct ocxl_context *ctx, int irq_id, + irqreturn_t (*handler)(void *private), + void (*free_private)(void *private), + void *private) +{ + struct afu_irq *irq; + int rc; + + mutex_lock(&ctx->irq_lock); + irq = idr_find(&ctx->irq_idr, irq_id); + if (!irq) { + rc = -EINVAL; + goto unlock; + } + + irq->handler = handler; + irq->private = private; + + rc = 0; + goto unlock; + +unlock: + mutex_unlock(&ctx->irq_lock); + return rc; +} + static irqreturn_t afu_irq_handler(int virq, void *data) { struct afu_irq *irq = (struct afu_irq *) data; trace_ocxl_afu_irq_receive(virq); - if (irq->ev_ctx) - eventfd_signal(irq->ev_ctx, 1); - return IRQ_HANDLED; + + if (irq->handler) + return irq->handler(irq->private); + + return IRQ_HANDLED; // Just drop it on the ground } static int setup_afu_irq(struct ocxl_context *ctx, struct afu_irq *irq) @@ -123,8 +153,8 @@ static void afu_irq_free(struct afu_irq *irq, struct ocxl_context *ctx) ocxl_irq_id_to_offset(ctx, irq->id), 1 << PAGE_SHIFT, 1); release_afu_irq(irq); - if (irq->ev_ctx) - eventfd_ctx_put(irq->ev_ctx); + if (irq->free_private) + irq->free_private(irq->private); ocxl_link_free_irq(ctx->afu->fn->link, irq->hw_irq); kfree(irq); } @@ -157,31 +187,6 @@ void ocxl_afu_irq_free_all(struct ocxl_context *ctx) mutex_unlock(&ctx->irq_lock); } -int ocxl_afu_irq_set_fd(struct ocxl_context *ctx, int irq_id, int eventfd) -{ - struct afu_irq *irq; - struct eventfd_ctx *ev_ctx; - int rc = 0; - - mutex_lock(&ctx->irq_lock); - irq = idr_find(&ctx->irq_idr, irq_id); - if (!irq) { - rc = -EINVAL; - goto unlock; - } - - ev_ctx = eventfd_ctx_fdget(eventfd); - if (IS_ERR(ev_ctx)) { - rc = -EINVAL; - goto unlock; - } - - irq->ev_ctx = ev_ctx; -unlock: - mutex_unlock(&ctx->irq_lock); - return rc; -} - u64 ocxl_afu_irq_get_addr(struct ocxl_context *ctx, int irq_id) { struct afu_irq *irq; diff --git a/drivers/misc/ocxl/file.c b/drivers/misc/ocxl/file.c index d28618c161de..16833a5d47f0 100644 --- a/drivers/misc/ocxl/file.c +++ b/drivers/misc/ocxl/file.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -192,11 +193,27 @@ static long afu_ioctl_get_features(struct ocxl_context *ctx, x == OCXL_IOCTL_GET_FEATURES ? "GET_FEATURES" : \ "UNKNOWN") +static irqreturn_t irq_handler(void *private) +{ + struct eventfd_ctx *ev_ctx = private; + + eventfd_signal(ev_ctx, 1); + return IRQ_HANDLED; +} + +static void irq_free(void *private) +{ + struct eventfd_ctx *ev_ctx = private; + + eventfd_ctx_put(ev_ctx); +} + static long afu_ioctl(struct file *file, unsigned int cmd, unsigned long args) { struct ocxl_context *ctx = file->private_data; struct ocxl_ioctl_irq_fd irq_fd; + struct eventfd_ctx *ev_ctx; int irq_id; u64 irq_offset; long rc; @@ -248,7 +265,10 @@ static long afu_ioctl(struct file *file, unsigned int cmd, if (irq_fd.reserved) return -EINVAL; irq_id = ocxl_irq_offset_to_id(ctx, irq_fd.irq_offset); - rc = ocxl_afu_irq_set_fd(ctx, irq_id, irq_fd.eventfd); + ev_ctx = eventfd_ctx_fdget(irq_fd.eventfd); + if (!ev_ctx) + return -EFAULT; + rc = ocxl_irq_set_handler(ctx, irq_id, irq_handler, irq_free, ev_ctx); break; case OCXL_IOCTL_GET_METADATA: diff --git a/drivers/misc/ocxl/ocxl_internal.h b/drivers/misc/ocxl/ocxl_internal.h index 871155b464da..f3775223f4b1 100644 --- a/drivers/misc/ocxl/ocxl_internal.h +++ b/drivers/misc/ocxl/ocxl_internal.h @@ -142,12 +142,7 @@ void ocxl_sysfs_unregister_afu(struct ocxl_afu *afu); int ocxl_irq_offset_to_id(struct ocxl_context *ctx, u64 offset); u64 ocxl_irq_id_to_offset(struct ocxl_context *ctx, int irq_id); -int ocxl_afu_irq_alloc(struct ocxl_context *ctx, int *irq_id); -int ocxl_afu_irq_free(struct ocxl_context *ctx, int irq_id); void ocxl_afu_irq_free_all(struct ocxl_context *ctx); -int ocxl_afu_irq_set_fd(struct ocxl_context *ctx, int irq_id, - int eventfd); -u64 ocxl_afu_irq_get_addr(struct ocxl_context *ctx, int irq_id); /** * Free an AFU diff --git a/include/misc/ocxl.h b/include/misc/ocxl.h index 54f8bafa3caa..3099c858093c 100644 --- a/include/misc/ocxl.h +++ b/include/misc/ocxl.h @@ -169,6 +169,50 @@ int ocxl_context_detach(struct ocxl_context *ctx); // OpenCAPI MMIO accesses +/** + * Allocate an IRQ associated with an AFU context + * @ctx: the AFU context + * @irq_id: out, the IRQ ID + * + * Returns 0 on success, negative on failure + */ +extern int ocxl_afu_irq_alloc(struct ocxl_context *ctx, int *irq_id); + +/** + * Frees an IRQ associated with an AFU context + * @ctx: the AFU context + * @irq_id: the IRQ ID + * + * Returns 0 on success, negative on failure + */ +extern int ocxl_afu_irq_free(struct ocxl_context *ctx, int irq_id); + +/** + * Gets the address of the trigger page for an IRQ + * This can then be provided to an AFU which will write to that + * page to trigger the IRQ. + * @ctx: The AFU context that the IRQ is associated with + * @irq_id: The IRQ ID + * + * returns the trigger page address, or 0 if the IRQ is not valid + */ +extern u64 ocxl_afu_irq_get_addr(struct ocxl_context *ctx, int irq_id); + +/** + * Provide a callback to be called when an IRQ is triggered + * @ctx: The AFU context that the IRQ is associated with + * @irq_id: The IRQ ID + * @handler: the callback to be called when the IRQ is triggered + * @free_private: the callback to be called when the IRQ is freed + * @private: Private data to be passed to the callbacks + * + * Returns 0 on success, negative on failure + */ +int ocxl_irq_set_handler(struct ocxl_context *ctx, int irq_id, + irqreturn_t (*handler)(void *private), + void (*free_private)(void *private), + void *private); + /** * Read a 32 bit value from global MMIO *