From patchwork Wed Mar 6 11:12:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Havelange X-Patchwork-Id: 1052285 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=essensium.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=essensium-com.20150623.gappssmtp.com header.i=@essensium-com.20150623.gappssmtp.com header.b="gNltG2/v"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44DrhL5wn2z9sN1 for ; Wed, 6 Mar 2019 22:12:34 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730364AbfCFLMc (ORCPT ); Wed, 6 Mar 2019 06:12:32 -0500 Received: from mail-ed1-f68.google.com ([209.85.208.68]:39211 "EHLO mail-ed1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730352AbfCFLMb (ORCPT ); Wed, 6 Mar 2019 06:12:31 -0500 Received: by mail-ed1-f68.google.com with SMTP id p27so9987447edc.6 for ; Wed, 06 Mar 2019 03:12:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=essensium-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UDGe8T7uTF1fS0LV360+rebuvgO6XlOWuD/srOZz6kA=; b=gNltG2/vMtp0zBc3u0alXu4S7dYzB3TXOypx/r6LxjqJJJiN4Zy5NdS9fOu+ogGv9/ BKmzb0wR5oz2SEELAoJ++4XtWmXjdS96hY4iMAdhNE2FBWSGATmWcIovlZU6EeV7HKNz OEyKN0Bq+O2fW4dc63c4YMt2Akw1la+XrcoiX7X0XkLO8ybFH0fghOfyRNQTGL3BgYAC Rq8DIAxYP2c61dpatuPyaTyBuuup19Doi82hA+uC0ygQdiqgf2thoOcknujXqFxDKFDA vb4FZ2mG146hg65uqzLoRk4rYeO6HABhk/+SQmqE/otWVEXPCOM6Zi8kPfas/ZqOXWke dVjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UDGe8T7uTF1fS0LV360+rebuvgO6XlOWuD/srOZz6kA=; b=mFUTTMeJhKstIHpKuerkoHaCKk1qOtxV+1VCL6fBir+eRF1NnCB9nx3OuxJc+Lcltv J3T3NSRTMYO4PmUill9rmGc+S8tXLqx5nBXwjk4NZfhwJk+alfJocfqjU0EhS2cGXkxw QlZVdUNfPcYYHbWqUuM/sLC8F5kABRa2Sk+5nZLaxYtUq5QNoVfk27pcziqHEQ8x3QxH 7VcmAVdoPk25uL71od1yAgq/UZD6YmwZKpmZWlgoIe1iMoiz+ZuNw68xjw9CsjNgp1eO VKty63fNlxfZUOOCCqSWw8jgiWSFl2Q8Ke5c1Ptt84VNDBcdLIRJYwp5qUHTbS8KNj/8 GJeA== X-Gm-Message-State: APjAAAVRPTg7hQ0jdwBok1ink7Ec7HcZqyk8YPuUMHHQPvbH1Ob/DMPO 1hSiWOV2BPjkJshjdNUdA0Gv9Q== X-Google-Smtp-Source: APXvYqwYqCMsKkYQWZol5oxl8MNudtVNOddwqzr50VpN9hqC+6iKrexdzDbUUBdgMwFX4xiCo6Itqg== X-Received: by 2002:a50:94d6:: with SMTP id t22mr23584689eda.232.1551870749143; Wed, 06 Mar 2019 03:12:29 -0800 (PST) Received: from ph-ThinkPad-E560.local.ess-mail.com (ip-188-118-3-185.reverse.destiny.be. [188.118.3.185]) by smtp.gmail.com with ESMTPSA id t25sm277879ejr.30.2019.03.06.03.12.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 03:12:28 -0800 (PST) From: Patrick Havelange To: William Breathitt Gray , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Jonathan Cameron Cc: Patrick Havelange Subject: [PATCH v2 1/7] include/fsl: add common FlexTimer #defines in a separate header. Date: Wed, 6 Mar 2019 12:12:02 +0100 Message-Id: <20190306111208.7454-2-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190306111208.7454-1-patrick.havelange@essensium.com> References: <20190306111208.7454-1-patrick.havelange@essensium.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Several files are/will be using the same #defines to use the Flextimer module. Regroup them in a common file. Signed-off-by: Patrick Havelange Reviewed-by: Esben Haabendal --- Changes v2 - Commit message --- include/linux/fsl/ftm.h | 88 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 include/linux/fsl/ftm.h diff --git a/include/linux/fsl/ftm.h b/include/linux/fsl/ftm.h new file mode 100644 index 000000000000..d59011acf66c --- /dev/null +++ b/include/linux/fsl/ftm.h @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0 +#ifndef __FSL_FTM_H__ +#define __FSL_FTM_H__ + +#define FTM_SC 0x0 /* Status And Control */ +#define FTM_CNT 0x4 /* Counter */ +#define FTM_MOD 0x8 /* Modulo */ + +#define FTM_CNTIN 0x4C /* Counter Initial Value */ +#define FTM_STATUS 0x50 /* Capture And Compare Status */ +#define FTM_MODE 0x54 /* Features Mode Selection */ +#define FTM_SYNC 0x58 /* Synchronization */ +#define FTM_OUTINIT 0x5C /* Initial State For Channels Output */ +#define FTM_OUTMASK 0x60 /* Output Mask */ +#define FTM_COMBINE 0x64 /* Function For Linked Channels */ +#define FTM_DEADTIME 0x68 /* Deadtime Insertion Control */ +#define FTM_EXTTRIG 0x6C /* FTM External Trigger */ +#define FTM_POL 0x70 /* Channels Polarity */ +#define FTM_FMS 0x74 /* Fault Mode Status */ +#define FTM_FILTER 0x78 /* Input Capture Filter Control */ +#define FTM_FLTCTRL 0x7C /* Fault Control */ +#define FTM_QDCTRL 0x80 /* Quadrature Decoder Control And Status */ +#define FTM_CONF 0x84 /* Configuration */ +#define FTM_FLTPOL 0x88 /* FTM Fault Input Polarity */ +#define FTM_SYNCONF 0x8C /* Synchronization Configuration */ +#define FTM_INVCTRL 0x90 /* FTM Inverting Control */ +#define FTM_SWOCTRL 0x94 /* FTM Software Output Control */ +#define FTM_PWMLOAD 0x98 /* FTM PWM Load */ + +#define FTM_SC_CLK_MASK_SHIFT 3 +#define FTM_SC_CLK_MASK (3 << FTM_SC_CLK_MASK_SHIFT) +#define FTM_SC_TOF 0x80 +#define FTM_SC_TOIE 0x40 +#define FTM_SC_CPWMS 0x20 +#define FTM_SC_CLKS 0x18 +#define FTM_SC_PS_1 0x0 +#define FTM_SC_PS_2 0x1 +#define FTM_SC_PS_4 0x2 +#define FTM_SC_PS_8 0x3 +#define FTM_SC_PS_16 0x4 +#define FTM_SC_PS_32 0x5 +#define FTM_SC_PS_64 0x6 +#define FTM_SC_PS_128 0x7 +#define FTM_SC_PS_MASK 0x7 + +#define FTM_MODE_FAULTIE 0x80 +#define FTM_MODE_FAULTM 0x60 +#define FTM_MODE_CAPTEST 0x10 +#define FTM_MODE_PWMSYNC 0x8 +#define FTM_MODE_WPDIS 0x4 +#define FTM_MODE_INIT 0x2 +#define FTM_MODE_FTMEN 0x1 + +/* NXP Errata: The PHAFLTREN and PHBFLTREN bits are tide to zero internally + * and these bits cannot be set. Flextimer cannot use Filter in + * Quadrature Decoder Mode. + * https://community.nxp.com/thread/467648#comment-1010319 + */ +#define FTM_QDCTRL_PHAFLTREN 0x80 +#define FTM_QDCTRL_PHBFLTREN 0x40 +#define FTM_QDCTRL_PHAPOL 0x20 +#define FTM_QDCTRL_PHBPOL 0x10 +#define FTM_QDCTRL_QUADMODE 0x8 +#define FTM_QDCTRL_QUADDIR 0x4 +#define FTM_QDCTRL_TOFDIR 0x2 +#define FTM_QDCTRL_QUADEN 0x1 + +#define FTM_FMS_FAULTF 0x80 +#define FTM_FMS_WPEN 0x40 +#define FTM_FMS_FAULTIN 0x10 +#define FTM_FMS_FAULTF3 0x8 +#define FTM_FMS_FAULTF2 0x4 +#define FTM_FMS_FAULTF1 0x2 +#define FTM_FMS_FAULTF0 0x1 + +#define FTM_CSC_BASE 0xC +#define FTM_CSC_MSB 0x20 +#define FTM_CSC_MSA 0x10 +#define FTM_CSC_ELSB 0x8 +#define FTM_CSC_ELSA 0x4 +#define FTM_CSC(_channel) (FTM_CSC_BASE + ((_channel) * 8)) + +#define FTM_CV_BASE 0x10 +#define FTM_CV(_channel) (FTM_CV_BASE + ((_channel) * 8)) + +#define FTM_PS_MAX 7 + +#endif From patchwork Wed Mar 6 11:12:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Havelange X-Patchwork-Id: 1052293 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=essensium.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=essensium-com.20150623.gappssmtp.com header.i=@essensium-com.20150623.gappssmtp.com header.b="jQJjtG85"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44Drj22XSTz9sN8 for ; Wed, 6 Mar 2019 22:13:10 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729375AbfCFLNI (ORCPT ); Wed, 6 Mar 2019 06:13:08 -0500 Received: from mail-ed1-f66.google.com ([209.85.208.66]:40700 "EHLO mail-ed1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730355AbfCFLMb (ORCPT ); Wed, 6 Mar 2019 06:12:31 -0500 Received: by mail-ed1-f66.google.com with SMTP id 10so9990733eds.7 for ; Wed, 06 Mar 2019 03:12:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=essensium-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Eb8QqYRrz4udMhES1PQQVcFV8QXyv6ZjH+to8xVEkfQ=; b=jQJjtG85mLXrsJnvSxav5RIgquH5GW9mfXb8hLBzuRXca455TiuI7Y/Nr3GeOos5Ik ECEtC+SqM4DuZ3Or45muV3FFQIe87uNu7VI2U8s3b35xxh7jCtMuifd0yvtxvDlCFWtA xeh7SF39xYl/UIq6C3c0MYtJdvr47+xzywI6fS5GQl8JgY1EGOJOHWeopNUEMOLAFjgL IznuVIOelkZVXy9zQSQNr0fjR/gRghG/0bWHzoYRCBcwslzh2ZKARiWxyHHDikJhHN/0 BVVqz7Huonn6ProZBX5t6Y5W99dCDhwN4doI8SZLIs1mchAlpfHWAp5f+L6HizCNBx6u PNXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Eb8QqYRrz4udMhES1PQQVcFV8QXyv6ZjH+to8xVEkfQ=; b=Mw072GtyjD43cI7S9vUU8MxTKPnj3otJhW/21QBOizwCcUpnhbvl5IvnVRbjW+Tbk1 WWgsLBbIr6SsHh5R+FuMoZV4wzVqpsj8ifsy8T/mu921WYQ8XUCxSuTPpARwg/GEwt1U BMIME9k0WVlMb/v8W3AYZ20/oTyrPcwSHt/sFOkdqotgF+sTgRo8WhPUn/GTMczgw1qj 2jVjEI7C2tSk1IHqnQV6TCzst9TKEZN6i90R6wpfaGHDw73kbMNaGAevsXR33sexFYHb oNefHVEnbh1qzxxbP3Pgi5o1I+f8wcyDLNQ28pGKSHhl8oZbIO6U6zoIoqtWa8AL34rl 6G6w== X-Gm-Message-State: APjAAAW+CGbbMoiGV4a/Sh9rhwRP6naEwhHxV8SVHN4SHBHhbtC+w5QP rUgDbrfcKVTR6nszknYtUiYMNQ== X-Google-Smtp-Source: APXvYqy+UBtAM38g9GKS03KWMHt12mMimEbDT3GdfxQSX/lJLAovXdY1Wl+OiNa9aZbCQqM2Es1/3g== X-Received: by 2002:a05:6402:184f:: with SMTP id v15mr23541935edy.133.1551870750172; Wed, 06 Mar 2019 03:12:30 -0800 (PST) Received: from ph-ThinkPad-E560.local.ess-mail.com (ip-188-118-3-185.reverse.destiny.be. [188.118.3.185]) by smtp.gmail.com with ESMTPSA id t25sm277879ejr.30.2019.03.06.03.12.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 03:12:29 -0800 (PST) From: Patrick Havelange To: William Breathitt Gray , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Jonathan Cameron Cc: Patrick Havelange Subject: [PATCH v2 2/7] drivers/pwm: pwm-fsl-ftm: use common header for FlexTimer #defines Date: Wed, 6 Mar 2019 12:12:03 +0100 Message-Id: <20190306111208.7454-3-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190306111208.7454-1-patrick.havelange@essensium.com> References: <20190306111208.7454-1-patrick.havelange@essensium.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org This also fixes the wrong value for the previously defined FTM_MODE_INIT macro (it was not used). Signed-off-by: Patrick Havelange Reviewed-by: Esben Haabendal --- Changes v2 - None --- drivers/pwm/pwm-fsl-ftm.c | 44 +-------------------------------------- 1 file changed, 1 insertion(+), 43 deletions(-) diff --git a/drivers/pwm/pwm-fsl-ftm.c b/drivers/pwm/pwm-fsl-ftm.c index 883378d055c6..f21ea1b97116 100644 --- a/drivers/pwm/pwm-fsl-ftm.c +++ b/drivers/pwm/pwm-fsl-ftm.c @@ -22,51 +22,9 @@ #include #include #include +#include -#define FTM_SC 0x00 -#define FTM_SC_CLK_MASK_SHIFT 3 -#define FTM_SC_CLK_MASK (3 << FTM_SC_CLK_MASK_SHIFT) #define FTM_SC_CLK(c) (((c) + 1) << FTM_SC_CLK_MASK_SHIFT) -#define FTM_SC_PS_MASK 0x7 - -#define FTM_CNT 0x04 -#define FTM_MOD 0x08 - -#define FTM_CSC_BASE 0x0C -#define FTM_CSC_MSB BIT(5) -#define FTM_CSC_MSA BIT(4) -#define FTM_CSC_ELSB BIT(3) -#define FTM_CSC_ELSA BIT(2) -#define FTM_CSC(_channel) (FTM_CSC_BASE + ((_channel) * 8)) - -#define FTM_CV_BASE 0x10 -#define FTM_CV(_channel) (FTM_CV_BASE + ((_channel) * 8)) - -#define FTM_CNTIN 0x4C -#define FTM_STATUS 0x50 - -#define FTM_MODE 0x54 -#define FTM_MODE_FTMEN BIT(0) -#define FTM_MODE_INIT BIT(2) -#define FTM_MODE_PWMSYNC BIT(3) - -#define FTM_SYNC 0x58 -#define FTM_OUTINIT 0x5C -#define FTM_OUTMASK 0x60 -#define FTM_COMBINE 0x64 -#define FTM_DEADTIME 0x68 -#define FTM_EXTTRIG 0x6C -#define FTM_POL 0x70 -#define FTM_FMS 0x74 -#define FTM_FILTER 0x78 -#define FTM_FLTCTRL 0x7C -#define FTM_QDCTRL 0x80 -#define FTM_CONF 0x84 -#define FTM_FLTPOL 0x88 -#define FTM_SYNCONF 0x8C -#define FTM_INVCTRL 0x90 -#define FTM_SWOCTRL 0x94 -#define FTM_PWMLOAD 0x98 enum fsl_pwm_clk { FSL_PWM_CLK_SYS, From patchwork Wed Mar 6 11:12:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Havelange X-Patchwork-Id: 1052292 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=essensium.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=essensium-com.20150623.gappssmtp.com header.i=@essensium-com.20150623.gappssmtp.com header.b="guHZcbpB"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44Drhz2BfRz9s9N for ; Wed, 6 Mar 2019 22:13:07 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730088AbfCFLNB (ORCPT ); Wed, 6 Mar 2019 06:13:01 -0500 Received: from mail-ed1-f65.google.com ([209.85.208.65]:43220 "EHLO mail-ed1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730359AbfCFLMd (ORCPT ); Wed, 6 Mar 2019 06:12:33 -0500 Received: by mail-ed1-f65.google.com with SMTP id m35so9982020ede.10 for ; Wed, 06 Mar 2019 03:12:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=essensium-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cDSuoyKdNV1HV5DOgGi6pj2N/BJT3JWfpiGnrduNvUU=; b=guHZcbpBM7nvUcaZ6yVNVW194npw7ZDkaCs6IDJ/YAGhiSft9/UWwaATplFk/Y4Hd3 HzYmIYIFBtjWG5uQVqJnl5fA+FH1ft3rBfGfonIraRKRjLPS0b59lUftY0G234rmRPsS 8EfdQtHuSGKEi9SGFEHCekmLSrEaoOVtN9aai5C6VLjLolPid1GfIdXZgfpk7flXPQ7m W2KyD9Mdfji0CuW3VD9R4KTc+8BfIUcpSz6412Ez2P00vw4CUce94ZzCt02NtwpRLOTf AtBsPfLsCzOEod6NYuFJi4rGd2sHbSdqUHiAsSsrb7BXb+ZDTvSSXZeao3IdfCyncFDb KkGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cDSuoyKdNV1HV5DOgGi6pj2N/BJT3JWfpiGnrduNvUU=; b=pDR9usF6n9tlY0Xg/agBKfnjeeEoeSi9ClfjFHcQPsoGdWMjwS8uO7bTiHKufTSNUU Or5IO7YfWhSBs8eOZ9oYp2DiGXaiSdEvw+qUUjRq5zmZ8Ulwp5+60wtfTmKAx6uMv9Ls FqlwU2B9vul3W3beXZbIA2yJT3enn0lNRtJ4qQZN21Q8qMf3DeiRixVg2bSoWXeAdKol EsFJjkC5X80w/liPSuvM+z+HlyTtSjTdNPAqdcBKu9wBqY/2sQIsZjBxPvYY3R4cVupd iG+LpYPCL9trY6Y+rc8bY6YSVeF3UhpHuNMNJu9SKs/0JX6bqOd2MUm1X/zSKRKCnQXo cU7A== X-Gm-Message-State: APjAAAXm40nzfhGc4hLQUsOp8YsJwlRV9Xfz4Cy05wq82uyGuRodCau+ CXFA6sGGiC/UC+ZKxZGw46YM8w== X-Google-Smtp-Source: APXvYqxy3t4cZ+G/kwi2CriFtp5sfmhj9QiM++r4mVpAGkRt16u6ZgmHIwrc9WwxsbWYeGbi/hInpg== X-Received: by 2002:a05:6402:1490:: with SMTP id e16mr22862133edv.201.1551870751292; Wed, 06 Mar 2019 03:12:31 -0800 (PST) Received: from ph-ThinkPad-E560.local.ess-mail.com (ip-188-118-3-185.reverse.destiny.be. [188.118.3.185]) by smtp.gmail.com with ESMTPSA id t25sm277879ejr.30.2019.03.06.03.12.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 03:12:30 -0800 (PST) From: Patrick Havelange To: William Breathitt Gray , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Jonathan Cameron Cc: Patrick Havelange Subject: [PATCH v2 3/7] drivers/clocksource: timer-fsl-ftm: use common header for FlexTimer #defines Date: Wed, 6 Mar 2019 12:12:04 +0100 Message-Id: <20190306111208.7454-4-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190306111208.7454-1-patrick.havelange@essensium.com> References: <20190306111208.7454-1-patrick.havelange@essensium.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Common #defines have been moved to "linux/fsl/ftm.h". Thus making use of this file. Also FTM_SC_CLK_SHIFT has been renamed to FTM_SC_CLK_MASK_SHIFT. Signed-off-by: Patrick Havelange Reviewed-by: Esben Haabendal Acked-by: Daniel Lezcano --- Changes v2 - None --- drivers/clocksource/timer-fsl-ftm.c | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/drivers/clocksource/timer-fsl-ftm.c b/drivers/clocksource/timer-fsl-ftm.c index 846d18daf893..e1c34b2f53a5 100644 --- a/drivers/clocksource/timer-fsl-ftm.c +++ b/drivers/clocksource/timer-fsl-ftm.c @@ -19,20 +19,9 @@ #include #include #include +#include -#define FTM_SC 0x00 -#define FTM_SC_CLK_SHIFT 3 -#define FTM_SC_CLK_MASK (0x3 << FTM_SC_CLK_SHIFT) -#define FTM_SC_CLK(c) ((c) << FTM_SC_CLK_SHIFT) -#define FTM_SC_PS_MASK 0x7 -#define FTM_SC_TOIE BIT(6) -#define FTM_SC_TOF BIT(7) - -#define FTM_CNT 0x04 -#define FTM_MOD 0x08 -#define FTM_CNTIN 0x4C - -#define FTM_PS_MAX 7 +#define FTM_SC_CLK(c) ((c) << FTM_SC_CLK_MASK_SHIFT) struct ftm_clock_device { void __iomem *clksrc_base; From patchwork Wed Mar 6 11:12:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Havelange X-Patchwork-Id: 1052286 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=essensium.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=essensium-com.20150623.gappssmtp.com header.i=@essensium-com.20150623.gappssmtp.com header.b="ohMKKSde"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44DrhM713nz9s9T for ; Wed, 6 Mar 2019 22:12:35 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730383AbfCFLMe (ORCPT ); Wed, 6 Mar 2019 06:12:34 -0500 Received: from mail-ed1-f65.google.com ([209.85.208.65]:40703 "EHLO mail-ed1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730369AbfCFLMe (ORCPT ); Wed, 6 Mar 2019 06:12:34 -0500 Received: by mail-ed1-f65.google.com with SMTP id 10so9990826eds.7 for ; Wed, 06 Mar 2019 03:12:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=essensium-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Ou+uYUfe21KQvShwFfjSgk1lTlPUbyeUE0c8BFU5pzA=; b=ohMKKSdeSm8YddG5u+fHRRu+AsNlEbFGI7ONNyiR6e+siGjEpc8D8UP4Leq3JYTvkX PkPOf4P+oJqBWTlkDXnAONiSnP3/t6muPkybKtqOsHzSw14gP33djGLKMLWZoEAaXKJZ y1tJhqCERXBU4Bhf8JtLBbk4nZS0gT0715vQ84V/qVIX8aQH9x1hjL8zlPlOE6H6+VKb PA4Hc2yaFHkvwyuTxuxmNckb94mxvv0n/BZGGK4YOMaOIS/TbUbq0d6LEUCzAZDNdXOE DmbPWnv0BtkO+QiVVSn04QkWA62rLQkBFkKcIiaiVfe5Vu/tXs4IlyBfIVnZwOtvxtjE EhcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Ou+uYUfe21KQvShwFfjSgk1lTlPUbyeUE0c8BFU5pzA=; b=FqLWTFKSwSdbymsk4Wiq9YfMUGE14qR88IY17Yr79CAr03rb72qdPIVCs4RIOjeOBt fK3F1OXrusx6s/LrbqC+RbKj8sVTbhe3lwgptlfX1qYplzncYxjHGUyf0kI/st7usRY0 eH43EITKRDRSd3vSWdB/a6SrPW7xX31NEVbAFZBnbipeXyvzfhGyruosAV+lOpOvowye hRpZnL+8bXLPdZhepZlD/dXuOViG5NK4PJ4DlEZcmZ+d536/6r9t6o47Nrqt1VOWkKd8 9aWmPu4tzNy3Xb323G0eqyZOxVoRWDJY3gsxHZj9xx6IDYxb4E7d2ICcQpLmdepUoBIe 5aQQ== X-Gm-Message-State: APjAAAVAmhyz+deI9kftlRoYqtpXuj1jgjSTRCwc55Y6IvSd1ptLGezK InXFeyk8i8/GT1O6kfEi9fa9eg== X-Google-Smtp-Source: APXvYqwCCv7csnNhvhQhNOkqqUxyDvM29KCOy6mdzZIMpqluneX2ZReFH8S6i7ABQ32vYSsw29sF1A== X-Received: by 2002:a50:b4db:: with SMTP id x27mr23421357edd.90.1551870752427; Wed, 06 Mar 2019 03:12:32 -0800 (PST) Received: from ph-ThinkPad-E560.local.ess-mail.com (ip-188-118-3-185.reverse.destiny.be. [188.118.3.185]) by smtp.gmail.com with ESMTPSA id t25sm277879ejr.30.2019.03.06.03.12.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 03:12:31 -0800 (PST) From: Patrick Havelange To: William Breathitt Gray , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Jonathan Cameron Cc: Patrick Havelange Subject: [PATCH v2 4/7] dt-bindings: counter: ftm-quaddec Date: Wed, 6 Mar 2019 12:12:05 +0100 Message-Id: <20190306111208.7454-5-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190306111208.7454-1-patrick.havelange@essensium.com> References: <20190306111208.7454-1-patrick.havelange@essensium.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org FlexTimer quadrature decoder driver. Signed-off-by: Patrick Havelange Reviewed-by: Esben Haabendal --- Changes v2 - None --- .../bindings/counter/ftm-quaddec.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 Documentation/devicetree/bindings/counter/ftm-quaddec.txt diff --git a/Documentation/devicetree/bindings/counter/ftm-quaddec.txt b/Documentation/devicetree/bindings/counter/ftm-quaddec.txt new file mode 100644 index 000000000000..4d18cd722074 --- /dev/null +++ b/Documentation/devicetree/bindings/counter/ftm-quaddec.txt @@ -0,0 +1,18 @@ +FlexTimer Quadrature decoder counter + +This driver exposes a simple counter for the quadrature decoder mode. + +Required properties: +- compatible: Must be "fsl,ftm-quaddec". +- reg: Must be set to the memory region of the flextimer. + +Optional property: +- big-endian: Access the device registers in big-endian mode. + +Example: + counter0: counter@29d0000 { + compatible = "fsl,ftm-quaddec"; + reg = <0x0 0x29d0000 0x0 0x10000>; + big-endian; + status = "disabled"; + }; From patchwork Wed Mar 6 11:12:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Havelange X-Patchwork-Id: 1052289 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=essensium.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=essensium-com.20150623.gappssmtp.com header.i=@essensium-com.20150623.gappssmtp.com header.b="Csbse4hB"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44DrhT5mc6z9sN1 for ; Wed, 6 Mar 2019 22:12:41 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730395AbfCFLMj (ORCPT ); Wed, 6 Mar 2019 06:12:39 -0500 Received: from mail-ed1-f67.google.com ([209.85.208.67]:36736 "EHLO mail-ed1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730379AbfCFLMg (ORCPT ); Wed, 6 Mar 2019 06:12:36 -0500 Received: by mail-ed1-f67.google.com with SMTP id g9so9989884eds.3 for ; Wed, 06 Mar 2019 03:12:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=essensium-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yyoTm4Hf7hPGCM6SW9SVNk8GcYqCSFpUaAnswGpqQik=; b=Csbse4hB1J87+XDRKRaj17XpVhghuiKfLc/LqDe9og6h/3IeuvtFgaOh/5laHnPKLY LKV+hCvmbmjjp7fOVqw6Pw2XK45hT1k8Q3AK/e/CjXIWeZQl/dv2axzKOtQCJnr9iluw txmTrcC51r3HjQLqONqczH9eRQ/QuMqehyxOAOvM2HZ61IUacqYR98oFcXaMRMO0M+W5 sx9rC3gn8wd3wuMlcYDfj5pcIeJqNN5t/xAe2Wr2Ugfn4FPFWOajXmWYH+AuQW6tJc8d EU9CRTnDOshU41Mae7PEUWguRBYOFVRanNi2N7jjxufHHlNvZfgjbUkjL0a868rw6G0V D3Jw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yyoTm4Hf7hPGCM6SW9SVNk8GcYqCSFpUaAnswGpqQik=; b=jcC7VVLBDac94EAogI9wWuquoToI0oPx83O4lxULtPO3AKDMGKM4TWnmCadZxfSDuP +RpZA7JfsNnN2QIPe8IIfJ4F7mEfJWfWHMPs4K8M3/UA43vN3p40B1+e1rcbFTLJiIZf brjDU/4Up2JmKuGkE5aqAHy1pcbkpjEb8kjeXDsE3zU66VPf9LR4ZIkavFLAkCRA3Ly5 XniOPrtT9ymhX3LoQce3ZqxZ2QLqMcJ4WSv9MxNEef0J7/wSPt5DAgBa/R30xRFTfCcD ty21CLiIO3ODdXHAikYodXGjIYK/Es/gvMnkX0BCKGYWnvKkCuD2P3Ysiige1XVkLm2I U3tg== X-Gm-Message-State: APjAAAXdxw/6F919DA/GUHIHLiJvT+sekwHdgEbebg+G6k7Sr8lPMQ+f zqWNG2xdm6FF5cLoGt20bBAZ1g== X-Google-Smtp-Source: APXvYqyKy8/8K6LTNKUlFi3ySmfhKFYCBTiNRNxqzwxGllF/4FWs4bWqM920kBHl7dV8+82Q6W/4rg== X-Received: by 2002:a50:ea87:: with SMTP id d7mr23802042edo.21.1551870753607; Wed, 06 Mar 2019 03:12:33 -0800 (PST) Received: from ph-ThinkPad-E560.local.ess-mail.com (ip-188-118-3-185.reverse.destiny.be. [188.118.3.185]) by smtp.gmail.com with ESMTPSA id t25sm277879ejr.30.2019.03.06.03.12.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 03:12:33 -0800 (PST) From: Patrick Havelange To: William Breathitt Gray , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Jonathan Cameron Cc: Patrick Havelange Subject: [PATCH v2 5/7] counter: add FlexTimer Module Quadrature decoder counter driver Date: Wed, 6 Mar 2019 12:12:06 +0100 Message-Id: <20190306111208.7454-6-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190306111208.7454-1-patrick.havelange@essensium.com> References: <20190306111208.7454-1-patrick.havelange@essensium.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org This driver exposes the counter for the quadrature decoder of the FlexTimer Module, present in the LS1021A soc. Signed-off-by: Patrick Havelange Reviewed-by: Jonathan Cameron --- Changes v2 - Rebased on new counter subsystem - Cleaned up included headers - Use devm_ioremap() - Correct order of devm_ and unmanaged resources --- drivers/counter/Kconfig | 9 + drivers/counter/Makefile | 1 + drivers/counter/ftm-quaddec.c | 356 ++++++++++++++++++++++++++++++++++ 3 files changed, 366 insertions(+) create mode 100644 drivers/counter/ftm-quaddec.c diff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig index 87c491a19c63..233ac305d878 100644 --- a/drivers/counter/Kconfig +++ b/drivers/counter/Kconfig @@ -48,4 +48,13 @@ config STM32_LPTIMER_CNT To compile this driver as a module, choose M here: the module will be called stm32-lptimer-cnt. +config FTM_QUADDEC + tristate "Flex Timer Module Quadrature decoder driver" + help + Select this option to enable the Flex Timer Quadrature decoder + driver. + + To compile this driver as a module, choose M here: the + module will be called ftm-quaddec. + endif # COUNTER diff --git a/drivers/counter/Makefile b/drivers/counter/Makefile index 5589976d37f8..0c9e622a6bea 100644 --- a/drivers/counter/Makefile +++ b/drivers/counter/Makefile @@ -7,3 +7,4 @@ obj-$(CONFIG_COUNTER) += counter.o obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o +obj-$(CONFIG_FTM_QUADDEC) += ftm-quaddec.o diff --git a/drivers/counter/ftm-quaddec.c b/drivers/counter/ftm-quaddec.c new file mode 100644 index 000000000000..1bc9e075a386 --- /dev/null +++ b/drivers/counter/ftm-quaddec.c @@ -0,0 +1,356 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Flex Timer Module Quadrature decoder + * + * This module implements a driver for decoding the FTM quadrature + * of ex. a LS1021A + */ + +#include +#include +#include +#include +#include +#include +#include + +struct ftm_quaddec { + struct counter_device counter; + struct platform_device *pdev; + void __iomem *ftm_base; + bool big_endian; + struct mutex ftm_quaddec_mutex; +}; + +static void ftm_read(struct ftm_quaddec *ftm, uint32_t offset, uint32_t *data) +{ + if (ftm->big_endian) + *data = ioread32be(ftm->ftm_base + offset); + else + *data = ioread32(ftm->ftm_base + offset); +} + +static void ftm_write(struct ftm_quaddec *ftm, uint32_t offset, uint32_t data) +{ + if (ftm->big_endian) + iowrite32be(data, ftm->ftm_base + offset); + else + iowrite32(data, ftm->ftm_base + offset); +} + +/* + * take mutex + * call ftm_clear_write_protection + * update settings + * call ftm_set_write_protection + * release mutex + */ +static void ftm_clear_write_protection(struct ftm_quaddec *ftm) +{ + uint32_t flag; + + /* First see if it is enabled */ + ftm_read(ftm, FTM_FMS, &flag); + + if (flag & FTM_FMS_WPEN) { + ftm_read(ftm, FTM_MODE, &flag); + ftm_write(ftm, FTM_MODE, flag | FTM_MODE_WPDIS); + } +} + +static void ftm_set_write_protection(struct ftm_quaddec *ftm) +{ + ftm_write(ftm, FTM_FMS, FTM_FMS_WPEN); +} + +static void ftm_reset_counter(struct ftm_quaddec *ftm) +{ + /* Reset hardware counter to CNTIN */ + ftm_write(ftm, FTM_CNT, 0x0); +} + +static void ftm_quaddec_init(struct ftm_quaddec *ftm) +{ + ftm_clear_write_protection(ftm); + + /* + * Do not write in the region from the CNTIN register through the + * PWMLOAD register when FTMEN = 0. + */ + ftm_write(ftm, FTM_MODE, FTM_MODE_FTMEN); + ftm_write(ftm, FTM_CNTIN, 0x0000); + ftm_write(ftm, FTM_MOD, 0xffff); + ftm_write(ftm, FTM_CNT, 0x0); + ftm_write(ftm, FTM_SC, FTM_SC_PS_1); + + /* Select quad mode */ + ftm_write(ftm, FTM_QDCTRL, FTM_QDCTRL_QUADEN); + + /* Unused features and reset to default section */ + ftm_write(ftm, FTM_POL, 0x0); + ftm_write(ftm, FTM_FLTCTRL, 0x0); + ftm_write(ftm, FTM_SYNCONF, 0x0); + ftm_write(ftm, FTM_SYNC, 0xffff); + + /* Lock the FTM */ + ftm_set_write_protection(ftm); +} + +static void ftm_quaddec_disable(struct ftm_quaddec *ftm) +{ + ftm_write(ftm, FTM_MODE, 0); +} + +static int ftm_quaddec_get_prescaler(struct counter_device *counter, + struct counter_count *count, + size_t *cnt_mode) +{ + struct ftm_quaddec *ftm = counter->priv; + uint32_t scflags; + + ftm_read(ftm, FTM_SC, &scflags); + + *cnt_mode = scflags & FTM_SC_PS_MASK; + + return 0; +} + +static int ftm_quaddec_set_prescaler(struct counter_device *counter, + struct counter_count *count, + size_t cnt_mode) +{ + struct ftm_quaddec *ftm = counter->priv; + + uint32_t scflags; + + mutex_lock(&ftm->ftm_quaddec_mutex); + + ftm_read(ftm, FTM_SC, &scflags); + + scflags &= ~FTM_SC_PS_MASK; + cnt_mode &= FTM_SC_PS_MASK; /*just to be 100% sure*/ + + scflags |= cnt_mode; + + /* Write */ + ftm_clear_write_protection(ftm); + ftm_write(ftm, FTM_SC, scflags); + ftm_set_write_protection(ftm); + + /* Also resets the counter as it is undefined anyway now */ + ftm_reset_counter(ftm); + + mutex_unlock(&ftm->ftm_quaddec_mutex); + return 0; +} + +static const char * const ftm_quaddec_prescaler[] = { + "1", "2", "4", "8", "16", "32", "64", "128" +}; + +static struct counter_count_enum_ext ftm_quaddec_prescaler_enum = { + .items = ftm_quaddec_prescaler, + .num_items = ARRAY_SIZE(ftm_quaddec_prescaler), + .get = ftm_quaddec_get_prescaler, + .set = ftm_quaddec_set_prescaler +}; + +enum ftm_quaddec_synapse_action { + FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES, +}; + +static enum counter_synapse_action ftm_quaddec_synapse_actions[] = { + [FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES] = + COUNTER_SYNAPSE_ACTION_BOTH_EDGES +}; + +enum ftm_quaddec_count_function { + FTM_QUADDEC_COUNT_ENCODER_MODE_1, +}; + +static const enum counter_count_function ftm_quaddec_count_functions[] = { + [FTM_QUADDEC_COUNT_ENCODER_MODE_1] = + COUNTER_COUNT_FUNCTION_QUADRATURE_X4 +}; + +static int ftm_quaddec_count_read(struct counter_device *counter, + struct counter_count *count, + struct counter_count_read_value *val) +{ + struct ftm_quaddec *const ftm = counter->priv; + uint32_t cntval; + + ftm_read(ftm, FTM_CNT, &cntval); + + counter_count_read_value_set(val, COUNTER_COUNT_POSITION, &cntval); + + return 0; +} + +static int ftm_quaddec_count_write(struct counter_device *counter, + struct counter_count *count, + struct counter_count_write_value *val) +{ + struct ftm_quaddec *const ftm = counter->priv; + u32 cnt; + int err; + + err = counter_count_write_value_get(&cnt, COUNTER_COUNT_POSITION, val); + if (err) + return err; + + if (cnt != 0) { + dev_warn(&ftm->pdev->dev, "Can only accept '0' as new counter value\n"); + return -EINVAL; + } + + ftm_reset_counter(ftm); + + return 0; +} + +static int ftm_quaddec_count_function_get(struct counter_device *counter, + struct counter_count *count, + size_t *function) +{ + *function = FTM_QUADDEC_COUNT_ENCODER_MODE_1; + + return 0; +} + +static int ftm_quaddec_action_get(struct counter_device *counter, + struct counter_count *count, + struct counter_synapse *synapse, + size_t *action) +{ + *action = FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES; + + return 0; +} + +static const struct counter_ops ftm_quaddec_cnt_ops = { + .count_read = ftm_quaddec_count_read, + .count_write = ftm_quaddec_count_write, + .function_get = ftm_quaddec_count_function_get, + .action_get = ftm_quaddec_action_get, +}; + +static struct counter_signal ftm_quaddec_signals[] = { + { + .id = 0, + .name = "Channel 1 Quadrature A" + }, + { + .id = 1, + .name = "Channel 1 Quadrature B" + } +}; + +static struct counter_synapse ftm_quaddec_count_synapses[] = { + { + .actions_list = ftm_quaddec_synapse_actions, + .num_actions = ARRAY_SIZE(ftm_quaddec_synapse_actions), + .signal = &ftm_quaddec_signals[0] + }, + { + .actions_list = ftm_quaddec_synapse_actions, + .num_actions = ARRAY_SIZE(ftm_quaddec_synapse_actions), + .signal = &ftm_quaddec_signals[1] + } +}; + +static const struct counter_count_ext ftm_quaddec_count_ext[] = { + COUNTER_COUNT_ENUM("prescaler", &ftm_quaddec_prescaler_enum), + COUNTER_COUNT_ENUM_AVAILABLE("prescaler", &ftm_quaddec_prescaler_enum), +}; + +static struct counter_count ftm_quaddec_counts = { + .id = 0, + .name = "Channel 1 Count", + .functions_list = ftm_quaddec_count_functions, + .num_functions = ARRAY_SIZE(ftm_quaddec_count_functions), + .synapses = ftm_quaddec_count_synapses, + .num_synapses = ARRAY_SIZE(ftm_quaddec_count_synapses), + .ext = ftm_quaddec_count_ext, + .num_ext = ARRAY_SIZE(ftm_quaddec_count_ext) +}; + +static int ftm_quaddec_probe(struct platform_device *pdev) +{ + struct ftm_quaddec *ftm; + + struct device_node *node = pdev->dev.of_node; + struct resource *io; + int ret; + + ftm = devm_kzalloc(&pdev->dev, sizeof(*ftm), GFP_KERNEL); + if (!ftm) + return -ENOMEM; + + platform_set_drvdata(pdev, ftm); + + io = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!io) { + dev_err(&pdev->dev, "Failed to get memory region\n"); + return -ENODEV; + } + + ftm->pdev = pdev; + ftm->big_endian = of_property_read_bool(node, "big-endian"); + ftm->ftm_base = devm_ioremap(&pdev->dev, io->start, resource_size(io)); + + if (!ftm->ftm_base) { + dev_err(&pdev->dev, "Failed to map memory region\n"); + return -EINVAL; + } + ftm->counter.name = dev_name(&pdev->dev); + ftm->counter.parent = &pdev->dev; + ftm->counter.ops = &ftm_quaddec_cnt_ops; + ftm->counter.counts = &ftm_quaddec_counts; + ftm->counter.num_counts = 1; + ftm->counter.signals = ftm_quaddec_signals; + ftm->counter.num_signals = ARRAY_SIZE(ftm_quaddec_signals); + ftm->counter.priv = ftm; + + mutex_init(&ftm->ftm_quaddec_mutex); + + ftm_quaddec_init(ftm); + + ret = counter_register(&ftm->counter); + if (ret) + ftm_quaddec_disable(ftm); + + return ret; +} + +static int ftm_quaddec_remove(struct platform_device *pdev) +{ + struct ftm_quaddec *ftm = platform_get_drvdata(pdev); + + counter_unregister(&ftm->counter); + + ftm_quaddec_disable(ftm); + + return 0; +} + +static const struct of_device_id ftm_quaddec_match[] = { + { .compatible = "fsl,ftm-quaddec" }, + {}, +}; + +static struct platform_driver ftm_quaddec_driver = { + .driver = { + .name = "ftm-quaddec", + .owner = THIS_MODULE, + .of_match_table = ftm_quaddec_match, + }, + .probe = ftm_quaddec_probe, + .remove = ftm_quaddec_remove, +}; + +module_platform_driver(ftm_quaddec_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Kjeld Flarup X-Patchwork-Id: 1052291 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=essensium.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=essensium-com.20150623.gappssmtp.com header.i=@essensium-com.20150623.gappssmtp.com header.b="y9p1pYFh"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44Drhm6r9Bz9sBF for ; Wed, 6 Mar 2019 22:12:56 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730449AbfCFLMv (ORCPT ); Wed, 6 Mar 2019 06:12:51 -0500 Received: from mail-ed1-f66.google.com ([209.85.208.66]:37343 "EHLO mail-ed1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730386AbfCFLMg (ORCPT ); Wed, 6 Mar 2019 06:12:36 -0500 Received: by mail-ed1-f66.google.com with SMTP id m12so10001131edv.4 for ; Wed, 06 Mar 2019 03:12:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=essensium-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OLBy4rUf+vwVDyhcvFboGzgSFexgJ/70lYXQZKoXH4k=; b=y9p1pYFhwEaq3LqfnJdglnV1zJAJ4xGkgGq5wzbEgT1+UkuRR6t4d5J3WPn8HqGMSY LKi0iJ3wlMM8qvq6tbSqQjkM8liBb9EraZim9KPvz6z1MyOTksQdZl6LRNY3XWlDB0Nu ss3KYheIT+W7gPiW4ARMo8a+V75DTmziu24wb9EquUd/XPUwZYo0MN8tlGObQsmqzK/S qhDhJAuR+zIZuJJ8VnJjBuN99Uyl3UYfmfuNIVYAq8uj+VSA90b55HN3m7l8EEzb8R3Q YDAScUlPWi8ZsYWtJBubDhE9YaeOTRspZT66yRyN/enuoFsaI2xkrhyTDtE1sODjDAOy RWUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OLBy4rUf+vwVDyhcvFboGzgSFexgJ/70lYXQZKoXH4k=; b=jtrlxiPqdeNcywuA0RS0PJK1l9mKPX59s+2RzbGVG9lpFUscuv97Ao6kpzCu9UmDnd MWNYsO8jPV2JTCHrTc3urLCJFRZob+fP04s+6MYHsBtw628GzE0RhByBkxDmSnLJDveb Q/hPB3oem+unkNrNUDBSoDY/fgX37dYQc9NS2eBXQwS+Q3MIlKuSRNsw7OcxvSO/1aan lFQi0lfXx1NrU20pZMD7CQ0NlY3JQv2Gr3iG9qO0oJ613Tq0UdLmj7RF5HPNnuKVqaAA SNfWymC8zXOrsy3zRnb6Kc19EM9zyS85w4lRsqKaF8NspC7irM440tv3XNvLG8zGujQx c8gQ== X-Gm-Message-State: APjAAAU8eU39TJg65geUnGGE43Mdm/uXQi3HulDPAc+fKZKr1xHFLijd wWPyHEqhulfQwFJkf0dT9feELA== X-Google-Smtp-Source: APXvYqwxJtV24srsDX56efa9N1UEgqc1JG9cFSnmXyVxIL2iePPXuuVUOXdmtG/8E3Ku/SVZz0q+8A== X-Received: by 2002:a50:a2a6:: with SMTP id 35mr22337546edm.227.1551870754602; Wed, 06 Mar 2019 03:12:34 -0800 (PST) Received: from ph-ThinkPad-E560.local.ess-mail.com (ip-188-118-3-185.reverse.destiny.be. [188.118.3.185]) by smtp.gmail.com with ESMTPSA id t25sm277879ejr.30.2019.03.06.03.12.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 03:12:34 -0800 (PST) From: Patrick Havelange To: William Breathitt Gray , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Jonathan Cameron Cc: Patrick Havelange Subject: [PATCH v2 6/7] counter: ftm-quaddec: Documentation: Add specific counter sysfs documentation Date: Wed, 6 Mar 2019 12:12:07 +0100 Message-Id: <20190306111208.7454-7-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190306111208.7454-1-patrick.havelange@essensium.com> References: <20190306111208.7454-1-patrick.havelange@essensium.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org This adds documentation for the specific prescaler entry. Signed-off-by: Patrick Havelange --- Changes v2 - Add doc for prescaler entry --- .../ABI/testing/sysfs-bus-counter-ftm-quaddec | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-counter-ftm-quaddec diff --git a/Documentation/ABI/testing/sysfs-bus-counter-ftm-quaddec b/Documentation/ABI/testing/sysfs-bus-counter-ftm-quaddec new file mode 100644 index 000000000000..2da629d6d485 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-counter-ftm-quaddec @@ -0,0 +1,16 @@ +What: /sys/bus/counter/devices/counterX/countY/prescaler_available +KernelVersion: 5.1 +Contact: linux-iio@vger.kernel.org +Description: + Discrete set of available values for the respective Count Y + configuration are listed in this file. Values are delimited by + newline characters. + +What: /sys/bus/counter/devices/counterX/countY/prescaler +KernelVersion: 5.1 +Contact: linux-iio@vger.kernel.org +Description: + Configure the prescaler value associated with Count Y. + On the FlexTimer, the counter clock source passes through a + prescaler that is a 7-bit counter. This acts like a clock + divider. From patchwork Wed Mar 6 11:12:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Havelange X-Patchwork-Id: 1052288 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=essensium.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=essensium-com.20150623.gappssmtp.com header.i=@essensium-com.20150623.gappssmtp.com header.b="B2QkguN+"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44DrhS5Rz2z9s9N for ; Wed, 6 Mar 2019 22:12:40 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730404AbfCFLMh (ORCPT ); Wed, 6 Mar 2019 06:12:37 -0500 Received: from mail-ed1-f66.google.com ([209.85.208.66]:36738 "EHLO mail-ed1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730394AbfCFLMh (ORCPT ); Wed, 6 Mar 2019 06:12:37 -0500 Received: by mail-ed1-f66.google.com with SMTP id g9so9989951eds.3 for ; Wed, 06 Mar 2019 03:12:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=essensium-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fBsJhgoGrFCnj+gqRWXLatgkoJvBbncuK8fMCwiAQ1o=; b=B2QkguN+LbzrcAwzI7m0frGmtI8TB6PVamnZR6METHHol5sq0ydKlyInzcbgJv/MrG fg2lt2msy/ap/hiVbl/VNkID3cTlvpPPoaLf6jWe0Dd+Sk2gynMYZTrU6bZr11A+pT+j OUtC0FcvP9iiqbwOS22aN5fn8PxXuJEBJrj0JMamWLZM3O2w0gfkb5Rz4QLgyMq8B6/S CKTCO/xiihyvUTE4ppXewgh+525H/1il+IeFz/+P1dE84S0vwXbgY2tp4VKZTmyyB9eE 7CyQ/W2x9+ecIJ8J9MJ7nI7dB7CL/OWLHvx+F8ymntH7WxN0nEJztamnumjRGLcGnlyn ldlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fBsJhgoGrFCnj+gqRWXLatgkoJvBbncuK8fMCwiAQ1o=; b=tOdBJvsuWK7vztW6xSfn/OdPm49B+euApUlA5N/wUa9WJyYNi9YKmItfq/DgfMcXiw H6NU4wzodEUAQF1K31wHcEZO4ufetqeo7kpMdcYyZOFocYEVOFSgV8wMx6+FVhwIcPbu BrDqD4r5jhHbaRj7daMVoZDx7Ip3TqeHRcYks2Ky65s7dqC79MpQbN6jPlnziVCLjkEz OiyUERgQEcUAD+ys+IuwJ6nEgeRwqYJwXvV+gKr+b+CSH2KenP+xYaaMtLB3IxWOBocJ F3hsrZKTRIdNlDv3TDkiZFC+nprnbrvUiaC08qtaxxV+GnmPfkeO1cCpCAnVpMecLJWb beEw== X-Gm-Message-State: APjAAAUBOmAc4iJpNPfspb8IpnQJqe0nAhWensfzCqob7SIKox/1gUFG JQdQyHUzxP21e1IvfCtmzTKpBQ== X-Google-Smtp-Source: APXvYqyFXAXiCVWXtNAgaIj9RlYtrBEiJ3my+vfuQMRu/79RRgCn9B5KvgVZYlKL83oTfcThvrzD7g== X-Received: by 2002:a50:ed8c:: with SMTP id h12mr22261726edr.128.1551870755623; Wed, 06 Mar 2019 03:12:35 -0800 (PST) Received: from ph-ThinkPad-E560.local.ess-mail.com (ip-188-118-3-185.reverse.destiny.be. [188.118.3.185]) by smtp.gmail.com with ESMTPSA id t25sm277879ejr.30.2019.03.06.03.12.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Mar 2019 03:12:35 -0800 (PST) From: Patrick Havelange To: William Breathitt Gray , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Jonathan Cameron Cc: Patrick Havelange Subject: [PATCH v2 7/7] LS1021A: dtsi: add ftm quad decoder entries Date: Wed, 6 Mar 2019 12:12:08 +0100 Message-Id: <20190306111208.7454-8-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190306111208.7454-1-patrick.havelange@essensium.com> References: <20190306111208.7454-1-patrick.havelange@essensium.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Add the 4 Quadrature counters for this board. Signed-off-by: Patrick Havelange Reviewed-by: Esben Haabendal --- Changes v2 - None --- arch/arm/boot/dts/ls1021a.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index ed0941292172..0168fb62590a 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -433,6 +433,34 @@ status = "disabled"; }; + counter0: counter@29d0000 { + compatible = "fsl,ftm-quaddec"; + reg = <0x0 0x29d0000 0x0 0x10000>; + big-endian; + status = "disabled"; + }; + + counter1: counter@29e0000 { + compatible = "fsl,ftm-quaddec"; + reg = <0x0 0x29e0000 0x0 0x10000>; + big-endian; + status = "disabled"; + }; + + counter2: counter@29f0000 { + compatible = "fsl,ftm-quaddec"; + reg = <0x0 0x29f0000 0x0 0x10000>; + big-endian; + status = "disabled"; + }; + + counter3: counter@2a00000 { + compatible = "fsl,ftm-quaddec"; + reg = <0x0 0x2a00000 0x0 0x10000>; + big-endian; + status = "disabled"; + }; + gpio0: gpio@2300000 { compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2300000 0x0 0x10000>;