From patchwork Fri Feb 15 00:16:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 1042538 X-Patchwork-Delegate: yamada.m@jp.panasonic.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=socionext.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nifty.com header.i=@nifty.com header.b="c6hPnmsp"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 440v2g4cGcz9s5c for ; Fri, 15 Feb 2019 11:16:59 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 5926EC21F3E; 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t=1550189777; bh=Ht6ym7pOqX2uqJBaqX2hRqo4X8XHHD0t+W8VUzbVxuM=; h=From:To:Cc:Subject:Date:From; b=c6hPnmspPfpwj+p1aKP87j7dju9vdsgPhRp8c/QC4mHqOmD+ngCvnb7ET7DR1y6Ui C0Kxr+hGnyaQW6J8JzQRZ/kqrYe7azI0Wq/u4DwpRXR2+bHPLrQNFWMXrLKo3k186B k79izN68M15WiIeWIW49F8rNIt/kwoePkkM1LI9Q2NQL68adl/vFHXe/QiXtRV/48Z y3y8is3hQj87uWkJP0X+VMejmPrHQPuQZnKORZwy/nj7l5JF2Ago/kBJYjj7lJaUaQ 8OIrp12/mJOhKUQjDD6sr7ISW2Bt0Xs/4jaGUA8Fb1F/daRdbbvigo2VpT8G1X1MEK ofov28RJyuKtQ== X-Nifty-SrcIP: [218.220.227.105] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Fri, 15 Feb 2019 09:16:15 +0900 Message-Id: <1550189775-15950-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Cc: Tom Rini Subject: [U-Boot] [PATCH] ARM: dts: uniphier: sync with Linux 5.0-rc2 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ld20.dtsi | 11 ++++------- arch/arm/dts/uniphier-ld4.dtsi | 14 ++++++++++++++ arch/arm/dts/uniphier-pro4.dtsi | 16 ++++++++++++++++ arch/arm/dts/uniphier-pxs2.dtsi | 6 ++++-- arch/arm/dts/uniphier-sld8.dtsi | 14 ++++++++++++++ 5 files changed, 52 insertions(+), 9 deletions(-) diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index b9ed613..a411f4a 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -206,13 +206,10 @@ cooling-maps { map0 { trip = <&cpu_alert>; - cooling-device = <&cpu0 - THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - map1 { - trip = <&cpu_alert>; - cooling-device = <&cpu2 - THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi index b73d594..c2706ce 100644 --- a/arch/arm/dts/uniphier-ld4.dtsi +++ b/arch/arm/dts/uniphier-ld4.dtsi @@ -235,6 +235,16 @@ }; }; + dmac: dma-controller@5a000000 { + compatible = "socionext,uniphier-mio-dmac"; + reg = <0x5a000000 0x1000>; + interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, + <0 71 4>, <0 72 4>, <0 73 4>; + clocks = <&mio_clk 7>; + resets = <&mio_rst 7>; + #dma-cells = <1>; + }; + sd: sdhc@5a400000 { compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; @@ -246,6 +256,8 @@ clocks = <&mio_clk 0>; reset-names = "host", "bridge"; resets = <&mio_rst 0>, <&mio_rst 3>; + dma-names = "rx-tx"; + dmas = <&dmac 4>; bus-width = <4>; cap-sd-highspeed; sd-uhs-sdr12; @@ -263,6 +275,8 @@ clocks = <&mio_clk 1>; reset-names = "host", "bridge", "hw"; resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>; + dma-names = "rx-tx"; + dmas = <&dmac 6>; bus-width = <8>; cap-mmc-highspeed; cap-mmc-hw-reset; diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index ef34208..d090fc7 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -269,6 +269,16 @@ }; }; + dmac: dma-controller@5a000000 { + compatible = "socionext,uniphier-mio-dmac"; + reg = <0x5a000000 0x1000>; + interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, + <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>; + clocks = <&mio_clk 7>; + resets = <&mio_rst 7>; + #dma-cells = <1>; + }; + sd: sdhc@5a400000 { compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; @@ -280,6 +290,8 @@ clocks = <&mio_clk 0>; reset-names = "host", "bridge"; resets = <&mio_rst 0>, <&mio_rst 3>; + dma-names = "rx-tx"; + dmas = <&dmac 4>; bus-width = <4>; cap-sd-highspeed; sd-uhs-sdr12; @@ -297,6 +309,8 @@ clocks = <&mio_clk 1>; reset-names = "host", "bridge", "hw"; resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>; + dma-names = "rx-tx"; + dmas = <&dmac 5>; bus-width = <8>; cap-mmc-highspeed; cap-mmc-hw-reset; @@ -313,6 +327,8 @@ clocks = <&mio_clk 2>; reset-names = "host", "bridge"; resets = <&mio_rst 2>, <&mio_rst 5>; + dma-names = "rx-tx"; + dmas = <&dmac 6>; bus-width = <4>; cap-sd-highspeed; }; diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index fa25ffd..4e11e85 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -141,8 +141,10 @@ cooling-maps { map { trip = <&cpu_alert>; - cooling-device = <&cpu0 - THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi index f7fcf6b..efce027 100644 --- a/arch/arm/dts/uniphier-sld8.dtsi +++ b/arch/arm/dts/uniphier-sld8.dtsi @@ -239,6 +239,16 @@ }; }; + dmac: dma-controller@5a000000 { + compatible = "socionext,uniphier-mio-dmac"; + reg = <0x5a000000 0x1000>; + interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, + <0 71 4>, <0 72 4>, <0 73 4>; + clocks = <&mio_clk 7>; + resets = <&mio_rst 7>; + #dma-cells = <1>; + }; + sd: sdhc@5a400000 { compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; @@ -250,6 +260,8 @@ clocks = <&mio_clk 0>; reset-names = "host", "bridge"; resets = <&mio_rst 0>, <&mio_rst 3>; + dma-names = "rx-tx"; + dmas = <&dmac 4>; bus-width = <4>; cap-sd-highspeed; sd-uhs-sdr12; @@ -267,6 +279,8 @@ clocks = <&mio_clk 1>; reset-names = "host", "bridge", "hw"; resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>; + dma-names = "rx-tx"; + dmas = <&dmac 6>; bus-width = <8>; cap-mmc-highspeed; cap-mmc-hw-reset;