From patchwork Tue Feb 12 09:49:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Othacehe X-Patchwork-Id: 1040480 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="GsWID0/D"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43zHtn42dxz9s3l for ; Tue, 12 Feb 2019 20:49:37 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727733AbfBLJtg (ORCPT ); Tue, 12 Feb 2019 04:49:36 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:37011 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727331AbfBLJtg (ORCPT ); Tue, 12 Feb 2019 04:49:36 -0500 Received: by mail-wr1-f66.google.com with SMTP id c8so1927148wrs.4; Tue, 12 Feb 2019 01:49:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=wbtkp/xOVLLMu3e3atJBIkAN4nQ6EEguRtKAqi9HMs8=; b=GsWID0/DxCzdY3qzyw0efFatvgqchc63zqCWm6CQ0E5sQ6b5v+OjDzKRvCGlZe6wsm Ntt8X+JXUmvsVoDC4WENd8yNBqzHQGRwKOPfrA8o33tZ73JppQxt2ovMEIJxx0heWUQk 4dhV2Bx7FXZiJNB7bB0QRSK1cpUGAjur0+TtqHYcL3ZprPthobr0sUm9PcvXrcH+u8fT ZFkgh+UvnvI/w3oHwTlvKSnPjZS4zPEOM4SFP9I+M9pZ+NGgMxJxU/bL6fPeotANH997 8bi5fg+sMBZwiElym4M7HxbrfJXUiaQ/1z7GwfobuDmZMTqv4LsWbhriP4XuTjfrohzH 2hpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=wbtkp/xOVLLMu3e3atJBIkAN4nQ6EEguRtKAqi9HMs8=; b=jlbN+hpazQc5qr/ar/MUyvGZ3FSM4xNXZ3mhpGipYNlGgjYUfvJvHRnoXPWeG35Nl5 BR4C72O3lJXx6+gUUoQW6VM3NUfv+k2Ldtg0cjm4tG6x71HdtNGo2sHQaDQ+O9RtNv14 2IUaKnueECjIVRwBiAaevAVxVVYSbOwSUvzlpyl4C4o1Zv16YZOR+07c8qORPQjik3Y7 3Eu2+QZw9Q334wHqMn+fRl9EHZFntU6Qv/I4oVKO7f1G4B/X/Xg6cKjp+zl1JFOzANly 0Ap1DtvUQQxdC/uDRy2xU/K5ByXvH/7RqLJN9uvQyt78+H2tLzQXFJfnZNSdz+EAqB61 uvKg== X-Gm-Message-State: AHQUAubd8N6CvWPsNreTmsd2KrlRbZFWjjt4CCQJKyBl+VF11Xduc6qY jY4ijlnDQKPrYKRgCNSJPIsLqig+GNM= X-Google-Smtp-Source: AHgI3IarAXnp6wJnCi/YMfSsrJDgekKCOterDokx/85vZCkPwqG1Qvk61s1AdJSB8CkzbLeWWloZjA== X-Received: by 2002:adf:f487:: with SMTP id l7mr2114640wro.86.1549964973364; Tue, 12 Feb 2019 01:49:33 -0800 (PST) Received: from fuji.Parrot.Biz (smtp.parrot.biz. [62.23.167.188]) by smtp.gmail.com with ESMTPSA id d2sm9299843wrs.97.2019.02.12.01.49.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 12 Feb 2019 01:49:32 -0800 (PST) From: Mathieu Othacehe To: thierry.reding@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mathieu Othacehe Subject: [PATCH 1/2] dt-bindings: pwm: hibvt: Add hi3559v100 support Date: Tue, 12 Feb 2019 10:49:26 +0100 Message-Id: <20190212094927.5900-1-m.othacehe@gmail.com> X-Mailer: git-send-email 2.17.1 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Add support for hi3559v100-shub-pwm and hisilicon,hi3559v100-pwm platforms. Signed-off-by: Mathieu Othacehe --- Documentation/devicetree/bindings/pwm/pwm-hibvt.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt b/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt index fa7849d67836..daedfef09bb6 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt @@ -5,6 +5,8 @@ Required properties: The SoC specific strings supported including: "hisilicon,hi3516cv300-pwm" "hisilicon,hi3519v100-pwm" + "hisilicon,hi3559v100-shub-pwm" + "hisilicon,hi3559v100-pwm - reg: physical base address and length of the controller's registers. - clocks: phandle and clock specifier of the PWM reference clock. - resets: phandle and reset specifier for the PWM controller reset. From patchwork Tue Feb 12 09:49:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Othacehe X-Patchwork-Id: 1040481 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="bbuvdiXo"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43zHty2tCbz9s3l for ; Tue, 12 Feb 2019 20:49:46 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728335AbfBLJti (ORCPT ); Tue, 12 Feb 2019 04:49:38 -0500 Received: from mail-wm1-f66.google.com ([209.85.128.66]:35367 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727600AbfBLJth (ORCPT ); Tue, 12 Feb 2019 04:49:37 -0500 Received: by mail-wm1-f66.google.com with SMTP id t200so2285689wmt.0; Tue, 12 Feb 2019 01:49:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uqe/TFtTZ0ij7Yuis+KAoIHGt2xbd1SMI4ZKNHTGhLs=; b=bbuvdiXoO4qmGCB1F9eX2x0tME1+jJWavdYsDdC2ih2RxgKpPgtkjifbNWs5OZKz5g zxEOfzsZRFfCxF11PwdOtl/crKgm2Hyu4CbCef9X0XlfSbof5AX31DH2o2HF5zGYqMHv I3GRc1XsGMmTY3ndcvOl6KSC/IZeNTaqUt2FlatjoB9ebmSmwWiv+5GC7EFSWpTN46VH FBIARHL163sGayAMJpI4AiMhraJIvYcii+3AVFtPArd/TVW4PGxrPiY7vyc+h4MT3R2w cBT83v4GhiqYRWzJxQQHLoz9XiGmW9ctHqBBikM40P3xux/y7d3P5R2ZXu3pnLy3wggO Y+uQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uqe/TFtTZ0ij7Yuis+KAoIHGt2xbd1SMI4ZKNHTGhLs=; b=brnxa6woTWEgpXNbsM/C1wA+Kkg5efxYZ4xQBlGeIwMyJlQRO1rL4jJSvuRDCxybTW 1j+/zqm2f8jdUM/9fKInpBoMS1usGqSTBeqzIzvpRuI4lv9Omqd2V9ekYDAaI0jSEVYI OXt8N5YjEnU/AhnCTEVvkwLe0F0CJtz0g6IDFgG3BoVaw5enILWXV2g7DreJfJBA+NXP /4d25sXUt6kiashoiAm91uN28yNoHutDWNNr3zTOSlRLMWUuBpwEJDsmenYLn9CnNvfb NSpVIioTUbU5u6gO/G+eaHaMWZrgqNc9arrNZOsXT/TFF46+rzDlGV09vUz6nBjH6OhP P+ww== X-Gm-Message-State: AHQUAuaDJ3qfWZF2L0iV6wD7WZUsiQUxsxaJ1XO2AzTExE1pf4YCFlcx ZanMgTCOV6zc1Tuq7XZutSAHcDQVP1E= X-Google-Smtp-Source: AHgI3IblHVRXcMnVWn+hkF424TDLgbbXXf7vx3xOyKihoESrAq2HygoB15m9Q9NNtBBIpLOPnhWJLQ== X-Received: by 2002:a7b:c7c2:: with SMTP id z2mr2055796wmk.47.1549964974696; Tue, 12 Feb 2019 01:49:34 -0800 (PST) Received: from fuji.Parrot.Biz (smtp.parrot.biz. [62.23.167.188]) by smtp.gmail.com with ESMTPSA id d2sm9299843wrs.97.2019.02.12.01.49.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 12 Feb 2019 01:49:33 -0800 (PST) From: Mathieu Othacehe To: thierry.reding@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mathieu Othacehe Subject: [PATCH 2/2] pwm: hibvt: Add hi3559v100 support Date: Tue, 12 Feb 2019 10:49:27 +0100 Message-Id: <20190212094927.5900-2-m.othacehe@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190212094927.5900-1-m.othacehe@gmail.com> References: <20190212094927.5900-1-m.othacehe@gmail.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Add support for hi3559v100-shub-pwm and hisilicon,hi3559v100-pwm platforms. They require a special quirk: pwm has to be enabled again to force duty_cycle refresh. Signed-off-by: Mathieu Othacehe --- drivers/pwm/pwm-hibvt.c | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/pwm/pwm-hibvt.c b/drivers/pwm/pwm-hibvt.c index 27c107e78d59..bf33aa24433c 100644 --- a/drivers/pwm/pwm-hibvt.c +++ b/drivers/pwm/pwm-hibvt.c @@ -49,6 +49,7 @@ struct hibvt_pwm_chip { struct clk *clk; void __iomem *base; struct reset_control *rstc; + bool quirk_force_enable; }; struct hibvt_pwm_soc { @@ -56,6 +57,7 @@ struct hibvt_pwm_soc { }; static const struct hibvt_pwm_soc pwm_soc[2] = { + { .num_pwms = 2 }, { .num_pwms = 4 }, { .num_pwms = 8 }, }; @@ -148,13 +150,19 @@ static void hibvt_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, static int hibvt_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, struct pwm_state *state) { + struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip); + if (state->polarity != pwm->state.polarity) hibvt_pwm_set_polarity(chip, pwm, state->polarity); if (state->period != pwm->state.period || - state->duty_cycle != pwm->state.duty_cycle) + state->duty_cycle != pwm->state.duty_cycle) { hibvt_pwm_config(chip, pwm, state->duty_cycle, state->period); + if (hi_pwm_chip->quirk_force_enable && state->enabled) + hibvt_pwm_enable(chip, pwm); + } + if (state->enabled != pwm->state.enabled) { if (state->enabled) hibvt_pwm_enable(chip, pwm); @@ -176,6 +184,7 @@ static int hibvt_pwm_probe(struct platform_device *pdev) { const struct hibvt_pwm_soc *soc = of_device_get_match_data(&pdev->dev); + struct device_node *np = pdev->dev.of_node; struct hibvt_pwm_chip *pwm_chip; struct resource *res; int ret; @@ -199,6 +208,15 @@ static int hibvt_pwm_probe(struct platform_device *pdev) pwm_chip->chip.of_xlate = of_pwm_xlate_with_flags; pwm_chip->chip.of_pwm_n_cells = 3; + /* + * On those platforms, it is required to enable the + * pwm again each time we want to refresh the duty + * cycle. + */ + if (of_device_is_compatible(np, "hisilicon,hi3559v100-shub-pwm") || + of_device_is_compatible(np, "hisilicon,hi3559v100-pwm")) + pwm_chip->quirk_force_enable = true; + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); pwm_chip->base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(pwm_chip->base)) @@ -250,8 +268,10 @@ static int hibvt_pwm_remove(struct platform_device *pdev) } static const struct of_device_id hibvt_pwm_of_match[] = { - { .compatible = "hisilicon,hi3516cv300-pwm", .data = &pwm_soc[0] }, - { .compatible = "hisilicon,hi3519v100-pwm", .data = &pwm_soc[1] }, + { .compatible = "hisilicon,hi3516cv300-pwm", .data = &pwm_soc[1] }, + { .compatible = "hisilicon,hi3519v100-pwm", .data = &pwm_soc[2] }, + { .compatible = "hisilicon,hi3559v100-shub-pwm", .data = &pwm_soc[2] }, + { .compatible = "hisilicon,hi3559v100-pwm", .data = &pwm_soc[0] }, { } }; MODULE_DEVICE_TABLE(of, hibvt_pwm_of_match);