From patchwork Wed Feb 6 08:09:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1037359 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="PXuZpr2N"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43vYyZ22kBz9s7T for ; Wed, 6 Feb 2019 19:09:57 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727710AbfBFIJw (ORCPT ); Wed, 6 Feb 2019 03:09:52 -0500 Received: from mail-lj1-f195.google.com ([209.85.208.195]:41360 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726835AbfBFIJw (ORCPT ); Wed, 6 Feb 2019 03:09:52 -0500 Received: by mail-lj1-f195.google.com with SMTP id j1-v6so1272259lja.8 for ; Wed, 06 Feb 2019 00:09:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:from:date:message-id:subject:to:cc; bh=gOX1SsouACCPf08YjbmYPW5UOhkdAMvK3qlQKiv1d90=; b=PXuZpr2NmwOfv77mOyOxxwUFls8tIM9qlDFd33QHru6dsHhKGLDahUyJQ8X1N5fq40 RoK9TTamwmReup4UWa8JjXQO1PKNEisiWbxklTxWoxlNxF3zmXV0WWYgstMedpJpJ8Ce K2utHPc15FwEaXNCSFWkbg/t/CJmlumVyMsbGnTPs6qdw7gMZcFtZqF73aT+mtlpqq6C NTyhXTixxRJv7RdEWS0vH2dp8TYxoRH6+dmJaipmBQholV8IRflC/gEonAfHBmiyEB7Z DfCqvjNNqZYitHjuzc8TaicP7YOKdqZzMuoXZYmAIFbBAZosKNqui/B5vLtJxCU1o57K UIZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to:cc; bh=gOX1SsouACCPf08YjbmYPW5UOhkdAMvK3qlQKiv1d90=; b=EJIS3/+rFVxeK3pj1/qxkMLmN7/d+C9di+014JB3pnTlcki6XGgZXr8PHNbp8hl+OZ in+XA4oke01+GmbLM2f4pr2InFexXMvinp5KvmUoKF3TAulev6EpQ8nZ2VTTeDDUBjst dKu/qYHJwUgpCrVLXZGH3OiJW3p1n57J+KF6G96AHLjUcYaSyzO7URnyp1eJj8Ntiw7g fGPAN8XISnNg/dNDSjexmEdEwB1NrWl0ZfhnOnNFM/dFUhdznAqiuRcrZzmpooJ4clxn xOVR/Ze02NKIdFIN3zXlgVQCHGzqvvsxQ8V6OFPtOqQAN5nOZyWSTLsHokx04ioQP19t /QUw== X-Gm-Message-State: AHQUAuYxVeiRKS/wC2CUiA5xYIlmwaNDUUi1VEcYSWJxmoqNcXUi10T/ Zob/Rtt84gk4/X3Ga7p+TvO1G4TfDVZKwrC+k5tWEw== X-Google-Smtp-Source: AHgI3IbCEkzbE7L0yrWtheCdQ4b0VGN5aeom4hRfjJXymqlyIgCDas/3KlJ2Rh0fwM9+2iVIkOEX3zA9sLqWHP1aFGk= X-Received: by 2002:a2e:9356:: with SMTP id m22-v6mr5576392ljh.135.1549440590149; Wed, 06 Feb 2019 00:09:50 -0800 (PST) MIME-Version: 1.0 From: Linus Walleij Date: Wed, 6 Feb 2019 09:09:39 +0100 Message-ID: Subject: [GIT PULL] pin control fixes for v5.0-rc To: Linus Torvalds Cc: "open list:GPIO SUBSYSTEM" , linux-kernel , Ryder Lee , Dmitry Torokhov , Jason Kridner , Chen-Yu Tsai Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hi Linus, here are some overdue pin control fixes for the v5.0 series. Was too busy to send them until now. Please pull them in! Yours, Linus Walleij The following changes since commit bfeffd155283772bbe78c6a05dec7c0128ee500c: Linux 5.0-rc1 (2019-01-06 17:08:20 -0800) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git tags/pinctrl-v5.0-2 for you to fetch changes up to 10098709b4ee6f6f19f25ba81d9c6f83518c584c: pinctrl: sunxi: Correct number of IRQ banks on H6 main pin controller (2019-01-22 10:52:39 +0100) ---------------------------------------------------------------- Pin control fixes for the v5.0 series: - Mediatek Kconfig fix - Sunxi regulator, IRQ banks and pin base fixup - Intel Cherryview Strago DMI workaround - Potential regmap problem on mcp23s08 ---------------------------------------------------------------- Chen-Yu Tsai (3): pinctrl: sunxi: Fix and simplify pin bank regulator handling pinctrl: sunxi: Consider pin_base when calculating regulator array index pinctrl: sunxi: Correct number of IRQ banks on H6 main pin controller Dmitry Torokhov (1): pinctrl: cherryview: fix Strago DMI workaround Jason Kridner (1): pinctrl: mcp23s08: spi: Fix regmap allocation for mcp23s18 Ryder Lee (1): pinctrl: mediatek: fix Kconfig build errors for moore core drivers/pinctrl/intel/pinctrl-cherryview.c | 8 +++--- drivers/pinctrl/mediatek/Kconfig | 3 ++ drivers/pinctrl/pinctrl-mcp23s08.c | 7 ++++- drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 2 +- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 44 +++++++++++++++--------------- drivers/pinctrl/sunxi/pinctrl-sunxi.h | 2 +- 6 files changed, 37 insertions(+), 29 deletions(-)