From patchwork Fri Jan 25 11:30:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 1031015 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="MIuUDY9u"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43mGzJ1XvPz9s9h for ; Fri, 25 Jan 2019 22:30:19 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726256AbfAYLaS (ORCPT ); Fri, 25 Jan 2019 06:30:18 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:34824 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726049AbfAYLaS (ORCPT ); Fri, 25 Jan 2019 06:30:18 -0500 Received: by mail-wr1-f65.google.com with SMTP id 96so9939524wrb.2; Fri, 25 Jan 2019 03:30:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Cni3YG26TUwTwn0/m/XP6xKVhkAi6RTA9FiGH4/p6co=; b=MIuUDY9uOKx7OMT9UzYZeUU5ybjdNCSeISFo7H2Jpjrlkj9q1mM3rsckl/yMWSY4Ys rCEk5P7E/EQi3GCyR8h71klsoPmwQin7tVmGY8V/hWI6FUG5M1nBxufqxjKxxAD5A6fJ DOGg2J/LsvVlBoFpNdjBwQdK2E7PUhbCizhct/kIQYpeKLk0oQ4qM/3cySQ08GVkFOvt jewV5jH4hKc/7i5wUalp94DRz9dvqteVtuaxkZvm0voN/PUooEW2OjlNMKdhu060zawN 4Xw77Q40BHhmSQhlkJVWtn7wCzmV2LJsHAP1915pV5evYwZwO8zyGN6yr3ic49tFx4Ni /DIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Cni3YG26TUwTwn0/m/XP6xKVhkAi6RTA9FiGH4/p6co=; b=FJW+NDiE9M0g2Ls6IH1fj1hoEzLyOlQPDGTdUDtPrdlBxbJfy8L1mFXTjrEJws0Ggt a8hDuMb/CYTO3dhP964dNV0/m3Wa2QEVgBfqWBjgjQZqmIl4pf/gH8ZVOiNwMY7hy5DM m9qPPjuKxlAWj8AMJbP5xmYjHX9gbKfajV/Bt4XxyYPb6Goju+lGvAKjCyym71ceUaJ3 s7gGl99bpL+8VsF0ZpX7Lq1rgGe5gabdfFbCAImmz2FTXFfsKNyFQgru6b/bk+Yss6Y6 DQqRjWeQIpKO2X+K0M9ppmuw0/cITmNvWqjLqD4yMhPchNgDvn0kIFT5cIyF81xiVY3X /UKQ== X-Gm-Message-State: AJcUukcsAp/5bB31aiMUeLMztmfxUDegQaJc2gCOPOZBqdH5Gl3wiJrA hQBq6C0toPMbvZWo43lZq9M= X-Google-Smtp-Source: ALg8bN6j5um3WSEr6GlxyxGSeBxIvenxOhvBwAymC2DpOto297RNA2N2awwMXXLvr0kHnXgHwHvatg== X-Received: by 2002:adf:ebd0:: with SMTP id v16mr11690083wrn.109.1548415815745; Fri, 25 Jan 2019 03:30:15 -0800 (PST) Received: from localhost (pD9E51040.dip0.t-ipconnect.de. [217.229.16.64]) by smtp.gmail.com with ESMTPSA id w16sm127162070wrp.1.2019.01.25.03.30.14 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 25 Jan 2019 03:30:14 -0800 (PST) From: Thierry Reding To: Greg Kroah-Hartman , Rob Herring Cc: Mathias Nyman , Jon Hunter , JC Kuo , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 1/6] dt-bindings: usb: xhci-tegra: Add Tegra186 support Date: Fri, 25 Jan 2019 12:30:08 +0100 Message-Id: <20190125113013.11447-1-thierry.reding@gmail.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding Extend the bindings to cover the set of features found in Tegra186. Signed-off-by: Thierry Reding Reviewed-by: JC Kuo Acked-by: Mathias Nyman Reviewed-by: Rob Herring --- .../devicetree/bindings/usb/nvidia,tegra124-xusb.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.txt index 4156c3e181c5..5bfcc0b4d6b9 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.txt +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.txt @@ -10,6 +10,7 @@ Required properties: - Tegra124: "nvidia,tegra124-xusb" - Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb" - Tegra210: "nvidia,tegra210-xusb" + - Tegra186: "nvidia,tegra186-xusb" - reg: Must contain the base and length of the xHCI host registers, XUSB FPCI registers and XUSB IPFS registers. - reg-names: Must contain the following entries: @@ -59,6 +60,8 @@ For Tegra210: - avdd-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V. - dvdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V. - hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 1.8 V. + +For Tegra210 and Tegra186: - power-domains: A list of PM domain specifiers that reference each power-domain used by the xHCI controller. This list must comprise of a specifier for the XUSBA and XUSBC power-domains. See ../power/power_domain.txt and @@ -78,6 +81,7 @@ Optional properties: - Tegra132: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1 - Tegra210: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, usb3-0, usb3-1, usb3-2, usb3-3 + - Tegra186: usb2-0, usb2-1, usb2-2, hsic-0, usb3-0, usb3-1, usb3-2 Example: -------- From patchwork Fri Jan 25 11:30:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 1031020 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="u9hDWa+A"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43mGzw103nz9s7h for ; Fri, 25 Jan 2019 22:30:50 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726885AbfAYLaV (ORCPT ); Fri, 25 Jan 2019 06:30:21 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:44421 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726122AbfAYLaU (ORCPT ); Fri, 25 Jan 2019 06:30:20 -0500 Received: by mail-wr1-f65.google.com with SMTP id z5so9880101wrt.11; Fri, 25 Jan 2019 03:30:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Q06YcEO7r7oiNXtCNtDcZmxkFfAsBt1uDq63g/LTR2k=; b=u9hDWa+A9ZSeDhwxO2PJYVUeabsCCIk5+sY7lohHO0Aw5SOas+5g0LZAlWcKmL0wTS 0z5Do/JuAE+N+Nxnr6ODfZn0rpKGxxPfdNmbs5h+OsAUnAZBdKNlGQ6yY/k9u7AvcDkl tAhYHbYC5TK8IWpWUD2VpKszbE6nAv/oxJWaa9iLIwsV7a9uadlLAmXaUXOUdcGz8jXQ Hnlo/n8bZoaApFvfXH5CV9a6Bp8Pjp0S5sHWmCfXeRz/HVXTrCS9mTFu5H2drqer/PFl cqf7WM6i7jHDNtcKm/KdYxDPAEYLhkYqem5P10gNXjAZ3Ia5QctXERbxnxiGovI2xILl b9Uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Q06YcEO7r7oiNXtCNtDcZmxkFfAsBt1uDq63g/LTR2k=; b=Eu/k7grOMfrLmqWg9HJLbl+i2647nwD9DP7E9vgi2QD0WLVDSRaGbQl73oCMZ9jeNd XHL0Kse4UAKwIcGtz8w9l7uIRjXNI/uGb4BZEW/NJtj/sAg29qQPlwR9kYIHcNtTQ9gl x01Fvfq2AdSF3mbnhrtZe97zM5NMWQhdOYnEHC9S6N4zEZIpgnp+YeyCDovxOOITBMHJ A1A1+DEg6ku4zLvh7SY2I8XtF7tHDyu44h3lOIn6HiiRUUU1HcgXdBMPHWc+26ObyPw2 dkRIMwbfLLsP5sglZRjmP5mHuGQy+OY0PGn4VsKTUR382fem+uL83tw3EVwffPBczlsS 5ZjQ== X-Gm-Message-State: AJcUuke8q0LIc8/rQAo8LGr90rVonQcFetpp2FIj0aWm6Ru7Tpay67ZA 72j/GdHDA7XXmdaMCr3g/RWzhwcYJGs= X-Google-Smtp-Source: ALg8bN7VKasZeS/QWhcrDQihl6Hci1HQF2F2uJbnE21PVShB0UmtdHIryhVr35QCI+QBwBjdossPqQ== X-Received: by 2002:adf:a357:: with SMTP id d23mr11621314wrb.195.1548415817320; Fri, 25 Jan 2019 03:30:17 -0800 (PST) Received: from localhost (pD9E51040.dip0.t-ipconnect.de. [217.229.16.64]) by smtp.gmail.com with ESMTPSA id a12sm114926161wro.18.2019.01.25.03.30.16 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 25 Jan 2019 03:30:16 -0800 (PST) From: Thierry Reding To: Greg Kroah-Hartman Cc: Mathias Nyman , Jon Hunter , JC Kuo , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/6] usb: host: xhci-tegra: Selectively program IPFS Date: Fri, 25 Jan 2019 12:30:09 +0100 Message-Id: <20190125113013.11447-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190125113013.11447-1-thierry.reding@gmail.com> References: <20190125113013.11447-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: JC Kuo Starting with Tegra186, the XUSB controller no longer has the IPFS wrapper. This commit adds a "has_ipfs" field to struct tegra_xusb_soc that can be used to declare the existence of the IPFS wrapper. For the existing chips (i.e. Tegra124 and Tegra210), the new field is set to true. A future patch adding support for Tegra186 will set it to false. Signed-off-by: JC Kuo Signed-off-by: Thierry Reding Reviewed-by: JC Kuo --- drivers/usb/host/xhci-tegra.c | 43 +++++++++++++++++++++-------------- 1 file changed, 26 insertions(+), 17 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 938ff06c0349..49e033f953a2 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -161,6 +161,7 @@ struct tegra_xusb_soc { } ports; bool scale_ss_clock; + bool has_ipfs; }; struct tegra_xusb { @@ -637,16 +638,18 @@ static irqreturn_t tegra_xusb_mbox_thread(int irq, void *data) return IRQ_HANDLED; } -static void tegra_xusb_ipfs_config(struct tegra_xusb *tegra, - struct resource *regs) +static void tegra_xusb_config(struct tegra_xusb *tegra, + struct resource *regs) { u32 value; - value = ipfs_readl(tegra, IPFS_XUSB_HOST_CONFIGURATION_0); - value |= IPFS_EN_FPCI; - ipfs_writel(tegra, value, IPFS_XUSB_HOST_CONFIGURATION_0); + if (tegra->soc->has_ipfs) { + value = ipfs_readl(tegra, IPFS_XUSB_HOST_CONFIGURATION_0); + value |= IPFS_EN_FPCI; + ipfs_writel(tegra, value, IPFS_XUSB_HOST_CONFIGURATION_0); - usleep_range(10, 20); + usleep_range(10, 20); + } /* Program BAR0 space */ value = fpci_readl(tegra, XUSB_CFG_4); @@ -661,13 +664,15 @@ static void tegra_xusb_ipfs_config(struct tegra_xusb *tegra, value |= XUSB_IO_SPACE_EN | XUSB_MEM_SPACE_EN | XUSB_BUS_MASTER_EN; fpci_writel(tegra, value, XUSB_CFG_1); - /* Enable interrupt assertion */ - value = ipfs_readl(tegra, IPFS_XUSB_HOST_INTR_MASK_0); - value |= IPFS_IP_INT_MASK; - ipfs_writel(tegra, value, IPFS_XUSB_HOST_INTR_MASK_0); + if (tegra->soc->has_ipfs) { + /* Enable interrupt assertion */ + value = ipfs_readl(tegra, IPFS_XUSB_HOST_INTR_MASK_0); + value |= IPFS_IP_INT_MASK; + ipfs_writel(tegra, value, IPFS_XUSB_HOST_INTR_MASK_0); - /* Set hysteresis */ - ipfs_writel(tegra, 0x80, IPFS_XUSB_HOST_CLKGATE_HYSTERESIS_0); + /* Set hysteresis */ + ipfs_writel(tegra, 0x80, IPFS_XUSB_HOST_CLKGATE_HYSTERESIS_0); + } } static int tegra_xusb_clk_enable(struct tegra_xusb *tegra) @@ -1015,10 +1020,12 @@ static int tegra_xusb_probe(struct platform_device *pdev) if (IS_ERR(tegra->fpci_base)) return PTR_ERR(tegra->fpci_base); - res = platform_get_resource(pdev, IORESOURCE_MEM, 2); - tegra->ipfs_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(tegra->ipfs_base)) - return PTR_ERR(tegra->ipfs_base); + if (tegra->soc->has_ipfs) { + res = platform_get_resource(pdev, IORESOURCE_MEM, 2); + tegra->ipfs_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(tegra->ipfs_base)) + return PTR_ERR(tegra->ipfs_base); + } tegra->xhci_irq = platform_get_irq(pdev, 0); if (tegra->xhci_irq < 0) @@ -1208,7 +1215,7 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto disable_rpm; } - tegra_xusb_ipfs_config(tegra, regs); + tegra_xusb_config(tegra, regs); err = tegra_xusb_load_firmware(tegra); if (err < 0) { @@ -1380,6 +1387,7 @@ static const struct tegra_xusb_soc tegra124_soc = { .usb3 = { .offset = 0, .count = 2, }, }, .scale_ss_clock = true, + .has_ipfs = true, }; MODULE_FIRMWARE("nvidia/tegra124/xusb.bin"); @@ -1411,6 +1419,7 @@ static const struct tegra_xusb_soc tegra210_soc = { .usb3 = { .offset = 0, .count = 4, }, }, .scale_ss_clock = false, + .has_ipfs = true, }; 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[217.229.16.64]) by smtp.gmail.com with ESMTPSA id z12sm81960648wrh.35.2019.01.25.03.30.18 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 25 Jan 2019 03:30:18 -0800 (PST) From: Thierry Reding To: Greg Kroah-Hartman Cc: Mathias Nyman , Jon Hunter , JC Kuo , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/6] usb: host: xhci-tegra: Add Tegra186 XUSB support Date: Fri, 25 Jan 2019 12:30:10 +0100 Message-Id: <20190125113013.11447-3-thierry.reding@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190125113013.11447-1-thierry.reding@gmail.com> References: <20190125113013.11447-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: JC Kuo This commit adds Tegra186 XUSB host mode controller support. This is very similar to the existing support for Tegra124 and Tegra210, except that the number of ports and PHYs differs and the IPFS wrapper being gone. Signed-off-by: JC Kuo Signed-off-by: Thierry Reding Reviewed-by: JC Kuo --- drivers/usb/host/xhci-tegra.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 49e033f953a2..9a07ea0f9c97 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -1423,9 +1423,34 @@ static const struct tegra_xusb_soc tegra210_soc = { }; MODULE_FIRMWARE("nvidia/tegra210/xusb.bin"); +static const char * const tegra186_supply_names[] = { +}; + +static const struct tegra_xusb_phy_type tegra186_phy_types[] = { + { .name = "usb3", .num = 3, }, + { .name = "usb2", .num = 3, }, + { .name = "hsic", .num = 1, }, +}; + +static const struct tegra_xusb_soc tegra186_soc = { + .firmware = "nvidia/tegra186/xusb.bin", + .supply_names = tegra186_supply_names, + .num_supplies = ARRAY_SIZE(tegra186_supply_names), + .phy_types = tegra186_phy_types, + .num_types = ARRAY_SIZE(tegra186_phy_types), + .ports = { + .usb3 = { .offset = 0, .count = 3, }, + .usb2 = { .offset = 3, .count = 3, }, + .hsic = { .offset = 6, .count = 1, }, + }, + .scale_ss_clock = false, + .has_ipfs = false, +}; + static const struct of_device_id tegra_xusb_of_match[] = { { .compatible = "nvidia,tegra124-xusb", .data = &tegra124_soc }, { .compatible = "nvidia,tegra210-xusb", .data = &tegra210_soc }, + { .compatible = "nvidia,tegra186-xusb", .data = &tegra186_soc }, { }, }; MODULE_DEVICE_TABLE(of, tegra_xusb_of_match); From patchwork Fri Jan 25 11:30:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 1031017 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="aDwinDgZ"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43mGzP1v65z9s9h for ; Fri, 25 Jan 2019 22:30:24 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727903AbfAYLaX (ORCPT ); Fri, 25 Jan 2019 06:30:23 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:41334 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726878AbfAYLaW (ORCPT ); Fri, 25 Jan 2019 06:30:22 -0500 Received: by mail-wr1-f67.google.com with SMTP id x10so9894864wrs.8; Fri, 25 Jan 2019 03:30:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VvuZ8hl8eBYpxwbsEYMwOLTbpcQiEop8FkF1ZB8j4vU=; b=aDwinDgZaneohOEdSdVIr9sq/a0yhoAyH6G2GA6zRRwDtgIiwim64mMJlvmbej7HTJ MdFklTQ/BMwrY/Xy5cYoTT3s00zbSk8Qkv/1RBFAhHlji8Rs428MCw733RP6xtt4UdKF KgUswniYgntTzjYvH7FxPmL0fsVZK2JP7kVtgy92Tju7ksggqpdiaHE811a7wlMUiqhi 8Di/e7D7hDrYE7f34jJ5+pU+NfgUcI+dYQ8/ArFWxaUPfQGXxc7L445T9Hu2tovAWW4g h/ryfA+W/w9oTw6aaoX4wnjoh1pbCLqrgDQWrbaflDQ6Rwq1RR8YZrjt4xsalb9GQ+d2 pf2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VvuZ8hl8eBYpxwbsEYMwOLTbpcQiEop8FkF1ZB8j4vU=; b=tbYSPhzz6gPTvQgXMM4faCgJKm1ubfye16vXP+qX08HxODnQEGnCqnQzHAvGYWAatK EaXnewzxTlS+Lg6cRRF+Z6ylxcsWNan4vBuiWPi5p0MGoN7dsuQSijeMuSkWOoVCVJw7 cibaIBe/NyD9EnqlX4vhG/C/HLYP5rgr2jIhS/nq5CZmMROIgUz403y9RTItOcLO6Pru lGABVitFqQ97jE5ooQmaXiBNFICrpbhG7g4dj1hJoW6EO6gq+kHS5l1uPgS5liVZAPPf 6+N6fjH0AFrn9jRQ1r4+ZzJVHAZsy4nsPqgbHMUeRNcxITRmkoPQDsIL672otf3e3Cwa 2PAg== X-Gm-Message-State: AJcUukejgN/YoaIyEkyRE4BzwbeoTWmPjj57yIJC2seB9q7PRCx1LfO5 MKALOwMx8oCOasuNhHHWwD0= X-Google-Smtp-Source: ALg8bN5kP8CCimu+yM+jrVF1LZTOJbkENulywLNpVnt7TmMwQwf1WOn2+Ig2ytAtV84jqVXimsBz6w== X-Received: by 2002:adf:dbcb:: with SMTP id e11mr11509763wrj.58.1548415820353; Fri, 25 Jan 2019 03:30:20 -0800 (PST) Received: from localhost (pD9E51040.dip0.t-ipconnect.de. [217.229.16.64]) by smtp.gmail.com with ESMTPSA id z17sm80107397wrv.2.2019.01.25.03.30.19 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 25 Jan 2019 03:30:19 -0800 (PST) From: Thierry Reding To: Greg Kroah-Hartman Cc: Mathias Nyman , Jon Hunter , JC Kuo , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/6] arm64: tegra: Add XUSB and pad controller on Tegra186 Date: Fri, 25 Jan 2019 12:30:11 +0100 Message-Id: <20190125113013.11447-4-thierry.reding@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190125113013.11447-1-thierry.reding@gmail.com> References: <20190125113013.11447-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding Adds the XUSB pad and XUSB controllers on Tegra186. Signed-off-by: Thierry Reding Reviewed-by: JC Kuo --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 135 +++++++++++++++++++++++ 1 file changed, 135 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 22815db4a3ed..09d3b0d60e41 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -338,6 +338,141 @@ status = "disabled"; }; + padctl: padctl@3520000 { + compatible = "nvidia,tegra186-xusb-padctl"; + reg = <0x0 0x03520000 0x0 0x1000>, + <0x0 0x03540000 0x0 0x1000>; + reg-names = "padctl", "ao"; + + resets = <&bpmp TEGRA186_RESET_XUSB_PADCTL>; + reset-names = "padctl"; + + status = "disabled"; + + pads { + usb2 { + clocks = <&bpmp TEGRA186_CLK_USB2_TRK>; + clock-names = "trk"; + status = "disabled"; + + lanes { + usb2-0 { + status = "disabled"; + #phy-cells = <0>; + }; + + usb2-1 { + status = "disabled"; + #phy-cells = <0>; + }; + + usb2-2 { + status = "disabled"; + #phy-cells = <0>; + }; + }; + }; + + hsic { + clocks = <&bpmp TEGRA186_CLK_HSIC_TRK>; + clock-names = "trk"; + status = "disabled"; + + lanes { + hsic-0 { + status = "disabled"; + #phy-cells = <0>; + }; + }; + }; + + usb3 { + status = "disabled"; + + lanes { + usb3-0 { + status = "disabled"; + #phy-cells = <0>; + }; + + usb3-1 { + status = "disabled"; + #phy-cells = <0>; + }; + + usb3-2 { + status = "disabled"; + #phy-cells = <0>; + }; + }; + }; + }; + + ports { + usb2-0 { + status = "disabled"; + }; + + usb2-1 { + status = "disabled"; + }; + + usb2-2 { + status = "disabled"; + }; + + hsic-0 { + status = "disabled"; + }; + + usb3-0 { + status = "disabled"; + }; + + usb3-1 { + status = "disabled"; + }; + + usb3-2 { + status = "disabled"; + }; + }; + }; + + usb@3530000 { + compatible = "nvidia,tegra186-xusb"; + reg = <0x0 0x03530000 0x0 0x8000>, + <0x0 0x03538000 0x0 0x1000>; + reg-names = "hcd", "fpci"; + + interrupts = , + , + ; + + clocks = <&bpmp TEGRA186_CLK_XUSB_HOST>, + <&bpmp TEGRA186_CLK_XUSB_FALCON>, + <&bpmp TEGRA186_CLK_XUSB_SS>, + <&bpmp TEGRA186_CLK_XUSB_CORE_SS>, + <&bpmp TEGRA186_CLK_CLK_M>, + <&bpmp TEGRA186_CLK_XUSB_FS>, + <&bpmp TEGRA186_CLK_PLLU>, + <&bpmp TEGRA186_CLK_CLK_M>, + <&bpmp TEGRA186_CLK_PLLE>; + clock-names = "xusb_host", "xusb_falcon_src", "xusb_ss", + "xusb_ss_src", "xusb_hs_src", "xusb_fs_src", + "pll_u_480m", "clk_m", "pll_e"; + + power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBC>, + <&bpmp TEGRA186_POWER_DOMAIN_XUSBA>; + power-domain-names = "xusb_host", "xusb_ss"; + nvidia,xusb-padctl = <&padctl>; + + status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + }; + fuse@3820000 { compatible = "nvidia,tegra186-efuse"; reg = <0x0 0x03820000 0x0 0x10000>; From patchwork Fri Jan 25 11:30:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 1031019 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; 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[217.229.16.64]) by smtp.gmail.com with ESMTPSA id v6sm95535316wrd.88.2019.01.25.03.30.21 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 25 Jan 2019 03:30:21 -0800 (PST) From: Thierry Reding To: Greg Kroah-Hartman Cc: Mathias Nyman , Jon Hunter , JC Kuo , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/6] arm64: tegra: Enable XUSB on P2771 Date: Fri, 25 Jan 2019 12:30:12 +0100 Message-Id: <20190125113013.11447-5-thierry.reding@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190125113013.11447-1-thierry.reding@gmail.com> References: <20190125113013.11447-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding Enable the relevant pads for XUSB support on P2771-0000 and hook up the USB supply voltage regulators to the ports. Signed-off-by: Thierry Reding --- .../boot/dts/nvidia/tegra186-p2771-0000.dts | 115 ++++++++++++++++++ .../arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 19 ++- 2 files changed, 130 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts index 65487eee2ce6..ab9e4e42b4dc 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts @@ -55,6 +55,93 @@ status = "okay"; }; + padctl@3520000 { + status = "okay"; + + avdd-pll-erefeut-supply = <&vdd_1v8_pll>; + avdd-usb-supply = <&vdd_3v3_sys>; + dvdd-pex-supply = <&vdd_pex>; + dvdd-pex-pll-supply = <&vdd_pex>; + hvdd-pex-supply = <&vdd_1v8>; + hvdd-pex-pll-supply = <&vdd_1v8>; + vclamp-usb-supply = <&vdd_1v8>; + vddio-hsic-supply = <&gnd>; + + pads { + usb2 { + status = "okay"; + + lanes { + usb2-0 { + nvidia,function = "xusb"; + status = "okay"; + }; + + usb2-1 { + nvidia,function = "xusb"; + status = "okay"; + }; + + usb2-2 { + nvidia,function = "xusb"; + status = "okay"; + }; + }; + }; + + usb3 { + status = "okay"; + + lanes { + usb3-0 { + nvidia,function = "xusb"; + status = "okay"; + }; + + usb3-1 { + nvidia,function = "xusb"; + status = "okay"; + }; + + usb3-2 { + nvidia,function = "xusb"; + status = "okay"; + }; + }; + }; + }; + + ports { + usb2-0 { + status = "okay"; + mode = "otg"; + + vbus-supply = <&vdd_usb0>; + }; + + usb2-1 { + status = "okay"; + mode = "host"; + + vbus-supply = <&vdd_usb1>; + }; + + usb3-0 { + nvidia,usb2-companion = <1>; + status = "okay"; + }; + }; + }; + + usb@3530000 { + status = "okay"; + + phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>, + <&{/padctl@3520000/pads/usb2/lanes/usb2-1}>, + <&{/padctl@3520000/pads/usb3/lanes/usb3-0}>; + phy-names = "usb2-0", "usb2-1", "usb3-0"; + }; + pcie@10003000 { status = "okay"; @@ -177,5 +264,33 @@ vin-supply = <&vdd_5v0_sys>; }; + + vdd_usb0: regulator@102 { + compatible = "regulator-fixed"; + reg = <102>; + + regulator-name = "VDD_USB0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio TEGRA_MAIN_GPIO(L, 4) GPIO_ACTIVE_HIGH>; + enable-active-high; + + vin-supply = <&vdd_5v0_sys>; + }; + + vdd_usb1: regulator@103 { + compatible = "regulator-fixed"; + reg = <103>; + + regulator-name = "VDD_USB1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio TEGRA_MAIN_GPIO(L, 5) GPIO_ACTIVE_HIGH>; + enable-active-high; + + vin-supply = <&vdd_5v0_sys>; + }; }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi index b539561e7877..eb64d9be3231 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi @@ -289,7 +289,7 @@ regulator-boot-on; }; - ldo0 { + vdd_1v8_pll: ldo0 { regulator-name = "VDD_1V8_AP_PLL"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -358,10 +358,21 @@ #address-cells = <1>; #size-cells = <0>; - vdd_5v0_sys: regulator@0 { + gnd: regulator@0 { compatible = "regulator-fixed"; reg = <0>; + regulator-name = "GND"; + regulator-min-microvolt = <0>; + regulator-max-microvolt = <0>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_5v0_sys: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "VDD_5V0_SYS"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; @@ -369,9 +380,9 @@ regulator-boot-on; }; - vdd_1v8_ap: regulator@1 { + vdd_1v8_ap: regulator@2 { compatible = "regulator-fixed"; - reg = <1>; + reg = <2>; regulator-name = "VDD_1V8_AP"; regulator-min-microvolt = <1800000>; From patchwork Fri Jan 25 11:30:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 1031018 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; 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[217.229.16.64]) by smtp.gmail.com with ESMTPSA id l19sm61715585wme.21.2019.01.25.03.30.22 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 25 Jan 2019 03:30:22 -0800 (PST) From: Thierry Reding To: Greg Kroah-Hartman Cc: Mathias Nyman , Jon Hunter , JC Kuo , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 6/6] arm64: tegra: Remove regulator hacks on Jetson TX2 Date: Fri, 25 Jan 2019 12:30:13 +0100 Message-Id: <20190125113013.11447-6-thierry.reding@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190125113013.11447-1-thierry.reding@gmail.com> References: <20190125113013.11447-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding Various regulators were marked as always-on for Jetson TX2. At this point, all of the regulators are properly hooked up, so this workaround is no longer required. Signed-off-by: Thierry Reding --- .../arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 23 ------------------- 1 file changed, 23 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi index eb64d9be3231..0b62f80b0e86 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi @@ -266,43 +266,30 @@ regulator-name = "AVDD_DSI_CSI_1V2"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; - /* XXX */ - regulator-always-on; - regulator-boot-on; }; vdd_1v8: sd2 { regulator-name = "VDD_1V8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - /* XXX */ - regulator-always-on; - regulator-boot-on; }; vdd_3v3_sys: sd3 { regulator-name = "VDD_3V3_SYS"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - /* XXX */ - regulator-always-on; - regulator-boot-on; }; vdd_1v8_pll: ldo0 { regulator-name = "VDD_1V8_AP_PLL"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - /* XXX */ - regulator-always-on; - regulator-boot-on; }; ldo2 { regulator-name = "VDDIO_3V3_AOHV"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - /* XXX */ regulator-always-on; regulator-boot-on; }; @@ -329,18 +316,12 @@ regulator-name = "VDD_HDMI_1V05"; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1050000>; - /* XXX */ - regulator-always-on; - regulator-boot-on; }; vdd_pex: ldo8 { regulator-name = "VDD_PEX_1V05"; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1050000>; - /* XXX */ - regulator-always-on; - regulator-boot-on; }; }; }; @@ -388,10 +369,6 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - /* XXX */ - regulator-always-on; - regulator-boot-on; - gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; enable-active-high;