From patchwork Sat Jan 19 09:15:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027894 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXH91H4zz9sBQ for ; Sat, 19 Jan 2019 20:16:02 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id F0946C220AF; Sat, 19 Jan 2019 09:15:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 718BCC2209D; Sat, 19 Jan 2019 09:15:52 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 42B2BC21E49; Sat, 19 Jan 2019 09:15:51 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by lists.denx.de (Postfix) with ESMTPS id EF7A4C21E9F for ; Sat, 19 Jan 2019 09:15:50 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43hXGt3XPvz1qvvN; Sat, 19 Jan 2019 10:15:50 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43hXGt2Hcbz1qr5b; Sat, 19 Jan 2019 10:15:50 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id XIUXHc8aSPKd; Sat, 19 Jan 2019 10:15:49 +0100 (CET) X-Auth-Info: ELwN2f57OGN8MfvS97V+dqWm1ueaeBNUtH6Y/ZIrymQ= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:15:49 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:14 +0100 Message-Id: <20190119091528.11776-2-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Cc: Tom Rini Subject: [U-Boot] [PATCH v1 01/15] ARM: imx: cosmetic: Remove not needed comment from the mccmon6.h file X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This comment is a leftover from the Kconfig CONFIG_*MTD* move. Signed-off-by: Lukasz Majewski --- include/configs/mccmon6.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 644f339993..86ab66f3ab 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -70,8 +70,6 @@ #define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } #define CONFIG_SYS_FLASH_BANKS_SIZES { (32 * SZ_1M) } -/* MTD support */ - /* USB Configs */ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) From patchwork Sat Jan 19 09:15:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027895 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXHj5NVhz9sBQ for ; Sat, 19 Jan 2019 20:16:33 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 59519C220C5; Sat, 19 Jan 2019 09:16:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 5DCBCC220BD; Sat, 19 Jan 2019 09:15:53 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2D359C21E9F; Sat, 19 Jan 2019 09:15:52 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) by lists.denx.de (Postfix) with ESMTPS id DCF9EC21E49 for ; Sat, 19 Jan 2019 09:15:51 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43hXGv4t8sz1qvyZ; Sat, 19 Jan 2019 10:15:51 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43hXGv4DjTz1qr5Y; Sat, 19 Jan 2019 10:15:51 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id oEXFvtIdpUTH; Sat, 19 Jan 2019 10:15:50 +0100 (CET) X-Auth-Info: 6nGfHd5eL28yxIV+SYbsPFPwwxu7SlWBhBbVvEWp278= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:15:50 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:15 +0100 Message-Id: <20190119091528.11776-3-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Cc: Tom Rini Subject: [U-Boot] [PATCH v1 02/15] ARM: imx: config: Disable support for USB on MCCMON6 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The IMX6Q based MCCMON6 is not using USB for any purpose. Signed-off-by: Lukasz Majewski --- configs/mccmon6_nor_defconfig | 2 -- configs/mccmon6_sd_defconfig | 2 -- include/configs/mccmon6.h | 5 ----- 3 files changed, 9 deletions(-) diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 61231557bf..80a4fcccdc 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -18,7 +18,6 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y -CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y @@ -45,5 +44,4 @@ CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y -CONFIG_USB=y CONFIG_OF_LIBFDT=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 3047ae6e76..7199be2f5c 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -19,7 +19,6 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y -CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y @@ -46,5 +45,4 @@ CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y -CONFIG_USB=y CONFIG_OF_LIBFDT=y diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 86ab66f3ab..5ca9bc6848 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -70,11 +70,6 @@ #define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } #define CONFIG_SYS_FLASH_BANKS_SIZES { (32 * SZ_1M) } -/* USB Configs */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 - /* Ethernet Configuration */ #define CONFIG_FEC_MXC #define IMX_FEC_BASE ENET_BASE_ADDR From patchwork Sat Jan 19 09:15:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027901 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXPd1dR3z9sBQ for ; Sat, 19 Jan 2019 20:21:41 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id DC91AC220E5; Sat, 19 Jan 2019 09:17:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 01DABC2210C; Sat, 19 Jan 2019 09:16:09 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B8383C22103; Sat, 19 Jan 2019 09:15:56 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) by lists.denx.de (Postfix) with ESMTPS id 13DA8C220B2 for ; Sat, 19 Jan 2019 09:15:53 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43hXGw6KvPz1qvyt; Sat, 19 Jan 2019 10:15:52 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43hXGw5x1Hz1qr5Y; Sat, 19 Jan 2019 10:15:52 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id 1s0ldjdJcDyW; Sat, 19 Jan 2019 10:15:51 +0100 (CET) X-Auth-Info: TKACL2020o1PfyqaG53Fg95WAEB0ynQgFSId8pm+yIg= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:15:51 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:16 +0100 Message-Id: <20190119091528.11776-4-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Cc: Joe Hershberger Subject: [U-Boot] [PATCH v1 03/15] net: imx: Add support for waiting some time after FEC gpio reset X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The support for in-kernel (v4.20) "phy-reset-post-delay" property has been implemented in u-boot's FEC IMX driver. It has the same range (1 to 1000ms) as in Linux. Some PHYs require waiting some time after the reset to be accessible via MII bus. This problem has been observed on mccmon6 board with KSZ9031 PHY IC, when DM_ETH was enabled (as DM slightly changes time between PHY initialization and first access). Signed-off-by: Lukasz Majewski --- drivers/net/fec_mxc.c | 11 +++++++++++ drivers/net/fec_mxc.h | 1 + 2 files changed, 12 insertions(+) diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 32fb34b793..b13c9c15f3 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1294,6 +1294,8 @@ static void fec_gpio_reset(struct fec_priv *priv) dm_gpio_set_value(&priv->phy_reset_gpio, 1); mdelay(priv->reset_delay); dm_gpio_set_value(&priv->phy_reset_gpio, 0); + if (priv->post_reset_delay) + mdelay(priv->post_reset_delay); } } #endif @@ -1453,6 +1455,15 @@ static int fecmxc_ofdata_to_platdata(struct udevice *dev) /* property value wrong, use default value */ priv->reset_delay = 1; } + + priv->post_reset_delay = dev_read_u32_default(dev, + "phy-reset-post-delay", + 0); + if (priv->post_reset_delay > 1000) { + printf("FEC MXC: phy reset post delay should be <= 1000ms\n"); + /* property value wrong, use default value */ + priv->post_reset_delay = 0; + } #endif return 0; diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h index e9a661f0a1..d069af533a 100644 --- a/drivers/net/fec_mxc.h +++ b/drivers/net/fec_mxc.h @@ -258,6 +258,7 @@ struct fec_priv { #ifdef CONFIG_DM_GPIO struct gpio_desc phy_reset_gpio; uint32_t reset_delay; + u32 post_reset_delay; #endif #ifdef CONFIG_DM_ETH u32 interface; From patchwork Sat Jan 19 09:15:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027896 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXKp4tq5z9sBZ for ; Sat, 19 Jan 2019 20:18:22 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 3D30DC22100; Sat, 19 Jan 2019 09:16:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4993DC22107; Sat, 19 Jan 2019 09:16:08 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id A7981C220EF; Sat, 19 Jan 2019 09:15:57 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) by lists.denx.de (Postfix) with ESMTPS id 5FAC9C220DC for ; Sat, 19 Jan 2019 09:15:54 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43hXGy1Qcfz1qw01; Sat, 19 Jan 2019 10:15:54 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43hXGy16W4z1qr5X; Sat, 19 Jan 2019 10:15:54 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id ci1U6JFJni8E; Sat, 19 Jan 2019 10:15:53 +0100 (CET) X-Auth-Info: CAljB06JWFSqSawz25J4owzTwyVPwGMecIZemmdO7UE= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:15:53 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:17 +0100 Message-Id: <20190119091528.11776-5-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Cc: "NXP i.MX U-Boot Team" Subject: [U-Boot] [PATCH v1 04/15] clk: imx: Rename and export get_usdhc_clk() to imx6_get_usdhc_clk() X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This commit allows reusing the mach-imx/mx6/clock.c code in the CLK driver model (DM) driver for iMX6Q. Signed-off-by: Lukasz Majewski --- arch/arm/include/asm/arch-mx6/clock.h | 1 + arch/arm/mach-imx/mx6/clock.c | 10 +++++----- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h index a9481a5fea..5ce58e1b7a 100644 --- a/arch/arm/include/asm/arch-mx6/clock.h +++ b/arch/arm/include/asm/arch-mx6/clock.h @@ -59,6 +59,7 @@ enum enet_freq { u32 imx_get_uartclk(void); u32 imx_get_fecclk(void); unsigned int mxc_get_clock(enum mxc_clock clk); +u32 imx6_get_usdhc_clk(u32 port); void setup_gpmi_io_clk(u32 cfg); void hab_caam_clock_enable(unsigned char enable); void enable_ocotp_clk(unsigned char enable); diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c index 366a4e3c6b..96348b742b 100644 --- a/arch/arm/mach-imx/mx6/clock.c +++ b/arch/arm/mach-imx/mx6/clock.c @@ -978,7 +978,7 @@ int enable_fec_anatop_clock(int fec_id, enum enet_freq freq) } #endif -static u32 get_usdhc_clk(u32 port) +u32 imx6_get_usdhc_clk(u32 port) { u32 root_freq = 0, usdhc_podf = 0, clk_sel = 0; u32 cscmr1 = __raw_readl(&imx_ccm->cscmr1); @@ -1258,13 +1258,13 @@ unsigned int mxc_get_clock(enum mxc_clock clk) case MXC_DDR_CLK: return get_mmdc_ch0_clk(); case MXC_ESDHC_CLK: - return get_usdhc_clk(0); + return imx6_get_usdhc_clk(0); case MXC_ESDHC2_CLK: - return get_usdhc_clk(1); + return imx6_get_usdhc_clk(1); case MXC_ESDHC3_CLK: - return get_usdhc_clk(2); + return imx6_get_usdhc_clk(2); case MXC_ESDHC4_CLK: - return get_usdhc_clk(3); + return imx6_get_usdhc_clk(3); case MXC_SATA_CLK: return get_ahb_clk(); default: From patchwork Sat Jan 19 09:15:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027898 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXLn0pt3z9sBQ for ; Sat, 19 Jan 2019 20:19:13 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id B7D60C21E9F; Sat, 19 Jan 2019 09:16:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4C8FCC220CD; Sat, 19 Jan 2019 09:16:02 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B2150C220CA; Sat, 19 Jan 2019 09:15:59 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) by lists.denx.de (Postfix) with ESMTPS id A7FA9C220F1 for ; Sat, 19 Jan 2019 09:15:55 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43hXGz3WxWz1qvyZ; Sat, 19 Jan 2019 10:15:55 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43hXGz32vZz1qr5X; Sat, 19 Jan 2019 10:15:55 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id 0em7ooIPjx27; Sat, 19 Jan 2019 10:15:54 +0100 (CET) X-Auth-Info: 0ZZLETMdtHqjkaCXQXoqhLo66SaYI/F93NxwlW6pd5A= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:15:54 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:18 +0100 Message-Id: <20190119091528.11776-6-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Cc: "NXP i.MX U-Boot Team" Subject: [U-Boot] [PATCH v1 05/15] clk: imx: Rename and export get_cspi_clk() to imx6_get_cspi_clk() X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This commit allows reusing the mach-imx/mx6/clock.c code in the CLK driver model (DM) driver for iMX6Q. Signed-off-by: Lukasz Majewski --- arch/arm/include/asm/arch-mx6/clock.h | 1 + arch/arm/mach-imx/mx6/clock.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h index 5ce58e1b7a..81f5b43fcc 100644 --- a/arch/arm/include/asm/arch-mx6/clock.h +++ b/arch/arm/include/asm/arch-mx6/clock.h @@ -60,6 +60,7 @@ u32 imx_get_uartclk(void); u32 imx_get_fecclk(void); unsigned int mxc_get_clock(enum mxc_clock clk); u32 imx6_get_usdhc_clk(u32 port); +u32 imx6_get_cspi_clk(void); void setup_gpmi_io_clk(u32 cfg); void hab_caam_clock_enable(unsigned char enable); void enable_ocotp_clk(unsigned char enable); diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c index 96348b742b..cc19c92a4d 100644 --- a/arch/arm/mach-imx/mx6/clock.c +++ b/arch/arm/mach-imx/mx6/clock.c @@ -412,7 +412,7 @@ static u32 get_uart_clk(void) return freq / (uart_podf + 1); } -static u32 get_cspi_clk(void) +u32 imx6_get_cspi_clk(void) { u32 reg, cspi_podf; @@ -1250,7 +1250,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk) case MXC_UART_CLK: return get_uart_clk(); case MXC_CSPI_CLK: - return get_cspi_clk(); + return imx6_get_cspi_clk(); case MXC_AXI_CLK: return get_axi_clk(); case MXC_EMI_SLOW_CLK: From patchwork Sat Jan 19 09:15:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027900 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXN32Gpsz9sBQ for ; Sat, 19 Jan 2019 20:20:19 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 0C254C220B8; Sat, 19 Jan 2019 09:17:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id AFF1EC22102; Sat, 19 Jan 2019 09:16:18 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 98EF7C220D8; Sat, 19 Jan 2019 09:16:00 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by lists.denx.de (Postfix) with ESMTPS id 47D96C220FD for ; Sat, 19 Jan 2019 09:15:57 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43hXH10sRtz1qvvN; Sat, 19 Jan 2019 10:15:57 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43hXH109zRz1qr5X; Sat, 19 Jan 2019 10:15:57 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id B3ptIzRWWyhK; Sat, 19 Jan 2019 10:15:55 +0100 (CET) X-Auth-Info: W8G4auAdRZkF0KZREuucYpG4UGNke49cGuqqwaipAzU= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:15:55 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:19 +0100 Message-Id: <20190119091528.11776-7-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Subject: [U-Boot] [PATCH v1 06/15] dm: clk: imx: Add support for controlling imx6q clocks via Driver Model X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This commit provides support for setting USDHCx/ECSPIx clocks depending on used bus. Moreover, it is agnostic to the alias numbering as the information about the clock is read from device tree. Last but not least - the current IMX6Q clock code in mach-imx/mx6/clock.c has been reused to avoid code duplication. Code from this file will be moved to clk-imx6q.c when other iMX6Q based boards adopt usage of this driver. Signed-off-by: Lukasz Majewski FIX: clk-imx6q --- drivers/clk/imx/Kconfig | 7 ++ drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-imx6q.c | 176 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 184 insertions(+) create mode 100644 drivers/clk/imx/clk-imx6q.c diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig index a6fb58d6cf..7dc261f23e 100644 --- a/drivers/clk/imx/Kconfig +++ b/drivers/clk/imx/Kconfig @@ -1,3 +1,10 @@ +config CLK_IMX6Q + bool "Clock support for i.MX6Q" + depends on ARCH_MX6 + select CLK + help + This enables support clock driver for i.MX6Q platforms. + config CLK_IMX8 bool "Clock support for i.MX8" depends on ARCH_IMX8 diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile index 5505ae52e2..b32744812f 100644 --- a/drivers/clk/imx/Makefile +++ b/drivers/clk/imx/Makefile @@ -2,4 +2,5 @@ # # SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_CLK_IMX6Q) += clk-imx6q.o obj-$(CONFIG_CLK_IMX8) += clk-imx8.o diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c new file mode 100644 index 0000000000..a0aa1f5f45 --- /dev/null +++ b/drivers/clk/imx/clk-imx6q.c @@ -0,0 +1,176 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 DENX Software Engineering + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + * Based on: clk-imx8.c + */ + +#include +#include +#include +#include +#include + +struct imx6q_clks { + ulong id; + const char *name; +}; + +static struct imx6q_clks imx6q_clk_names[] = { + { IMX6QDL_CLK_ECSPI1, "ECSPI1" }, + { IMX6QDL_CLK_ECSPI2, "ECSPI2" }, + { IMX6QDL_CLK_ECSPI3, "ECSPI3" }, + { IMX6QDL_CLK_ECSPI4, "ECSPI4" }, + { IMX6QDL_CLK_USDHC1, "USDHC1" }, + { IMX6QDL_CLK_USDHC2, "USDHC2" }, + { IMX6QDL_CLK_USDHC3, "USDHC3" }, + { IMX6QDL_CLK_USDHC4, "USDHC4" }, +}; + +static ulong imx6q_clk_get_rate(struct clk *clk) +{ + ulong rate = 0; + + debug("%s(#%lu)\n", __func__, clk->id); + + switch (clk->id) { + case IMX6QDL_CLK_ECSPI1: + case IMX6QDL_CLK_ECSPI2: + case IMX6QDL_CLK_ECSPI3: + case IMX6QDL_CLK_ECSPI4: + return imx6_get_cspi_clk(); + + case IMX6QDL_CLK_USDHC1: + case IMX6QDL_CLK_USDHC2: + case IMX6QDL_CLK_USDHC3: + case IMX6QDL_CLK_USDHC4: + return imx6_get_usdhc_clk(clk->id - IMX6QDL_CLK_USDHC1); + default: + if (clk->id < IMX6QDL_CLK_DUMMY || clk->id >= IMX6QDL_CLK_END) { + printf("%s(Invalid clk ID #%lu)\n", __func__, clk->id); + return -EINVAL; + } + return -ENOTSUPP; + } + + return rate; +} + +static ulong imx6q_clk_set_rate(struct clk *clk, unsigned long rate) +{ + debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); + + return rate; +} + +static int __imx6q_clk_enable(struct clk *clk, bool enable) +{ + debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); + + switch (clk->id) { + case IMX6QDL_CLK_ECSPI1: + case IMX6QDL_CLK_ECSPI2: + case IMX6QDL_CLK_ECSPI3: + case IMX6QDL_CLK_ECSPI4: + return enable_spi_clk(enable, clk->id - IMX6QDL_CLK_ECSPI1); + + case IMX6QDL_CLK_USDHC1: + case IMX6QDL_CLK_USDHC2: + case IMX6QDL_CLK_USDHC3: + case IMX6QDL_CLK_USDHC4: + return enable_usdhc_clk(enable, clk->id - IMX6QDL_CLK_USDHC1); + + default: + if (clk->id < IMX6QDL_CLK_DUMMY || clk->id >= IMX6QDL_CLK_END) { + printf("%s(Invalid clk ID #%lu)\n", __func__, clk->id); + return -EINVAL; + } + return -ENOTSUPP; + } + + return 0; +} + +static int imx6q_clk_disable(struct clk *clk) +{ + return __imx6q_clk_enable(clk, 0); +} + +static int imx6q_clk_enable(struct clk *clk) +{ + return __imx6q_clk_enable(clk, 1); +} + +#if CONFIG_IS_ENABLED(CMD_CLK) +int soc_clk_dump(void) +{ + struct udevice *dev; + struct clk clk; + unsigned long rate; + int i, ret; + + ret = uclass_get_device_by_driver(UCLASS_CLK, + DM_GET_DRIVER(imx6q_clk), &dev); + if (ret) + return ret; + + printf("Clk\t\tHz\n"); + + for (i = 0; i < ARRAY_SIZE(imx6q_clk_names); i++) { + clk.id = imx6q_clk_names[i].id; + ret = clk_request(dev, &clk); + if (ret < 0) { + debug("%s clk_request() failed: %d\n", __func__, ret); + continue; + } + + ret = clk_get_rate(&clk); + rate = ret; + + clk_free(&clk); + + if (ret == -ENOTSUPP) { + printf("clk ID %lu not supported yet\n", + imx6q_clk_names[i].id); + continue; + } + if (ret < 0) { + printf("%s %lu: get_rate err: %d\n", + __func__, imx6q_clk_names[i].id, ret); + continue; + } + + printf("%s(%3lu):\t%lu\n", + imx6q_clk_names[i].name, imx6q_clk_names[i].id, rate); + } + + return 0; +} +#endif + +static struct clk_ops imx6q_clk_ops = { + .set_rate = imx6q_clk_set_rate, + .get_rate = imx6q_clk_get_rate, + .enable = imx6q_clk_enable, + .disable = imx6q_clk_disable, +}; + +static int imx6q_clk_probe(struct udevice *dev) +{ + return 0; +} + +static const struct udevice_id imx6q_clk_ids[] = { + { .compatible = "fsl,imx6q-ccm" }, + { }, +}; + +U_BOOT_DRIVER(imx6q_clk) = { + .name = "clk_imx6q", + .id = UCLASS_CLK, + .of_match = imx6q_clk_ids, + .ops = &imx6q_clk_ops, + .probe = imx6q_clk_probe, + .flags = DM_FLAG_PRE_RELOC, +}; From patchwork Sat Jan 19 09:15:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027897 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXKx4BXzz9sBZ for ; Sat, 19 Jan 2019 20:18:29 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 1289AC220AC; Sat, 19 Jan 2019 09:17:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B13CCC220C6; Sat, 19 Jan 2019 09:16:15 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 887EFC220A5; Sat, 19 Jan 2019 09:16:02 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by lists.denx.de (Postfix) with ESMTPS id ED443C220D5 for ; Sat, 19 Jan 2019 09:15:58 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43hXH21xHnz1qvvS; Sat, 19 Jan 2019 10:15:58 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43hXH21gfYz1qr5X; Sat, 19 Jan 2019 10:15:58 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id vGmgFRtbfOlD; Sat, 19 Jan 2019 10:15:57 +0100 (CET) X-Auth-Info: ttKQpm4kmqya3rT/yt7x1Xfm6+/oJGBXLuZ7aWsdev0= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:15:57 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:20 +0100 Message-Id: <20190119091528.11776-8-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Cc: Jagan Teki Subject: [U-Boot] [PATCH v1 07/15] spi: imx: Add support for 'per' clock enabling via driver model X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" With this commit one can enable ECSPI clock on imx6q without the need to define direct call to it in the board file (as it is done up to now). The information regarding proper clocks is provided via DTS description. Signed-off-by: Lukasz Majewski --- drivers/spi/mxc_spi.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index b2636909ce..371e8d8e44 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -50,6 +51,9 @@ struct mxc_spi_slave { unsigned int max_hz; unsigned int mode; struct gpio_desc ss; +#if CONFIG_IS_ENABLED(CLK) + struct clk per_clk; +#endif }; static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave) @@ -494,6 +498,19 @@ static int mxc_spi_probe(struct udevice *bus) const void *blob = gd->fdt_blob; int ret; +#if CONFIG_IS_ENABLED(CLK) + ret = clk_get_by_name(bus, "per", &mxcs->per_clk); + if (ret) { + printf("%s: Failed to get per_clk\n", __func__); + return ret; + } + + ret = clk_enable(&mxcs->per_clk); + if (ret) { + printf("%s: Failed to enable per_clk\n", __func__); + return ret; + } +#endif if (gpio_request_by_name(bus, "cs-gpios", 0, &plat->ss, GPIOD_IS_OUT)) { dev_err(bus, "No cs-gpios property\n"); From patchwork Sat Jan 19 09:15:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027899 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXMy3JTxz9sBQ for ; Sat, 19 Jan 2019 20:20:14 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id DE1AEC220C0; Sat, 19 Jan 2019 09:17:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=KHOP_BIG_TO_CC autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id AA3DCC2209D; Sat, 19 Jan 2019 09:16:37 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 88703C220EA; Sat, 19 Jan 2019 09:16:09 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by lists.denx.de (Postfix) with ESMTPS id F0D9BC220B8 for ; Sat, 19 Jan 2019 09:16:02 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43hXH536lhz1qvvN; Sat, 19 Jan 2019 10:16:01 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43hXH519hgz1qr5Y; Sat, 19 Jan 2019 10:16:01 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id iRbUDKm-DYR8; Sat, 19 Jan 2019 10:15:58 +0100 (CET) X-Auth-Info: wcQ11+YRcw4tA4ah77gnE65Hckka7/xDu7NkusFp1R4= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:15:58 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:21 +0100 Message-Id: <20190119091528.11776-9-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Cc: Tom Rini , Ian Ray , Michal Simek , Joe Hershberger , Simone CIANNI , "NXP i.MX U-Boot Team" , Raffaele RECALCATI Subject: [U-Boot] [PATCH v1 08/15] ARM: imx: Covnert mccmon6 to use DM/DTS in the u-boot proper X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This commit converts mccmon6's u-boot proper (in a single commit to avoid build breaks) to use solely DM/DTS. The DTS description of the mccmon6 has been ported from Linux kernel (v4.20, SHA1: 8fe28cb58bcb235034b64cbbb7550a8a43fd88be) Signed-off-by: Lukasz Majewski --- arch/arm/dts/imx6q-mccmon6.dts | 382 +++++++++++++++++++++++++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 7 + board/liebherr/mccmon6/mccmon6.c | 161 ----------------- configs/mccmon6_nor_defconfig | 30 ++- configs/mccmon6_sd_defconfig | 29 ++- include/configs/mccmon6.h | 18 -- 6 files changed, 444 insertions(+), 183 deletions(-) create mode 100644 arch/arm/dts/imx6q-mccmon6.dts diff --git a/arch/arm/dts/imx6q-mccmon6.dts b/arch/arm/dts/imx6q-mccmon6.dts new file mode 100644 index 0000000000..27cde56115 --- /dev/null +++ b/arch/arm/dts/imx6q-mccmon6.dts @@ -0,0 +1,382 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ or X11 + */ + +/dts-v1/; +#include +#include "imx6q.dtsi" + +/ { + model = "Liebherr Nenzig (LWN) iMX6Q"; + compatible = "lwn,imx6-mccmon6", "fsl,imx6"; + + aliases { + mmc0 = &usdhc3; + mmc1 = &usdhc2; + spi0 = &ecspi3; + }; + + chosen { + stdout-path = &uart1; + }; + + memory@10000000 { + reg = <0x10000000 0x80000000>; + }; +}; + +&ecspi3 { + cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs &pinctrl_ecspi3_flwp>; + spi-max-frequency = <25000000>; + status = "okay"; + + s25sl032p: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <40000000>; + reg = <0>; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <1>; + /* KSZ9031 PHY SKEW setup - old values * 60 ps */ + rxc-skew-ps = <1860>; + txc-skew-ps = <1860>; + txen-skew-ps = <900>; + rxdv-skew-ps = <900>; + rxd0-skew-ps = <180>; + rxd1-skew-ps = <180>; + rxd2-skew-ps = <180>; + rxd3-skew-ps = <180>; + txd0-skew-ps = <120>; + txd1-skew-ps = <300>; + txd2-skew-ps = <0>; + txd3-skew-ps = <120>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + pfuze100: pmic@8 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw1c_reg: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3a_reg: sw3a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3b_reg: sw3b { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + sw4_reg: sw4 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen6_reg: vgen6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; +}; + +&weim { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_weim_nor &pinctrl_weim_cs0>; + ranges = <0 0 0x08000000 0x08000000>; + status = "okay"; + + nor@0,0 { + compatible = "cfi-flash"; + reg = <0 0 0x02000000>; + #address-cells = <1>; + #size-cells = <1>; + bank-width = <2>; + use-advanced-sector-protection; + fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 + 0x0000c000 0x1404a38e 0x00000000>; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 + >; + }; + + pinctrl_ecspi3_cs: ecspi3csgrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 + >; + }; + + pinctrl_ecspi3_flwp: ecspi3flwpgrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x80000000 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0 + >; + }; + + pinctrl_hog: hoggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b1 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 + MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059 + >; + }; + + pinctrl_weim_cs0: weimcs0grp { + fsl,pins = < + MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0b1 + >; + }; + + pinctrl_weim_nor: weimnorgrp { + fsl,pins = < + MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1 + MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1 + MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb060 + MX6QDL_PAD_EIM_D16__EIM_DATA16 0x1b0b0 + MX6QDL_PAD_EIM_D17__EIM_DATA17 0x1b0b0 + MX6QDL_PAD_EIM_D18__EIM_DATA18 0x1b0b0 + MX6QDL_PAD_EIM_D19__EIM_DATA19 0x1b0b0 + MX6QDL_PAD_EIM_D20__EIM_DATA20 0x1b0b0 + MX6QDL_PAD_EIM_D21__EIM_DATA21 0x1b0b0 + MX6QDL_PAD_EIM_D22__EIM_DATA22 0x1b0b0 + MX6QDL_PAD_EIM_D23__EIM_DATA23 0x1b0b0 + MX6QDL_PAD_EIM_D24__EIM_DATA24 0x1b0b0 + MX6QDL_PAD_EIM_D25__EIM_DATA25 0x1b0b0 + MX6QDL_PAD_EIM_D26__EIM_DATA26 0x1b0b0 + MX6QDL_PAD_EIM_D27__EIM_DATA27 0x1b0b0 + MX6QDL_PAD_EIM_D28__EIM_DATA28 0x1b0b0 + MX6QDL_PAD_EIM_D29__EIM_DATA29 0x1b0b0 + MX6QDL_PAD_EIM_D30__EIM_DATA30 0x1b0b0 + MX6QDL_PAD_EIM_D31__EIM_DATA31 0x1b0b0 + MX6QDL_PAD_EIM_A23__EIM_ADDR23 0xb0b1 + MX6QDL_PAD_EIM_A22__EIM_ADDR22 0xb0b1 + MX6QDL_PAD_EIM_A21__EIM_ADDR21 0xb0b1 + MX6QDL_PAD_EIM_A20__EIM_ADDR20 0xb0b1 + MX6QDL_PAD_EIM_A19__EIM_ADDR19 0xb0b1 + MX6QDL_PAD_EIM_A18__EIM_ADDR18 0xb0b1 + MX6QDL_PAD_EIM_A17__EIM_ADDR17 0xb0b1 + MX6QDL_PAD_EIM_A16__EIM_ADDR16 0xb0b1 + MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1 + MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1 + MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1 + MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1 + MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1 + MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1 + MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1 + MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1 + MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1 + MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1 + MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1 + MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1 + MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1 + MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1 + MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1 + MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1 + >; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <4>; + cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <8>; + non-removable; + no-1-8-v; + keep-power-in-suspend; + status = "okay"; +}; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 3d56346ccb..3ebe205009 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -205,6 +205,13 @@ config TARGET_MCCMON6 bool "mccmon6" select MX6QDL select SUPPORT_SPL + select DM + select DM_GPIO + select DM_ETH + select DM_SERIAL + select DM_I2C + select DM_SPI + imply CMD_DM config TARGET_MX6CUBOXI bool "Solid-run mx6 boards" diff --git a/board/liebherr/mccmon6/mccmon6.c b/board/liebherr/mccmon6/mccmon6.c index 946b91f3a1..497095572e 100644 --- a/board/liebherr/mccmon6/mccmon6.c +++ b/board/liebherr/mccmon6/mccmon6.c @@ -12,17 +12,13 @@ #include #include #include -#include -#include #include #include #include #include #include -#include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; @@ -35,24 +31,11 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) -#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - -#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) - -#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ - PAD_CTL_ODE | PAD_CTL_SRE_FAST) - #define WEIM_NOR_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) #define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) -#define ETH_PHY_RESET IMX_GPIO_NR(1, 27) -#define ECSPI3_CS0 IMX_GPIO_NR(4, 24) -#define ECSPI3_FLWP IMX_GPIO_NR(4, 27) #define NOR_WP IMX_GPIO_NR(1, 1) #define DISPLAY_EN IMX_GPIO_NR(1, 2) @@ -93,45 +76,11 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { IOMUX_PADS(PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL)), }; -static iomux_v3_cfg_t const enet_pads[] = { - IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL - | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK - | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL - | MUX_PAD_CTRL(ENET_PAD_CTRL)), - /* KSZ9031 PHY Reset */ - IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - static void setup_iomux_uart(void) { SETUP_IOMUX_PADS(uart1_pads); } -static void setup_iomux_enet(void) -{ - SETUP_IOMUX_PADS(enet_pads); - - /* Reset KSZ9031 PHY */ - gpio_direction_output(ETH_PHY_RESET, 0); - mdelay(10); - gpio_set_value(ETH_PHY_RESET, 1); - udelay(100); -} - static struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR}, {USDHC2_BASE_ADDR}, @@ -273,74 +222,6 @@ static void setup_eimnor(void) eimnor_cs_setup(); } -/* mccmon6 board has SPI Flash is connected to SPI3 */ -int board_spi_cs_gpio(unsigned bus, unsigned cs) -{ - return (bus == 2 && cs == 0) ? ECSPI3_CS0 : -1; -} - -static iomux_v3_cfg_t const ecspi3_pads[] = { - /* SPI3 */ - IOMUX_PADS(PAD_DISP0_DAT3__GPIO4_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL)), - IOMUX_PADS(PAD_DISP0_DAT2__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL)), - IOMUX_PADS(PAD_DISP0_DAT1__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL)), - IOMUX_PADS(PAD_DISP0_DAT0__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL)), -}; - -void setup_spi(void) -{ - SETUP_IOMUX_PADS(ecspi3_pads); - - enable_spi_clk(true, 2); - - /* set cs0 to high */ - gpio_direction_output(ECSPI3_CS0, 1); - - /* set flwp to high */ - gpio_direction_output(ECSPI3_FLWP, 1); -} - -struct i2c_pads_info mx6q_i2c1_pad_info = { - .scl = { - .i2c_mode = MX6Q_PAD_CSI0_DAT9__I2C1_SCL - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gpio_mode = MX6Q_PAD_CSI0_DAT9__GPIO5_IO27 - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gp = IMX_GPIO_NR(5, 27) - }, - .sda = { - .i2c_mode = MX6Q_PAD_CSI0_DAT8__I2C1_SDA - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gpio_mode = MX6Q_PAD_CSI0_DAT8__GPIO5_IO26 - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gp = IMX_GPIO_NR(5, 26) - } -}; - -struct i2c_pads_info mx6q_i2c2_pad_info = { - .scl = { - .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gp = IMX_GPIO_NR(4, 12) - }, - .sda = { - .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gp = IMX_GPIO_NR(4, 13) - } -}; - -int board_eth_init(bd_t *bis) -{ - setup_iomux_enet(); - - return cpu_eth_init(bis); -} - int board_early_init_f(void) { setup_iomux_uart(); @@ -356,10 +237,6 @@ int board_init(void) gpio_direction_output(DISPLAY_EN, 1); setup_eimnor(); - setup_spi(); - - setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c1_pad_info); - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c2_pad_info); return 0; } @@ -378,44 +255,6 @@ int checkboard(void) return 0; } -int board_phy_config(struct phy_device *phydev) -{ - /* - * Default setting for GMII Clock Pad Skew Register 0x1EF: - * MMD Address 0x2h, Register 0x8h - * - * GTX_CLK Pad Skew 0xF -> 0.9 nsec skew - * RX_CLK Pad Skew 0xF -> 0.9 nsec skew - * - * Adjustment -> write 0x3FF: - * GTX_CLK Pad Skew 0x1F -> 1.8 nsec skew - * RX_CLK Pad Skew 0x1F -> 1.8 nsec skew - * - */ - ksz9031_phy_extended_write(phydev, 0x2, - MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x3FF); - - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x00FF); - - ksz9031_phy_extended_write(phydev, 0x2, - MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x3333); - - ksz9031_phy_extended_write(phydev, 0x2, - MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x2052); - - if (phydev->drv->config) - phydev->drv->config(phydev); - - return 0; -} - #ifdef CONFIG_SPL_BOARD_INIT void spl_board_init(void) { diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 80a4fcccdc..9dea3a5b23 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -9,23 +9,35 @@ CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_nor.cfg" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_CMD_CLK=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +# CONFIG_CMD_PINMUX is not set CONFIG_CMD_SF=y CONFIG_CMD_CACHE=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=8000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x40000(u-boot-env.nor),1m@0x80000(u-boot.nor),8m@0x180000(kernel.nor),8m@0x980000(swupdate-kernel.nor),8m@0x1180000(swupdate-rootfs.nor),128k@0x1980000(kernel-dtb.nor),128k@0x19C0000(swupdate-kernel-dtb.nor)" +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6" CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y +CONFIG_CLK_IMX6Q=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_I2C_MXC=y +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y @@ -35,13 +47,27 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_PMIC=y +# CONFIG_SPL_PMIC_CHILDREN is not set +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set +# CONFIG_SPECIFY_CONSOLE_INDEX is not set +# CONFIG_SPL_SERIAL_PRESENT is not set +# CONFIG_TPL_SERIAL_PRESENT is not set +CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y -CONFIG_OF_LIBFDT=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 7199be2f5c..86acd3cefe 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -10,23 +10,35 @@ CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_sd.cfg" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_CMD_CLK=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +# CONFIG_CMD_PINMUX is not set CONFIG_CMD_SF=y CONFIG_CMD_CACHE=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=8000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x40000(u-boot-env.nor),1m@0x80000(u-boot.nor),8m@0x180000(kernel.nor),8m@0x980000(swupdate-kernel.nor),8m@0x1180000(swupdate-rootfs.nor),128k@0x1980000(kernel-dtb.nor),128k@0x19C0000(swupdate-kernel-dtb.nor)" +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6" CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y +CONFIG_CLK_IMX6Q=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_I2C_MXC=y +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y @@ -36,13 +48,26 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_PMIC=y +# CONFIG_SPL_PMIC_CHILDREN is not set +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set +# CONFIG_SPL_SERIAL_PRESENT is not set +# CONFIG_TPL_SERIAL_PRESENT is not set +CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 5ca9bc6848..f72d8cba2b 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -34,27 +34,12 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) -#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_LATE_INIT - -#define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) -#define CONFIG_SF_DEFAULT_BUS 2 -#define CONFIG_SF_DEFAULT_CS 0 -#define CONFIG_SF_DEFAULT_SPEED 25000000 -#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) - -/* I2C Configs */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_SPEED 100000 - /* MMC Configuration */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 @@ -71,10 +56,7 @@ #define CONFIG_SYS_FLASH_BANKS_SIZES { (32 * SZ_1M) } /* Ethernet Configuration */ -#define CONFIG_FEC_MXC #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 1 #define CONFIG_EXTRA_ENV_SETTINGS \ From patchwork Sat Jan 19 09:15:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027908 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXTR65pTz9sBQ for ; Sat, 19 Jan 2019 20:24:59 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 8D401C21E9F; Sat, 19 Jan 2019 09:19:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.8 required=5.0 tests=UPPERCASE_50_75 autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 02425C220AE; Sat, 19 Jan 2019 09:17:13 +0000 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(85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:16:01 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:22 +0100 Message-Id: <20190119091528.11776-10-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Cc: Tom Rini Subject: [U-Boot] [PATCH v1 09/15] ARM: imx: Decouple mccmon6's SPL and u-boot proper code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The mccmon6 has been used a "mixed" approach between SPL and u-boot proper sources. This commit decoupes SPL and u-boot proper, which allows clear distinction between those two code bases and facilitates conversion to DM/DTS on this particular board. Signed-off-by: Lukasz Majewski --- board/liebherr/mccmon6/Makefile | 7 +- board/liebherr/mccmon6/mccmon6.c | 285 --------------------------------------- board/liebherr/mccmon6/spl.c | 266 +++++++++++++++++++++++++++++++++++- 3 files changed, 268 insertions(+), 290 deletions(-) diff --git a/board/liebherr/mccmon6/Makefile b/board/liebherr/mccmon6/Makefile index ead6750ebf..3c9786c6b7 100644 --- a/board/liebherr/mccmon6/Makefile +++ b/board/liebherr/mccmon6/Makefile @@ -2,5 +2,8 @@ # # (C) Copyright 2016-2017 # Lukasz Majewski, DENX Software Engineering, lukma@denx.de - -obj-y := mccmon6.o spl.o +ifdef CONFIG_SPL_BUILD +obj-y := spl.o +else +obj-y := mccmon6.o +endif diff --git a/board/liebherr/mccmon6/mccmon6.c b/board/liebherr/mccmon6/mccmon6.c index 497095572e..33b28aca11 100644 --- a/board/liebherr/mccmon6/mccmon6.c +++ b/board/liebherr/mccmon6/mccmon6.c @@ -8,37 +8,11 @@ #include #include #include -#include #include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include DECLARE_GLOBAL_DATA_PTR; -#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ - PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define WEIM_NOR_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) - -#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) -#define NOR_WP IMX_GPIO_NR(1, 1) -#define DISPLAY_EN IMX_GPIO_NR(1, 2) - int dram_init(void) { gd->ram_size = imx_ddr_size(); @@ -46,198 +20,11 @@ int dram_init(void) return 0; } -static iomux_v3_cfg_t const uart1_pads[] = { - IOMUX_PADS(PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), - IOMUX_PADS(PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), -}; - -static iomux_v3_cfg_t const usdhc2_pads[] = { - IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - /* Carrier MicroSD Card Detect */ - IOMUX_PADS(PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - -static iomux_v3_cfg_t const usdhc3_pads[] = { - IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL)), -}; - -static void setup_iomux_uart(void) -{ - SETUP_IOMUX_PADS(uart1_pads); -} - -static struct fsl_esdhc_cfg usdhc_cfg[2] = { - {USDHC3_BASE_ADDR}, - {USDHC2_BASE_ADDR}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC2_BASE_ADDR: - ret = !gpio_get_value(USDHC2_CD_GPIO); - break; - case USDHC3_BASE_ADDR: - /* - * eMMC don't have card detect pin - since it is soldered to the - * PCB board - */ - ret = 1; - break; - } - return ret; -} - -int board_mmc_init(bd_t *bis) -{ - int ret; - u32 index = 0; - - /* - * MMC MAP - * (U-Boot device node) (Physical Port) - * mmc0 Soldered on board eMMC device - * mmc1 MicroSD card - */ - for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { - switch (index) { - case 0: - SETUP_IOMUX_PADS(usdhc3_pads); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - usdhc_cfg[0].max_bus_width = 8; - break; - case 1: - SETUP_IOMUX_PADS(usdhc2_pads); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - usdhc_cfg[1].max_bus_width = 4; - gpio_direction_input(USDHC2_CD_GPIO); - break; - default: - printf("Warning: More USDHC controllers (%d) than supported (%d)\n", - index + 1, CONFIG_SYS_FSL_USDHC_NUM); - return -EINVAL; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); - if (ret) - return ret; - } - - return 0; -} - -static iomux_v3_cfg_t const eimnor_pads[] = { - IOMUX_PADS(PAD_EIM_D16__EIM_DATA16 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D17__EIM_DATA17 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D18__EIM_DATA18 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D19__EIM_DATA19 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D20__EIM_DATA20 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D21__EIM_DATA21 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D22__EIM_DATA22 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D23__EIM_DATA23 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D24__EIM_DATA24 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D25__EIM_DATA25 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D26__EIM_DATA26 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D27__EIM_DATA27 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D28__EIM_DATA28 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D29__EIM_DATA29 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D30__EIM_DATA30 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D31__EIM_DATA31 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA0__EIM_AD00 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA1__EIM_AD01 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA2__EIM_AD02 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA3__EIM_AD03 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA4__EIM_AD04 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA5__EIM_AD05 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA6__EIM_AD06 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA7__EIM_AD07 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA8__EIM_AD08 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA9__EIM_AD09 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA10__EIM_AD10 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA11__EIM_AD11 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA12__EIM_AD12 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA13__EIM_AD13 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA14__EIM_AD14 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_DA15__EIM_AD15 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_A16__EIM_ADDR16 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_A17__EIM_ADDR17 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_A18__EIM_ADDR18 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_A19__EIM_ADDR19 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_A20__EIM_ADDR20 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_A21__EIM_ADDR21 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_A22__EIM_ADDR22 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_A23__EIM_ADDR23 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_A24__EIM_ADDR24 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_A25__EIM_ADDR25 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_OE__EIM_OE_B | MUX_PAD_CTRL(NO_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_RW__EIM_RW | MUX_PAD_CTRL(NO_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_CS0__EIM_CS0_B | MUX_PAD_CTRL(NO_PAD_CTRL)), - IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - -static void eimnor_cs_setup(void) -{ - struct weim *weim_regs = (struct weim *)WEIM_BASE_ADDR; - - - /* NOR configuration */ - writel(0x00620181, &weim_regs->cs0gcr1); - writel(0x00000001, &weim_regs->cs0gcr2); - writel(0x0b020000, &weim_regs->cs0rcr1); - writel(0x0000b000, &weim_regs->cs0rcr2); - writel(0x0804a240, &weim_regs->cs0wcr1); - writel(0x00000000, &weim_regs->cs0wcr2); - - writel(0x00000120, &weim_regs->wcr); - writel(0x00000010, &weim_regs->wiar); - writel(0x00000000, &weim_regs->ear); - - set_chipselect_size(CS0_128); -} - -static void setup_eimnor(void) -{ - SETUP_IOMUX_PADS(eimnor_pads); - gpio_direction_output(NOR_WP, 1); - - enable_eim_clk(1); - eimnor_cs_setup(); -} - -int board_early_init_f(void) -{ - setup_iomux_uart(); - - return 0; -} - int board_init(void) { /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; - gpio_direction_output(DISPLAY_EN, 1); - - setup_eimnor(); - return 0; } @@ -254,75 +41,3 @@ int checkboard(void) return 0; } - -#ifdef CONFIG_SPL_BOARD_INIT -void spl_board_init(void) -{ - setup_eimnor(); - - gpio_direction_output(DISPLAY_EN, 1); -} -#endif /* CONFIG_SPL_BOARD_INIT */ - -#ifdef CONFIG_SPL_BUILD -void board_boot_order(u32 *spl_boot_list) -{ - switch (spl_boot_device()) { - case BOOT_DEVICE_MMC2: - case BOOT_DEVICE_MMC1: - spl_boot_list[0] = BOOT_DEVICE_MMC2; - spl_boot_list[1] = BOOT_DEVICE_MMC1; - break; - - case BOOT_DEVICE_NOR: - spl_boot_list[0] = BOOT_DEVICE_NOR; - break; - } -} -#endif /* CONFIG_SPL_BUILD */ - -#ifdef CONFIG_SPL_OS_BOOT -int spl_start_uboot(void) -{ - char s[16]; - int ret; - /* - * We use BOOT_DEVICE_MMC1, but SD card is connected - * to MMC2 - * - * Correct "mapping" is delivered in board defined - * board_boot_order() function. - * - * SD card boot is regarded as a "development" one, - * hence we _always_ go through the u-boot. - * - */ - if (spl_boot_device() == BOOT_DEVICE_MMC1) - return 1; - - /* break into full u-boot on 'c' */ - if (serial_tstc() && serial_getc() == 'c') - return 1; - - env_init(); - ret = env_get_f("boot_os", s, sizeof(s)); - if ((ret != -1) && (strcmp(s, "no") == 0)) - return 1; - - /* - * Check if SWUpdate recovery needs to be started - * - * recovery_status = NULL (not set - ret == -1) -> normal operation - * - * recovery_status = progress or - * recovery_status = failed or - * recovery_status = -> start SWUpdate - * - */ - ret = env_get_f("recovery_status", s, sizeof(s)); - if (ret != -1) - return 1; - - return 0; -} -#endif /* CONFIG_SPL_OS_BOOT */ diff --git a/board/liebherr/mccmon6/spl.c b/board/liebherr/mccmon6/spl.c index acfc4902c1..afd080fe26 100644 --- a/board/liebherr/mccmon6/spl.c +++ b/board/liebherr/mccmon6/spl.c @@ -20,7 +20,6 @@ #include #include -#if defined(CONFIG_SPL_BUILD) #include /* * Driving strength: @@ -274,6 +273,20 @@ static void spl_dram_init(void) udelay(100); } +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const uart1_pads[] = { + IOMUX_PADS(PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), +}; + +static void setup_iomux_uart(void) +{ + SETUP_IOMUX_PADS(uart1_pads); +} + void board_init_f(ulong dummy) { ccgr_init(); @@ -284,7 +297,7 @@ void board_init_f(ulong dummy) gpr_init(); /* iomux */ - board_early_init_f(); + setup_iomux_uart(); /* setup GP timer */ timer_init(); @@ -295,4 +308,251 @@ void board_init_f(ulong dummy) /* DDR initialization */ spl_dram_init(); } -#endif + +void board_boot_order(u32 *spl_boot_list) +{ + switch (spl_boot_device()) { + case BOOT_DEVICE_MMC2: + case BOOT_DEVICE_MMC1: + spl_boot_list[0] = BOOT_DEVICE_MMC2; + spl_boot_list[1] = BOOT_DEVICE_MMC1; + break; + + case BOOT_DEVICE_NOR: + spl_boot_list[0] = BOOT_DEVICE_NOR; + break; + } +} + +#ifdef CONFIG_SPL_OS_BOOT +int spl_start_uboot(void) +{ + char s[16]; + int ret; + /* + * We use BOOT_DEVICE_MMC1, but SD card is connected + * to MMC2 + * + * Correct "mapping" is delivered in board defined + * board_boot_order() function. + * + * SD card boot is regarded as a "development" one, + * hence we _always_ go through the u-boot. + * + */ + if (spl_boot_device() == BOOT_DEVICE_MMC1) + return 1; + + /* break into full u-boot on 'c' */ + if (serial_tstc() && serial_getc() == 'c') + return 1; + + env_init(); + ret = env_get_f("boot_os", s, sizeof(s)); + if ((ret != -1) && (strcmp(s, "no") == 0)) + return 1; + + /* + * Check if SWUpdate recovery needs to be started + * + * recovery_status = NULL (not set - ret == -1) -> normal operation + * + * recovery_status = progress or + * recovery_status = failed or + * recovery_status = -> start SWUpdate + * + */ + ret = env_get_f("recovery_status", s, sizeof(s)); + if (ret != -1) + return 1; + + return 0; +} +#endif /* CONFIG_SPL_OS_BOOT */ + +#define WEIM_NOR_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define NOR_WP IMX_GPIO_NR(1, 1) + +static iomux_v3_cfg_t const eimnor_pads[] = { + IOMUX_PADS(PAD_EIM_D16__EIM_DATA16 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D17__EIM_DATA17 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D18__EIM_DATA18 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D19__EIM_DATA19 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D20__EIM_DATA20 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D21__EIM_DATA21 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D22__EIM_DATA22 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D23__EIM_DATA23 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D24__EIM_DATA24 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D25__EIM_DATA25 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D26__EIM_DATA26 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D27__EIM_DATA27 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D28__EIM_DATA28 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D29__EIM_DATA29 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D30__EIM_DATA30 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D31__EIM_DATA31 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA0__EIM_AD00 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA1__EIM_AD01 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA2__EIM_AD02 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA3__EIM_AD03 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA4__EIM_AD04 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA5__EIM_AD05 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA6__EIM_AD06 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA7__EIM_AD07 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA8__EIM_AD08 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA9__EIM_AD09 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA10__EIM_AD10 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA11__EIM_AD11 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA12__EIM_AD12 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA13__EIM_AD13 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA14__EIM_AD14 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_DA15__EIM_AD15 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A16__EIM_ADDR16 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A17__EIM_ADDR17 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A18__EIM_ADDR18 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A19__EIM_ADDR19 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A20__EIM_ADDR20 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A21__EIM_ADDR21 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A22__EIM_ADDR22 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A23__EIM_ADDR23 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A24__EIM_ADDR24 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A25__EIM_ADDR25 | MUX_PAD_CTRL(WEIM_NOR_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_OE__EIM_OE_B | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_RW__EIM_RW | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_CS0__EIM_CS0_B | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + +static void eimnor_cs_setup(void) +{ + struct weim *weim_regs = (struct weim *)WEIM_BASE_ADDR; + + /* NOR configuration */ + writel(0x00620181, &weim_regs->cs0gcr1); + writel(0x00000001, &weim_regs->cs0gcr2); + writel(0x0b020000, &weim_regs->cs0rcr1); + writel(0x0000b000, &weim_regs->cs0rcr2); + writel(0x0804a240, &weim_regs->cs0wcr1); + writel(0x00000000, &weim_regs->cs0wcr2); + + writel(0x00000120, &weim_regs->wcr); + writel(0x00000010, &weim_regs->wiar); + writel(0x00000000, &weim_regs->ear); + + set_chipselect_size(CS0_128); +} + +static void setup_eimnor(void) +{ + SETUP_IOMUX_PADS(eimnor_pads); + gpio_direction_output(NOR_WP, 1); + + enable_eim_clk(1); + eimnor_cs_setup(); +} + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) + +static iomux_v3_cfg_t const usdhc2_pads[] = { + IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + /* Carrier MicroSD Card Detect */ + IOMUX_PADS(PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { + IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL)), +}; + +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR}, + {USDHC2_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC2_BASE_ADDR: + ret = !gpio_get_value(USDHC2_CD_GPIO); + break; + case USDHC3_BASE_ADDR: + /* + * eMMC don't have card detect pin - since it is soldered to the + * PCB board + */ + ret = 1; + break; + } + return ret; +} + +int board_mmc_init(bd_t *bis) +{ + int ret; + u32 index = 0; + + /* + * MMC MAP + * (U-Boot device node) (Physical Port) + * mmc0 Soldered on board eMMC device + * mmc1 MicroSD card + */ + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + SETUP_IOMUX_PADS(usdhc3_pads); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[0].max_bus_width = 8; + break; + case 1: + SETUP_IOMUX_PADS(usdhc2_pads); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + usdhc_cfg[1].max_bus_width = 4; + gpio_direction_input(USDHC2_CD_GPIO); + break; + default: + printf("Warning: More USDHC controllers (%d) than supported (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return -EINVAL; + } + + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + if (ret) + return ret; + } + + return 0; +} + +#ifdef CONFIG_SPL_BOARD_INIT +#define DISPLAY_EN IMX_GPIO_NR(1, 2) +void spl_board_init(void) +{ + setup_eimnor(); + + gpio_direction_output(DISPLAY_EN, 1); +} +#endif /* CONFIG_SPL_BOARD_INIT */ From patchwork Sat Jan 19 09:15:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027904 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXQz6w9wz9sBQ for ; Sat, 19 Jan 2019 20:22:51 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id AAB30C220AF; Sat, 19 Jan 2019 09:20:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 3F7CAC22108; Sat, 19 Jan 2019 09:17:18 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 5F1CEC220DC; Sat, 19 Jan 2019 09:16:09 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by lists.denx.de (Postfix) with ESMTPS id C6174C220AE for ; Sat, 19 Jan 2019 09:16:04 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43hXH84XJnz1qvvc; Sat, 19 Jan 2019 10:16:04 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43hXH84N1Yz1qr5X; Sat, 19 Jan 2019 10:16:04 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id nIkm6nTAIHGu; Sat, 19 Jan 2019 10:16:03 +0100 (CET) X-Auth-Info: yxWYzy94ax2p+3LfjP8lHF18EuIYLbPeb4+DLQJb/eA= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:16:03 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:23 +0100 Message-Id: <20190119091528.11776-11-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Cc: Tom Rini Subject: [U-Boot] [PATCH v1 10/15] ARM: imx: Disable 1Gbps support on MCCMON6's KSZ9031 PHY X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" mccmon6 works in 10/100 MiB Ethernet environment, so disabling 1GiB support improves robustness of the network after power up (as one don't need to wait for autoneg). Signed-off-by: Lukasz Majewski --- include/configs/mccmon6.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index f72d8cba2b..b25aacbf41 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -65,6 +65,7 @@ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "boot_os=yes\0" \ + "disable_giga=yes\0" \ "download_kernel=" \ "tftpboot ${kernel_addr} ${kernel_file};" \ "tftpboot ${fdt_addr} ${fdtfile};\0" \ From patchwork Sat Jan 19 09:15:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027903 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXQm5rDmz9sBQ for ; Sat, 19 Jan 2019 20:22:40 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 64B51C220C7; Sat, 19 Jan 2019 09:20:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=KHOP_BIG_TO_CC autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A3DF1C22109; Sat, 19 Jan 2019 09:17:25 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id D4A5FC22113; Sat, 19 Jan 2019 09:16:11 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by lists.denx.de (Postfix) with ESMTPS id 6EE4FC22103 for ; Sat, 19 Jan 2019 09:16:07 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43hXHB42Wmz1qvvc; Sat, 19 Jan 2019 10:16:06 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43hXHB2SXxz1qr5X; Sat, 19 Jan 2019 10:16:06 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id WpTp66L0XJob; Sat, 19 Jan 2019 10:16:04 +0100 (CET) X-Auth-Info: 65H1sVsa0nmNaOr75CfBjqwLHUGzczFp0C2APnzpB00= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:16:04 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:24 +0100 Message-Id: <20190119091528.11776-12-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Cc: Heinrich Schuchardt , Joe Hershberger , Andre Przywara , Michal Simek , Miquel Raynal , Maxime Ripard , Jagan Teki Subject: [U-Boot] [PATCH v1 11/15] Kconfig: Make CMD_SPL_NAND_OFS only available when proper memory is used X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This commit makes the CMD_SPL_NAND_OFS only visible when we use NAND memory. Before this change it was present when only CMD_SPL was enabled (and would stay when board with other falcon boot medium is used). Signed-off-by: Lukasz Majewski --- cmd/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/cmd/Kconfig b/cmd/Kconfig index ea1a325eb3..bc08b935a5 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -316,6 +316,7 @@ config CMD_SPL config CMD_SPL_NAND_OFS hex "Offset of OS command line args for Falcon-mode NAND boot" depends on CMD_SPL + depends on CMD_SPL && (TPL_NAND_SUPPORT || SPL_NAND_SUPPORT) default 0 help This provides the offset of the command line arguments for Linux From patchwork Sat Jan 19 09:15:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027905 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXRd3gXTz9sBQ for ; Sat, 19 Jan 2019 20:23:25 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 307CFC220C0; Sat, 19 Jan 2019 09:19:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=KHOP_BIG_TO_CC autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BF7E4C220D5; Sat, 19 Jan 2019 09:17:08 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 01474C220A5; Sat, 19 Jan 2019 09:16:12 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by lists.denx.de (Postfix) with ESMTPS id BC648C220EF for ; Sat, 19 Jan 2019 09:16:08 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43hXHD3x9Jz1qvvN; Sat, 19 Jan 2019 10:16:08 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43hXHD2qqdz1qr5Y; Sat, 19 Jan 2019 10:16:08 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id J0rJPcJv1AsR; Sat, 19 Jan 2019 10:16:06 +0100 (CET) X-Auth-Info: /iThZ66QECd2+yqM77RrJ2ygW0PkLRGW3bszCcy0HRg= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:16:06 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:25 +0100 Message-Id: <20190119091528.11776-13-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Cc: Heinrich Schuchardt , Joe Hershberger , Andre Przywara , Michal Simek , Miquel Raynal , Maxime Ripard , Jagan Teki Subject: [U-Boot] [PATCH v1 12/15] Kconfig: cosmetic: Update description of CMD_SPL_NAND_OFS X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The CMD_SPL_NAND_OFS description was a bit misleading, has been updated. Signed-off-by: Lukasz Majewski --- cmd/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index bc08b935a5..f9a668b80f 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -314,8 +314,7 @@ config CMD_SPL command. config CMD_SPL_NAND_OFS - hex "Offset of OS command line args for Falcon-mode NAND boot" - depends on CMD_SPL + hex "Offset of OS args or dtb for Falcon-mode NAND boot" depends on CMD_SPL && (TPL_NAND_SUPPORT || SPL_NAND_SUPPORT) default 0 help From patchwork Sat Jan 19 09:15:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027907 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXSZ3KsFz9sBZ for ; Sat, 19 Jan 2019 20:24:14 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 24441C220BB; Sat, 19 Jan 2019 09:20:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0289BC220BD; Sat, 19 Jan 2019 09:17:14 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id A596EC220B2; Sat, 19 Jan 2019 09:16:14 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) by lists.denx.de (Postfix) with ESMTPS id 87C92C220AC for ; Sat, 19 Jan 2019 09:16:10 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43hXHG2CbNz1qvyZ; Sat, 19 Jan 2019 10:16:10 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43hXHG1tHJz1qr5X; Sat, 19 Jan 2019 10:16:10 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id 8DhpSGoNEE1o; Sat, 19 Jan 2019 10:16:08 +0100 (CET) X-Auth-Info: jyyvV8j00z5jKI1sFWVGakC4xsAFO1d12E3Cu19Cul8= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:16:08 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:26 +0100 Message-Id: <20190119091528.11776-14-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Cc: Joe Hershberger , Heinrich Schuchardt , Michal Simek , Miquel Raynal , Maxime Ripard , Jagan Teki Subject: [U-Boot] [PATCH v1 13/15] Kconfig: Add CMD_SPL_NOR_OFS config for falcon boot argument offset X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This option will provide the offset in the parallel NOR flash memory to, which the falcon boot data is stored. Signed-off-by: Lukasz Majewski --- cmd/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/cmd/Kconfig b/cmd/Kconfig index f9a668b80f..e37d28e86a 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -323,6 +323,14 @@ config CMD_SPL_NAND_OFS for full information about how to use this option (and also see board/gateworks/gw_ventana/README for an example). +config CMD_SPL_NOR_OFS + hex "Offset of OS args or dtb for Falcon-mode NOR boot" + depends on CMD_SPL && SPL_NOR_SUPPORT + default 0 + help + This provides the offset of the command line arguments or dtb for + Linux when booting from NOR in Falcon mode. + config CMD_SPL_WRITE_SIZE hex "Size of argument area" depends on CMD_SPL From patchwork Sat Jan 19 09:15:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027902 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXPn1gX7z9sBQ for ; Sat, 19 Jan 2019 20:21:49 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id E9251C21E9F; Sat, 19 Jan 2019 09:18:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B245DC220BB; Sat, 19 Jan 2019 09:16:55 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 8FF32C220AC; Sat, 19 Jan 2019 09:16:16 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) by lists.denx.de (Postfix) with ESMTPS id 1D9E9C220CA for ; Sat, 19 Jan 2019 09:16:12 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43hXHH6dNcz1qvyt; Sat, 19 Jan 2019 10:16:11 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43hXHH6Sq8z1qr5Z; Sat, 19 Jan 2019 10:16:11 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id aGZacWkRTdIW; Sat, 19 Jan 2019 10:16:10 +0100 (CET) X-Auth-Info: E0LGQ5QrGmpnmz0tUgd7emXx4bgCIH7stE4lIEJhOO0= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:16:10 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:27 +0100 Message-Id: <20190119091528.11776-15-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Subject: [U-Boot] [PATCH v1 14/15] doc: Update parallel NOR flash related information in README.falcon X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This commit updates the doc/README.falcon regarding Falcon boot on NOR flash memories. Signed-off-by: Lukasz Majewski --- doc/README.falcon | 3 +++ 1 file changed, 3 insertions(+) diff --git a/doc/README.falcon b/doc/README.falcon index 9a7f0bc235..204f4b12b6 100644 --- a/doc/README.falcon +++ b/doc/README.falcon @@ -67,6 +67,9 @@ CONFIG_SYS_NAND_SPL_KERNEL_OFFS Offset in NAND where the kernel is stored CONFIG_CMD_SPL_NAND_OFS Offset in NAND where the parameters area was saved. +CONFIG_CMD_SPL_NOR_OFS Offset in NOR where the parameters area was saved. + (Please refer to MCCMON6 board's configuraiton) + CONFIG_CMD_SPL_WRITE_SIZE Size of the parameters area to be copied CONFIG_SPL_OS_BOOT Activate Falcon Mode. From patchwork Sat Jan 19 09:15:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1027906 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hXSY5gp5z9sBQ for ; Sat, 19 Jan 2019 20:24:13 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 67DC3C220B8; Sat, 19 Jan 2019 09:18:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BDC02C220F1; Sat, 19 Jan 2019 09:16:53 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 98724C220BA; Sat, 19 Jan 2019 09:16:17 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by lists.denx.de (Postfix) with ESMTPS id AA280C220D8 for ; Sat, 19 Jan 2019 09:16:13 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43hXHK3gGMz1qvvS; Sat, 19 Jan 2019 10:16:13 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43hXHK3RQNz1qr5Z; Sat, 19 Jan 2019 10:16:13 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id MsUC7HnWP3mR; Sat, 19 Jan 2019 10:16:12 +0100 (CET) X-Auth-Info: AFY2o7gm2vKeLsQiZbRO2Cya7yCdee/0NN8kDBOBaOQ= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sat, 19 Jan 2019 10:16:12 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam Date: Sat, 19 Jan 2019 10:15:28 +0100 Message-Id: <20190119091528.11776-16-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190119091528.11776-1-lukma@denx.de> References: <20190119091528.11776-1-lukma@denx.de> Subject: [U-Boot] [PATCH v1 15/15] imx: Convert mccmon6 to use fitImage instead of uImage+DTB X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This commit enabled support for fitImage on mccmon6 when we switch to DT/DTS. Moreover, it provides Falcon boot functionality to parallel NOR flash memories (spl_nor.c). Signed-off-by: Lukasz Majewski --- board/liebherr/mccmon6/spl.c | 7 ++++++ common/spl/spl_nor.c | 5 ++++ configs/mccmon6_nor_defconfig | 8 +++++- configs/mccmon6_sd_defconfig | 6 ++++- include/configs/mccmon6.h | 57 +++++++++++++++++-------------------------- 5 files changed, 47 insertions(+), 36 deletions(-) diff --git a/board/liebherr/mccmon6/spl.c b/board/liebherr/mccmon6/spl.c index afd080fe26..c5cfea2a55 100644 --- a/board/liebherr/mccmon6/spl.c +++ b/board/liebherr/mccmon6/spl.c @@ -324,6 +324,13 @@ void board_boot_order(u32 *spl_boot_list) } } +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + return 0; +} +#endif + #ifdef CONFIG_SPL_OS_BOOT int spl_start_uboot(void) { diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c index 969e319de0..c9364072f3 100644 --- a/common/spl/spl_nor.c +++ b/common/spl/spl_nor.c @@ -48,6 +48,11 @@ static int spl_nor_load_image(struct spl_image_info *spl_image, CONFIG_SYS_OS_BASE, (void *)header); +#ifdef CONFIG_SYS_SPL_ARGS_ADDR + memcpy((void *)CONFIG_SYS_SPL_ARGS_ADDR, + (void *)CONFIG_CMD_SPL_NOR_OFS, + CONFIG_CMD_SPL_WRITE_SIZE); +#endif return ret; } #endif diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 9dea3a5b23..e4774d53da 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -10,11 +10,17 @@ CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y +CONFIG_SPL_LOAD_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_nor.cfg" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_OS_BASE=0x8180000 +CONFIG_CMD_SPL=y +CONFIG_CMD_SPL_NOR_OFS=0x09600000 +CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_CLK=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -27,7 +33,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=8000000.nor" -CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x40000(u-boot-env.nor),1m@0x80000(u-boot.nor),8m@0x180000(kernel.nor),8m@0x980000(swupdate-kernel.nor),8m@0x1180000(swupdate-rootfs.nor),128k@0x1980000(kernel-dtb.nor),128k@0x19C0000(swupdate-kernel-dtb.nor)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x40000(u-boot-env.nor),1m@0x80000(u-boot.nor),8m@0x180000(kernel.nor),8m@0x980000(swupdate-kernel.nor),8m@0x1180000(swupdate-rootfs.nor)" CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6" CONFIG_ENV_IS_IN_FLASH=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 86acd3cefe..926ca76cf4 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -11,11 +11,15 @@ CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y +CONFIG_SPL_LOAD_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_sd.cfg" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_CMD_SPL=y +CONFIG_CMD_SPL_NOR_OFS=0x09600000 +CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_CLK=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -28,7 +32,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=8000000.nor" -CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x40000(u-boot-env.nor),1m@0x80000(u-boot.nor),8m@0x180000(kernel.nor),8m@0x980000(swupdate-kernel.nor),8m@0x1180000(swupdate-rootfs.nor),128k@0x1980000(kernel-dtb.nor),128k@0x19C0000(swupdate-kernel-dtb.nor)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x40000(u-boot-env.nor),1m@0x80000(u-boot.nor),8m@0x180000(kernel.nor),8m@0x980000(swupdate-kernel.nor),8m@0x1180000(swupdate-rootfs.nor)" CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6" CONFIG_ENV_IS_IN_FLASH=y diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index b25aacbf41..c685de6551 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -14,10 +14,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x80000) -#define CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + 0x180000) -#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + 0x1980000) -#define CONFIG_SYS_FDT_SIZE (48 * SZ_1K) #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 /* @@ -28,8 +24,7 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR (0x800) #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (0x80) #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR (0x1000) -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6q-mccmon.dtb" +#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "fitImage" /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) @@ -61,14 +56,13 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200 quiet\0" \ - "fdtfile=imx6q-mccmon6.dtb\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "boot_os=yes\0" \ + "kernelsize=0x300000\0" \ "disable_giga=yes\0" \ "download_kernel=" \ - "tftpboot ${kernel_addr} ${kernel_file};" \ - "tftpboot ${fdt_addr} ${fdtfile};\0" \ + "tftpboot ${loadaddr} ${kernel_file};\0" \ "get_boot_medium=" \ "setenv boot_medium nor;" \ "setexpr.l _src_sbmr1 *0x020d8004;" \ @@ -76,10 +70,7 @@ "if test ${_b_medium} = 40; then " \ "setenv boot_medium sdcard;" \ "fi\0" \ - "kernel_file=uImage\0" \ - "load_kernel=" \ - "load mmc ${bootdev}:${bootpart} ${kernel_addr} uImage;" \ - "load mmc ${bootdev}:${bootpart} ${fdt_addr} ${fdtfile};\0" \ + "kernel_file=fitImage\0" \ "boot_sd=" \ "echo '#######################';" \ "echo '# Factory SDcard Boot #';" \ @@ -90,12 +81,11 @@ "run factory_flash_img;\0" \ "boot_nor=" \ "setenv kernelnor 0x08180000;" \ - "setenv dtbnor 0x09980000;" \ "setenv bootargs console=${console} " \ CONFIG_MTDPARTS_DEFAULT " " \ "root=/dev/mmcblk1 rootfstype=ext4 rw rootwait noinitrd;" \ - "cp.l ${dtbnor} ${dtbloadaddr} 0x8000;" \ - "bootm ${kernelnor} - ${dtbloadaddr};\0" \ + "cp.l ${kernelnor} ${loadaddr} ${kernelsize};" \ + "bootm ${loadaddr};reset;\0" \ "boot_recovery=" \ "echo '#######################';" \ "echo '# RECOVERY SWU Boot #';" \ @@ -103,14 +93,13 @@ "setenv rootfsloadaddr 0x13000000;" \ "setenv swukernelnor 0x08980000;" \ "setenv swurootfsnor 0x09180000;" \ - "setenv swudtbnor 0x099A0000;" \ "setenv bootargs console=${console} " \ CONFIG_MTDPARTS_DEFAULT " " \ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ ":${hostname}::off root=/dev/ram rw;" \ "cp.l ${swurootfsnor} ${rootfsloadaddr} 0x200000;" \ - "cp.l ${swudtbnor} ${dtbloadaddr} 0x8000;" \ - "bootm ${swukernelnor} ${rootfsloadaddr} ${dtbloadaddr};\0" \ + "cp.l ${swukernelnor} ${loadaddr} ${kernelsize};" \ + "bootm ${loadaddr} ${rootfsloadaddr};reset;\0" \ "boot_tftp=" \ "echo '#######################';" \ "echo '# TFTP Boot #';" \ @@ -118,7 +107,7 @@ "if run download_kernel; then " \ "setenv bootargs console=${console} " \ "root=/dev/mmcblk0p2 rootwait;" \ - "bootm ${kernel_addr} - ${fdt_addr};" \ + "bootm $loadaddr};reset;" \ "fi\0" \ "bootcmd=" \ "if test -n ${recovery_status}; then " \ @@ -138,13 +127,10 @@ "fi;" \ "fi\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ - "fdt_addr=0x18000000\0" \ "bootdev=1\0" \ "bootpart=1\0" \ - "kernel_addr=" __stringify(CONFIG_LOADADDR) "\0" \ "netdev=eth0\0" \ "load_addr=0x11000000\0" \ - "dtbloadaddr=0x12000000\0" \ "uboot_file=u-boot.img\0" \ "SPL_file=SPL\0" \ "load_uboot=tftp ${load_addr} ${uboot_file}\0" \ @@ -171,6 +157,7 @@ "device ${mmcdev};" \ "run factory_nor_img;" \ "run factory_eMMC_img;" \ + "run factory_SPL_falcon_setup;" \ "fi\0" \ "factory_eMMC_img="\ "echo 'Update mccmon6 eMMC image'; " \ @@ -192,6 +179,16 @@ "erase ${nor_bank_start} +${nor_img_size};" \ "setexpr nor_img_size ${nor_img_size} / 4; " \ "cp.l ${nor_img_addr} ${nor_bank_start} ${nor_img_size}\0" \ + "factory_SPL_falcon_setup="\ + "echo 'Write Falcon boot data'; " \ + "setenv kernelnor 0x08180000;" \ + "cp.l ${kernelnor} ${loadaddr} ${kernelsize};" \ + "spl export fdt ${loadaddr};" \ + "setenv nor_img_addr ${fdtargsaddr};" \ + "setenv nor_img_size 0x20000;" \ + "setenv nor_bank_start " \ + __stringify(CONFIG_CMD_SPL_NOR_OFS)";" \ + "run nor_update\0" \ "tftp_nor_uboot="\ "echo 'Update mccmon6 NOR U-BOOT via TFTP'; " \ "setenv nor_img_file u-boot.img; " \ @@ -200,22 +197,14 @@ "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \ "run nor_update;" \ "fi\0" \ - "tftp_nor_uImg="\ - "echo 'Update mccmon6 NOR uImage via TFTP'; " \ - "setenv nor_img_file uImage; " \ + "tftp_nor_fitImg="\ + "echo 'Update mccmon6 NOR fitImage via TFTP'; " \ + "setenv nor_img_file fitImage; " \ "setenv nor_img_size 0x500000; " \ "setenv nor_bank_start 0x08180000; " \ "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \ "run nor_update;" \ "fi\0" \ - "tftp_nor_dtb="\ - "echo 'Update mccmon6 NOR DTB via TFTP'; " \ - "setenv nor_img_file imx6q-mccmon6.dtb; " \ - "setenv nor_img_size 0x20000; " \ - "setenv nor_bank_start 0x09980000; " \ - "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \ - "run nor_update;" \ - "fi\0" \ "tftp_nor_img="\ "echo 'Update mccmon6 NOR image via TFTP'; " \ "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \