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- /* We've missed all of the deadlines. Set a timer in the future to let - * execution catch up */ - t->start = now; - return next + 10000; + /* We've missed all deadlines, fire interrupt and try again */ + timer_del(&t->timer); + + if (timer_overflow_interrupt(t)) { + t->level = !t->level; + qemu_set_irq(t->irq, t->level); + } + + t->start = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + return calculate_time(t, MAX(MAX(t->match[0], t->match[1]), 0)); } static void aspeed_timer_mod(AspeedTimer *t) From patchwork Fri Jan 11 03:56:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 1023374 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 43bTdC251Bz9sCh for ; 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Thu, 10 Jan 2019 22:57:19 -0500 (EST) From: Andrew Jeffery To: openbmc@lists.ozlabs.org Subject: [RFC qemu legoater/aspeed-3.1 2/4] timer: aspeed: Status register contains reload for stopped timer Date: Fri, 11 Jan 2019 14:26:36 +1030 Message-Id: <20190111035638.19725-3-andrew@aj.id.au> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190111035638.19725-1-andrew@aj.id.au> References: <20190111035638.19725-1-andrew@aj.id.au> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , clg@kaod.org Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" From the datasheet: > This register stores the current status of counter #N. When timer > enable bit TMC30[N * b] is disabled, the reload register will be > loaded into this counter. When timer bit TMC30[N * b] is set, the > counter will start to decrement. CPU can update this register value > when enable bit is set. Signed-off-by: Andrew Jeffery Reviewed-by: Cédric Le Goater --- hw/timer/aspeed_timer.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c index 54c75bf4f322..6adc14d62034 100644 --- a/hw/timer/aspeed_timer.c +++ b/hw/timer/aspeed_timer.c @@ -182,7 +182,11 @@ static uint64_t aspeed_timer_get_value(AspeedTimer *t, int reg) switch (reg) { case TIMER_REG_STATUS: - value = calculate_ticks(t, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); + if (timer_enabled(t)) { + value = calculate_ticks(t, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); + } else { + value = t->reload; + } break; case TIMER_REG_RELOAD: value = t->reload; From patchwork Fri Jan 11 03:56:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 1023375 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 43bTdd1SqNz9sCh for ; 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Thu, 10 Jan 2019 22:57:23 -0500 (EST) From: Andrew Jeffery To: openbmc@lists.ozlabs.org Subject: [RFC qemu legoater/aspeed-3.1 3/4] timer: aspeed: Fix match calculations Date: Fri, 11 Jan 2019 14:26:37 +1030 Message-Id: <20190111035638.19725-4-andrew@aj.id.au> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190111035638.19725-1-andrew@aj.id.au> References: <20190111035638.19725-1-andrew@aj.id.au> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , clg@kaod.org Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" If the match value exceeds reload then we don't want to include it in calculations for the next event. Signed-off-by: Andrew Jeffery Reviewed-by: Cédric Le Goater --- hw/timer/aspeed_timer.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c index 6adc14d62034..35b40a7c4010 100644 --- a/hw/timer/aspeed_timer.c +++ b/hw/timer/aspeed_timer.c @@ -107,6 +107,11 @@ static inline uint64_t calculate_time(struct AspeedTimer *t, uint32_t ticks) return t->start + delta_ns; } +static inline uint32_t calculate_match(struct AspeedTimer *t, int i) +{ + return t->match[i] < t->reload ? t->match[i] : 0; +} + static uint64_t calculate_next(struct AspeedTimer *t) { uint64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); @@ -116,11 +121,11 @@ static uint64_t calculate_next(struct AspeedTimer *t) * registers, so sort using MAX/MIN/zero. We sort in that order as the * timer counts down to zero. */ - next = calculate_time(t, MAX(t->match[0], t->match[1])); + next = calculate_time(t, MAX(calculate_match(t, 0), calculate_match(t, 1))); if (now < next) return next; - next = calculate_time(t, MIN(t->match[0], t->match[1])); + next = calculate_time(t, MIN(calculate_match(t, 0), calculate_match(t, 1))); if (now < next) return next; @@ -136,8 +141,10 @@ static uint64_t calculate_next(struct AspeedTimer *t) qemu_set_irq(t->irq, t->level); } + next = MAX(MAX(calculate_match(t, 0), calculate_match(t, 1)), 0); t->start = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); - return calculate_time(t, MAX(MAX(t->match[0], t->match[1]), 0)); + + return calculate_time(t, next); } static void aspeed_timer_mod(AspeedTimer *t) From patchwork Fri Jan 11 03:56:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 1023376 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 43bTff6FvFz9sN1 for ; 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Thu, 10 Jan 2019 22:57:26 -0500 (EST) From: Andrew Jeffery To: openbmc@lists.ozlabs.org Subject: [RFC qemu legoater/aspeed-3.1 4/4] timer: aspeed: Provide back-pressure information for short periods Date: Fri, 11 Jan 2019 14:26:38 +1030 Message-Id: <20190111035638.19725-5-andrew@aj.id.au> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190111035638.19725-1-andrew@aj.id.au> References: <20190111035638.19725-1-andrew@aj.id.au> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , clg@kaod.org Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" First up: This is not the way the hardware behaves. However, it helps resolve real-world problems with short periods being used under Linux. Commit 4451d3f59f2a ("clocksource/drivers/fttmr010: Fix set_next_event handler") in Linux fixed the timer driver to correctly schedule the next event for the Aspeed controller, and in combination with 5daa8212c08e ("ARM: dts: aspeed: Describe random number device") Linux will now set a timer with a period as low as 1us. Configuring a qemu timer with such a short period results in spending time handling the interrupt in the model rather than executing guest code, leading to noticeable "sticky" behaviour in the guest. The behaviour of Linux is correct with respect to the hardware, so we need to improve our handling under emulation. The approach chosen is to provide back-pressure information by calculating an acceptable minimum number of ticks to be set on the model. Under Linux an additional read is added in the timer configuration path to detect back-pressure, which will never occur on hardware. However if back-pressure is observed, the driver alerts the clock event subsystem, which then performs its own next event dilation via a config option - d1748302f70b ("clockevents: Make minimum delay adjustments configurable") A minimum period of 5us was experimentally determined on a Lenovo T480s, which I've increased to 20us for "safety". Signed-off-by: Andrew Jeffery --- hw/misc/aspeed_scu.c | 6 ++++++ hw/timer/aspeed_timer.c | 6 +++++- include/hw/timer/aspeed_timer.h | 1 + 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index 257f9a6c6b8a..0410776b456a 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -432,6 +432,12 @@ static void aspeed_scu_realize(DeviceState *dev, Error **errp) TYPE_ASPEED_SCU, SCU_IO_REGION_SIZE); sysbus_init_mmio(sbd, &s->iomem); + + /* + * Reset on realize to ensure the APB clock value is calculated in time for + * use by the timer model, which is reset before the SCU. + */ + aspeed_scu_reset(dev); } static const VMStateDescription vmstate_aspeed_scu = { diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c index 35b40a7c4010..0f3501ac5a5c 100644 --- a/hw/timer/aspeed_timer.c +++ b/hw/timer/aspeed_timer.c @@ -254,7 +254,7 @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg, switch (reg) { case TIMER_REG_RELOAD: old_reload = t->reload; - t->reload = value; + t->reload = value < t->min_ticks ? t->min_ticks : value; /* If the reload value was not previously set, or zero, and * the current value is valid, try to start the timer if it is @@ -306,7 +306,11 @@ static void aspeed_timer_ctrl_enable(AspeedTimer *t, bool enable) static void aspeed_timer_ctrl_external_clock(AspeedTimer *t, bool enable) { + AspeedTimerCtrlState *s = timer_to_ctrl(t); + uint32_t rate = enable ? TIMER_CLOCK_EXT_HZ : s->scu->apb_freq; + trace_aspeed_timer_ctrl_external_clock(t->id, enable); + t->min_ticks = muldiv64(20 * SCALE_US, rate, NANOSECONDS_PER_SECOND); } static void aspeed_timer_ctrl_overflow_interrupt(AspeedTimer *t, bool enable) diff --git a/include/hw/timer/aspeed_timer.h b/include/hw/timer/aspeed_timer.h index 1fb949e16710..10c851ebb6d7 100644 --- a/include/hw/timer/aspeed_timer.h +++ b/include/hw/timer/aspeed_timer.h @@ -41,6 +41,7 @@ typedef struct AspeedTimer { * interrupts, signalling with both the rising and falling edge. */ int32_t level; + uint32_t min_ticks; uint32_t reload; uint32_t match[2]; uint64_t start;