From patchwork Tue Jan 8 16:24:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 1022003 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43YyL10VHsz9sN8 for ; Wed, 9 Jan 2019 03:25:45 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729334AbfAHQZi (ORCPT ); Tue, 8 Jan 2019 11:25:38 -0500 Received: from mail.bootlin.com ([62.4.15.54]:44894 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729289AbfAHQYu (ORCPT ); Tue, 8 Jan 2019 11:24:50 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id E64BC20A1D; Tue, 8 Jan 2019 17:24:47 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.2 Received: from localhost.localdomain (aaubervilliers-681-1-45-241.w90-88.abo.wanadoo.fr [90.88.163.241]) by mail.bootlin.com (Postfix) with ESMTPSA id 86DFD207A3; Tue, 8 Jan 2019 17:24:47 +0100 (CET) From: Miquel Raynal To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , Bjorn Helgaas Cc: , Rob Herring , Mark Rutland , Lorenzo Pieralisi , linux-pci@vger.kernel.org, , , Antoine Tenart , Maxime Chevallier , Nadav Haklai , Miquel Raynal Subject: [PATCH v3 08/15] dt-bindings: PCI: aardvark: Describe the clocks property Date: Tue, 8 Jan 2019 17:24:33 +0100 Message-Id: <20190108162441.5278-9-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190108162441.5278-1-miquel.raynal@bootlin.com> References: <20190108162441.5278-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Describe the missing gated clock feeding the PCIe IP. Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/pci/aardvark-pci.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/aardvark-pci.txt b/Documentation/devicetree/bindings/pci/aardvark-pci.txt index 310ef7145c47..9d19ebfea189 100644 --- a/Documentation/devicetree/bindings/pci/aardvark-pci.txt +++ b/Documentation/devicetree/bindings/pci/aardvark-pci.txt @@ -12,6 +12,7 @@ contain the following properties: - #size-cells: set to <2> - device_type: set to "pci" - ranges: ranges for the PCI memory and I/O regions + - clocks: the clock feeding the IP - #interrupt-cells: set to <1> - msi-controller: indicates that the PCIe controller can itself handle MSI interrupts @@ -37,6 +38,7 @@ Example: #address-cells = <3>; #size-cells = <2>; bus-range = <0x00 0xff>; + clocks = <&sb_periph_clk 13>; interrupts = ; #interrupt-cells = <1>; msi-controller; From patchwork Tue Jan 8 16:24:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 1022006 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43YyLG089yz9sN8 for ; Wed, 9 Jan 2019 03:25:58 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729574AbfAHQZv (ORCPT ); Tue, 8 Jan 2019 11:25:51 -0500 Received: from mail.bootlin.com ([62.4.15.54]:44897 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729317AbfAHQYu (ORCPT ); Tue, 8 Jan 2019 11:24:50 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id 4498920A24; Tue, 8 Jan 2019 17:24:48 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.2 Received: from localhost.localdomain (aaubervilliers-681-1-45-241.w90-88.abo.wanadoo.fr [90.88.163.241]) by mail.bootlin.com (Postfix) with ESMTPSA id DEDF2209C2; Tue, 8 Jan 2019 17:24:47 +0100 (CET) From: Miquel Raynal To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , Bjorn Helgaas Cc: , Rob Herring , Mark Rutland , Lorenzo Pieralisi , linux-pci@vger.kernel.org, , , Antoine Tenart , Maxime Chevallier , Nadav Haklai , Miquel Raynal Subject: [PATCH v3 09/15] dt-bindings: PCI: aardvark: Describe the PHY property Date: Tue, 8 Jan 2019 17:24:34 +0100 Message-Id: <20190108162441.5278-10-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190108162441.5278-1-miquel.raynal@bootlin.com> References: <20190108162441.5278-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document the possibility to reference a PHY. Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/pci/aardvark-pci.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/aardvark-pci.txt b/Documentation/devicetree/bindings/pci/aardvark-pci.txt index 9d19ebfea189..a440f182ccf8 100644 --- a/Documentation/devicetree/bindings/pci/aardvark-pci.txt +++ b/Documentation/devicetree/bindings/pci/aardvark-pci.txt @@ -21,6 +21,10 @@ contain the following properties: define the mapping of the PCIe interface to interrupt numbers. - bus-range: PCI bus numbers covered +The following are optional properties: + + - phys: the PCIe PHY handle + In addition, the Device Tree describing an Aardvark PCIe controller must include a sub-node that describes the legacy interrupt controller built into the PCIe controller. This sub-node must have the following @@ -50,6 +54,7 @@ Example: <0 0 0 2 &pcie_intc 1>, <0 0 0 3 &pcie_intc 2>, <0 0 0 4 &pcie_intc 3>; + phys = <&comphy1 0>; pcie_intc: interrupt-controller { interrupt-controller; #interrupt-cells = <1>; From patchwork Tue Jan 8 16:24:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 1022000 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43YyKs2N4kz9sN8 for ; Wed, 9 Jan 2019 03:25:37 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728394AbfAHQZa (ORCPT ); Tue, 8 Jan 2019 11:25:30 -0500 Received: from mail.bootlin.com ([62.4.15.54]:44901 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729334AbfAHQYu (ORCPT ); Tue, 8 Jan 2019 11:24:50 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id A197920A2A; Tue, 8 Jan 2019 17:24:48 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.2 Received: from localhost.localdomain (aaubervilliers-681-1-45-241.w90-88.abo.wanadoo.fr [90.88.163.241]) by mail.bootlin.com (Postfix) with ESMTPSA id 4218F207A3; Tue, 8 Jan 2019 17:24:48 +0100 (CET) From: Miquel Raynal To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , Bjorn Helgaas Cc: , Rob Herring , Mark Rutland , Lorenzo Pieralisi , linux-pci@vger.kernel.org, , , Antoine Tenart , Maxime Chevallier , Nadav Haklai , Miquel Raynal Subject: [PATCH v3 10/15] dt-bindings: PCI: aardvark: Describe the PCIe endpoint card reset pins Date: Tue, 8 Jan 2019 17:24:35 +0100 Message-Id: <20190108162441.5278-11-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190108162441.5278-1-miquel.raynal@bootlin.com> References: <20190108162441.5278-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org A line might be used by the PCIe IP to reset the endpoint card upon: - platform reset, - hot reset, - link failure. Describe the properties needed in this case (optional). Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/pci/aardvark-pci.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/aardvark-pci.txt b/Documentation/devicetree/bindings/pci/aardvark-pci.txt index a440f182ccf8..8b7f048705ec 100644 --- a/Documentation/devicetree/bindings/pci/aardvark-pci.txt +++ b/Documentation/devicetree/bindings/pci/aardvark-pci.txt @@ -24,6 +24,9 @@ contain the following properties: The following are optional properties: - phys: the PCIe PHY handle + - pinctrl-names: must be "default". + - pinctrl-0: pin control group to be used to mux the PCIe endpoint card + reset line so that it will be automatically driven by the PCIe IP. In addition, the Device Tree describing an Aardvark PCIe controller must include a sub-node that describes the legacy interrupt controller @@ -55,6 +58,8 @@ Example: <0 0 0 3 &pcie_intc 2>, <0 0 0 4 &pcie_intc 3>; phys = <&comphy1 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_card_reset_pins &pcie_clkreq_pins>; pcie_intc: interrupt-controller { interrupt-controller; #interrupt-cells = <1>; From patchwork Tue Jan 8 16:24:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 1021998 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43YyKl3Zp7z9sN8 for ; Wed, 9 Jan 2019 03:25:31 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729371AbfAHQZS (ORCPT ); Tue, 8 Jan 2019 11:25:18 -0500 Received: from mail.bootlin.com ([62.4.15.54]:44906 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729344AbfAHQYv (ORCPT ); Tue, 8 Jan 2019 11:24:51 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id 042A320A2F; Tue, 8 Jan 2019 17:24:49 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.2 Received: from localhost.localdomain (aaubervilliers-681-1-45-241.w90-88.abo.wanadoo.fr [90.88.163.241]) by mail.bootlin.com (Postfix) with ESMTPSA id 9AA20209C2; Tue, 8 Jan 2019 17:24:48 +0100 (CET) From: Miquel Raynal To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , Bjorn Helgaas Cc: , Rob Herring , Mark Rutland , Lorenzo Pieralisi , linux-pci@vger.kernel.org, , , Antoine Tenart , Maxime Chevallier , Nadav Haklai , Miquel Raynal Subject: [PATCH v3 11/15] dt-bindings: PCI: aardvark: Describe the reset-gpios property Date: Tue, 8 Jan 2019 17:24:36 +0100 Message-Id: <20190108162441.5278-12-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190108162441.5278-1-miquel.raynal@bootlin.com> References: <20190108162441.5278-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org A GPIO might be used to reset the PCI IP. Describe the property needed in this case. Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/pci/aardvark-pci.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/aardvark-pci.txt b/Documentation/devicetree/bindings/pci/aardvark-pci.txt index 8b7f048705ec..b47d6d608ae1 100644 --- a/Documentation/devicetree/bindings/pci/aardvark-pci.txt +++ b/Documentation/devicetree/bindings/pci/aardvark-pci.txt @@ -27,6 +27,8 @@ The following are optional properties: - pinctrl-names: must be "default". - pinctrl-0: pin control group to be used to mux the PCIe endpoint card reset line so that it will be automatically driven by the PCIe IP. + - reset-gpios: GPIO to reset the device (alternative to the above + entries that represent a pin controlled by the PCI IP itself). In addition, the Device Tree describing an Aardvark PCIe controller must include a sub-node that describes the legacy interrupt controller