From patchwork Mon Dec 17 13:29:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoph Muellner X-Patchwork-Id: 1014480 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=theobroma-systems.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43JMTx1GVlz9sCh for ; Tue, 18 Dec 2018 00:30:29 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id D074FC2205C; Mon, 17 Dec 2018 13:30:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 68E7DC21EB4; Mon, 17 Dec 2018 13:30:16 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 4BAFBC21E7E; Mon, 17 Dec 2018 13:30:15 +0000 (UTC) Received: from mail.theobroma-systems.com (vegas.theobroma-systems.com [144.76.126.164]) by lists.denx.de (Postfix) with ESMTPS id ED9F5C21E49 for ; Mon, 17 Dec 2018 13:30:14 +0000 (UTC) Received: from [86.59.122.178] (port=40968 helo=purcell.lan) by mail.theobroma-systems.com with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1gYsyK-0006nQ-66; Mon, 17 Dec 2018 14:30:12 +0100 From: Christoph Muellner To: u-boot@lists.denx.de Date: Mon, 17 Dec 2018 14:29:59 +0100 Message-Id: <20181217133006.16208-2-christoph.muellner@theobroma-systems.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> References: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> Subject: [U-Boot] [PATCH v3 1/8] rockchip: rk3399-puma: Cleanup of vdd_log DTS entry. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch eliminates the non-standard entries "rockchip,pwm_id" and "rockchip,pwm_voltage". They are neither documented nor read out by any driver. Additionally it introduces the entry regulator-init-microvolt and sets it to 900 mV, which is the default target value for VDD_LOG. Signed-off-by: Christoph Muellner --- Changes in v3: None Changes in v2: None arch/arm/dts/rk3399-puma.dtsi | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index 9a61fbb453..09f7992f65 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -172,10 +172,7 @@ regulator-max-microvolt = <1400000>; regulator-always-on; regulator-boot-on; - - /* for rockchip boot on */ - rockchip,pwm_id= <2>; - rockchip,pwm_voltage = <1000000>; + regulator-init-microvolt = <900000>; }; }; From patchwork Mon Dec 17 13:30:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoph Muellner X-Patchwork-Id: 1014485 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=theobroma-systems.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43JMX66RlLz9s4s for ; Tue, 18 Dec 2018 00:32:22 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 8D1A7C21E7E; Mon, 17 Dec 2018 13:30:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E989DC22047; Mon, 17 Dec 2018 13:30:19 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 5B00FC22047; Mon, 17 Dec 2018 13:30:16 +0000 (UTC) Received: from mail.theobroma-systems.com (vegas.theobroma-systems.com [144.76.126.164]) by lists.denx.de (Postfix) with ESMTPS id 62E4BC21E8A for ; Mon, 17 Dec 2018 13:30:16 +0000 (UTC) Received: from [86.59.122.178] (port=40968 helo=purcell.lan) by mail.theobroma-systems.com with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1gYsyK-0006nQ-Rp; Mon, 17 Dec 2018 14:30:12 +0100 From: Christoph Muellner To: u-boot@lists.denx.de Date: Mon, 17 Dec 2018 14:30:00 +0100 Message-Id: <20181217133006.16208-3-christoph.muellner@theobroma-systems.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> References: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> Subject: [U-Boot] [PATCH v3 2/8] power: regulator: Allow PWM regulator to be omitted from SPL. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch allows to enable the PWM regulator driver independent for U-Boot and SPL. Signed-off-by: Christoph Muellner --- Changes in v3: None Changes in v2: None drivers/power/regulator/Kconfig | 7 +++++++ drivers/power/regulator/Makefile | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index 09b311de8b..3ed0dd2264 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -61,6 +61,13 @@ config REGULATOR_PWM This driver is controlled by a device tree node which includes voltage limits. +config SPL_REGULATOR_PWM + bool "Enable Driver for PWM regulators in SPL" + depends on REGULATOR_PWM + help + This config enables implementation of driver-model regulator uclass + features for PWM regulators in SPL. + config DM_REGULATOR_MAX77686 bool "Enable Driver Model for REGULATOR MAX77686" depends on DM_REGULATOR && DM_PMIC_MAX77686 diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index 8017045d54..f617ce723a 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -9,7 +9,7 @@ obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o obj-$(CONFIG_REGULATOR_AS3722) += as3722_regulator.o obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o -obj-$(CONFIG_REGULATOR_PWM) += pwm_regulator.o +obj-$(CONFIG_$(SPL_)REGULATOR_PWM) += pwm_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_FAN53555) += fan53555.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_FIXED) += fixed.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_GPIO) += gpio-regulator.o From patchwork Mon Dec 17 13:30:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoph Muellner X-Patchwork-Id: 1014482 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=theobroma-systems.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43JMVw5xc0z9sCh for ; Tue, 18 Dec 2018 00:31:20 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 8C85FC220F8; Mon, 17 Dec 2018 13:30:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 2C5D4C22099; Mon, 17 Dec 2018 13:30:19 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 50B6DC22033; Mon, 17 Dec 2018 13:30:16 +0000 (UTC) Received: from mail.theobroma-systems.com (vegas.theobroma-systems.com [144.76.126.164]) by lists.denx.de (Postfix) with ESMTPS id 60213C21E7E for ; Mon, 17 Dec 2018 13:30:16 +0000 (UTC) Received: from [86.59.122.178] (port=40968 helo=purcell.lan) by mail.theobroma-systems.com with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1gYsyL-0006nQ-BK; Mon, 17 Dec 2018 14:30:13 +0100 From: Christoph Muellner To: u-boot@lists.denx.de Date: Mon, 17 Dec 2018 14:30:01 +0100 Message-Id: <20181217133006.16208-4-christoph.muellner@theobroma-systems.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> References: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> Subject: [U-Boot] [PATCH v3 3/8] rockchip: rk3399-puma: enable PWM regulator in Puma defconfig. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch enables the PWM regulator driver in the defconfig for the RK3399-Q7. Signed-off-by: Christoph Muellner --- Changes in v3: None Changes in v2: None configs/puma-rk3399_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index a45a34be31..1afa5a75f9 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -79,6 +79,7 @@ CONFIG_DM_PMIC=y CONFIG_DM_PMIC_FAN53555=y CONFIG_PMIC_RK8XX=y CONFIG_SPL_DM_REGULATOR=y +CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y From patchwork Mon Dec 17 13:30:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoph Muellner X-Patchwork-Id: 1014493 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=theobroma-systems.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43JMbR0tmtz9s4s for ; Tue, 18 Dec 2018 00:35:15 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id C7918C2210A; Mon, 17 Dec 2018 13:32:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B153AC2210A; Mon, 17 Dec 2018 13:30:33 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 76C47C220C0; Mon, 17 Dec 2018 13:30:22 +0000 (UTC) Received: from mail.theobroma-systems.com (vegas.theobroma-systems.com [144.76.126.164]) by lists.denx.de (Postfix) with ESMTPS id B0D00C2209F for ; Mon, 17 Dec 2018 13:30:18 +0000 (UTC) Received: from [86.59.122.178] (port=40968 helo=purcell.lan) by mail.theobroma-systems.com with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1gYsyL-0006nQ-T6; Mon, 17 Dec 2018 14:30:14 +0100 From: Christoph Muellner To: u-boot@lists.denx.de Date: Mon, 17 Dec 2018 14:30:02 +0100 Message-Id: <20181217133006.16208-5-christoph.muellner@theobroma-systems.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> References: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> Subject: [U-Boot] [PATCH v3 4/8] dm: pinctrl: Add pinctrl_decode_pin_config_dm(). X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" pinctrl_decode_pin_config_dm() is basically a feature-equivalent implementation of pinctrl_decode_pin_config(), which operates on struct udevice devices and uses the dev_read_*() API. Signed-off-by: Christoph Muellner --- Changes in v3: None Changes in v2: None drivers/pinctrl/pinctrl-uclass.c | 15 +++++++++++++++ include/dm/pinctrl.h | 12 ++++++++++++ 2 files changed, 27 insertions(+) diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c index 6db0445067..cebba12b4a 100644 --- a/drivers/pinctrl/pinctrl-uclass.c +++ b/drivers/pinctrl/pinctrl-uclass.c @@ -27,6 +27,21 @@ int pinctrl_decode_pin_config(const void *blob, int node) return flags; } +int pinctrl_decode_pin_config_dm(struct udevice *dev) +{ + int pinconfig = 0; + + if (dev->uclass->uc_drv->id != UCLASS_PINCONFIG) + return -EINVAL; + + if (dev_read_bool(dev, "bias-pull-up")) + pinconfig |= 1 << PIN_CONFIG_BIAS_PULL_UP; + else if (dev_read_bool(dev, "bias-pull-down")) + pinconfig |= 1 << PIN_CONFIG_BIAS_PULL_DOWN; + + return pinconfig; +} + #if CONFIG_IS_ENABLED(PINCTRL_FULL) /** * pinctrl_config_one() - apply pinctrl settings for a single node diff --git a/include/dm/pinctrl.h b/include/dm/pinctrl.h index 63a7d55b88..ff2b82e7c2 100644 --- a/include/dm/pinctrl.h +++ b/include/dm/pinctrl.h @@ -355,6 +355,18 @@ int pinctrl_get_periph_id(struct udevice *dev, struct udevice *periph); int pinctrl_decode_pin_config(const void *blob, int node); /** + * pinctrl_decode_pin_config_dm() - decode pin configuration flags + * + * This decodes some of the PIN_CONFIG values into flags, with each value + * being (1 << pin_cfg). This does not support things with values like the + * slew rate. + * + * @pinconfig: Pinconfig udevice + * @return decoded flag value, or -ve on error + */ +int pinctrl_decode_pin_config_dm(struct udevice *dev); + +/** * pinctrl_get_gpio_mux() - get the mux value for a particular GPIO * * This allows the raw mux value for a GPIO to be obtained. It is From patchwork Mon Dec 17 13:30:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoph Muellner X-Patchwork-Id: 1014490 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=theobroma-systems.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43JMZl6XSWz9s4s for ; Tue, 18 Dec 2018 00:34:39 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 980D8C21FAB; Mon, 17 Dec 2018 13:31:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BFDD4C220C0; Mon, 17 Dec 2018 13:30:29 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 538F1C21E8A; Mon, 17 Dec 2018 13:30:22 +0000 (UTC) Received: from mail.theobroma-systems.com (vegas.theobroma-systems.com [144.76.126.164]) by lists.denx.de (Postfix) with ESMTPS id A4166C2209C for ; Mon, 17 Dec 2018 13:30:18 +0000 (UTC) Received: from [86.59.122.178] (port=40968 helo=purcell.lan) by mail.theobroma-systems.com with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1gYsyM-0006nQ-CP; Mon, 17 Dec 2018 14:30:14 +0100 From: Christoph Muellner To: u-boot@lists.denx.de Date: Mon, 17 Dec 2018 14:30:03 +0100 Message-Id: <20181217133006.16208-6-christoph.muellner@theobroma-systems.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> References: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> Subject: [U-Boot] [PATCH v3 5/8] rockchip: rk3399: Add improved pinctrl driver. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The current pinctrl driver for the RK3399 has a range of qulity issues. E.g. it only implements the .set_state_simple() callback, it does not parse the available pinctrl information from the DTS (instead uses hardcoded values), is not flexible enough to cover devices without 'interrupt' field in the DTS (e.g. PWM), is not written generic enough to make code reusable among other rockchip SoCs... This patch addresses these issues by reimplementing the whole driver from scratch using the .set_state() callback. The new implementation covers all featurese of the old code (i.e. it supports pinmuxing and pullup/pulldown configuration). This patch has been tested on a RK3399-Q7 SoM (Puma). Signed-off-by: Christoph Muellner --- Changes in v3: None Changes in v2: None drivers/pinctrl/rockchip/pinctrl_rk3399.c | 226 ++++++++++++++++++++++++++++++ 1 file changed, 226 insertions(+) diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c index bc92dd7c06..ed9828989f 100644 --- a/drivers/pinctrl/rockchip/pinctrl_rk3399.c +++ b/drivers/pinctrl/rockchip/pinctrl_rk3399.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * (C) 2018 Theobroma Systems Design und Consulting GmbH */ #include @@ -14,11 +15,234 @@ #include #include +static const u32 RK_GRF_P_PULLUP = 1; +static const u32 RK_GRF_P_PULLDOWN = 2; + struct rk3399_pinctrl_priv { struct rk3399_grf_regs *grf; struct rk3399_pmugrf_regs *pmugrf; + struct rockchip_pin_bank *banks; +}; + +/** + * Location of pinctrl/pinconf registers. + */ +enum rk_grf_location { + RK_GRF, + RK_PMUGRF, +}; + +/** + * @nr_pins: number of pins in this bank + * @bank_num: number of the bank, to account for holes + * @iomux: array describing the 4 iomux sources of the bank + */ +struct rockchip_pin_bank { + u8 nr_pins; + enum rk_grf_location grf_location; + size_t iomux_offset; + size_t pupd_offset; }; +#define PIN_BANK(pins, grf, iomux, pupd) \ + { \ + .nr_pins = pins, \ + .grf_location = grf, \ + .iomux_offset = iomux, \ + .pupd_offset = pupd, \ + } + +static struct rockchip_pin_bank rk3399_pin_banks[] = { + PIN_BANK(16, RK_PMUGRF, + offsetof(struct rk3399_pmugrf_regs, gpio0a_iomux), + offsetof(struct rk3399_pmugrf_regs, gpio0_p)), + PIN_BANK(32, RK_PMUGRF, + offsetof(struct rk3399_pmugrf_regs, gpio1a_iomux), + offsetof(struct rk3399_pmugrf_regs, gpio1_p)), + PIN_BANK(32, RK_GRF, + offsetof(struct rk3399_grf_regs, gpio2a_iomux), + offsetof(struct rk3399_grf_regs, gpio2_p)), + PIN_BANK(32, RK_GRF, + offsetof(struct rk3399_grf_regs, gpio3a_iomux), + offsetof(struct rk3399_grf_regs, gpio3_p)), + PIN_BANK(32, RK_GRF, + offsetof(struct rk3399_grf_regs, gpio4a_iomux), + offsetof(struct rk3399_grf_regs, gpio4_p)), +}; + +static void rk_pinctrl_get_info(uintptr_t base, u32 index, uintptr_t *addr, + u32 *shift, u32 *mask) +{ + /* + * In general we four subsequent 32-bit configuration registers + * per bank (e.g. GPIO2A_P, GPIO2B_P, GPIO2C_P, GPIO2D_P). + * The configuration for each pin has two bits. + * + * @base...contains the address to the first register. + * @index...defines the pin within the bank (0..31). + * @addr...will be the address of the actual register to use + */ + + const u32 pins_per_register = 8; + const u32 config_bits_per_pin = 2; + + /* Get the address of the configuration register. */ + *addr = base + (index / pins_per_register) * sizeof(u32); + + /* Get the bit offset within the configruation register. */ + *shift = (index & (pins_per_register - 1)) * config_bits_per_pin; + + /* Get the (unshifted) mask for the configuration pins. */ + *mask = ((1 << config_bits_per_pin) - 1); + + pr_debug("%s: addr=0x%lx, mask=0x%x, shift=0x%x\n", + __func__, *addr, *mask, *shift); +} + +static void rk3399_pinctrl_set_pin_iomux(uintptr_t grf_addr, + struct rockchip_pin_bank *bank, + u32 index, u32 muxval) +{ + uintptr_t iomux_base, addr; + u32 shift, mask; + + iomux_base = grf_addr + bank->iomux_offset; + rk_pinctrl_get_info(iomux_base, index, &addr, &shift, &mask); + + /* Set pinmux register */ + rk_clrsetreg(addr, mask << shift, muxval << shift); +} + +static void rk3399_pinctrl_set_pin_pupd(uintptr_t grf_addr, + struct rockchip_pin_bank *bank, + u32 index, int pinconfig) +{ + uintptr_t pupd_base, addr; + u32 shift, mask, pupdval; + + /* Fast path in case there's nothing to do. */ + if (!pinconfig) + return; + + if (pinconfig & (1 << PIN_CONFIG_BIAS_PULL_UP)) + pupdval = RK_GRF_P_PULLUP; + else if (pinconfig & (1 << PIN_CONFIG_BIAS_PULL_DOWN)) + pupdval = RK_GRF_P_PULLDOWN; + else + /* Flag not supported. */ + pr_warn("%s: Unsupported pinconfig flag: 0x%x\n", __func__, + pinconfig); + return; + + pupd_base = grf_addr + (uintptr_t)bank->pupd_offset; + rk_pinctrl_get_info(pupd_base, index, &addr, &shift, &mask); + + /* Set pull-up/pull-down regisrer */ + rk_clrsetreg(addr, mask << shift, pupdval << shift); +} + +static int rk3399_pinctrl_set_pin(struct udevice *dev, u32 banknum, u32 index, + u32 muxval, int pinconfig) +{ + struct rk3399_pinctrl_priv *priv = dev_get_priv(dev); + struct rockchip_pin_bank *bank = &priv->banks[banknum]; + uintptr_t grf_addr; + + pr_debug("%s: 0x%x 0x%x 0x%x 0x%x\n", __func__, banknum, index, muxval, + pinconfig); + + if (bank->grf_location == RK_GRF) + grf_addr = (uintptr_t)priv->grf; + else if (bank->grf_location == RK_PMUGRF) + grf_addr = (uintptr_t)priv->pmugrf; + else + return -EINVAL; + + rk3399_pinctrl_set_pin_iomux(grf_addr, bank, index, muxval); + + rk3399_pinctrl_set_pin_pupd(grf_addr, bank, index, pinconfig); + return 0; +} + +static int rk3399_pinctrl_set_state(struct udevice *dev, struct udevice *config) +{ + /* + * The order of the fields in this struct must match the order of + * the fields in the "rockchip,pins" property. + */ + struct rk_pin { + u32 banknum; + u32 index; + u32 muxval; + u32 phandle; + } __packed; + + u32 *fields = NULL; + const int fields_per_pin = 4; + int num_fields, num_pins; + int ret; + int size; + int i; + struct rk_pin *pin; + + pr_debug("%s: %s\n", __func__, config->name); + + size = dev_read_size(config, "rockchip,pins"); + if (size < 0) + return -ENODEV; + + num_fields = size / sizeof(u32); + num_pins = num_fields / fields_per_pin; + + if (num_fields * sizeof(u32) != size || + num_pins * fields_per_pin != num_fields) { + printf("Sanity check failed!\n"); + return -EINVAL; + } + + fields = calloc(num_fields, sizeof(u32)); + if (!fields) + return -ENOMEM; + + ret = dev_read_u32_array(config, "rockchip,pins", fields, num_fields); + if (ret) { + pr_warn("%s: Failed to read rockchip,pins fields.\n", + config->name); + goto end; + } + + pin = (struct rk_pin *)fields; + for (i = 0; i < num_pins; i++, pin++) { + struct udevice *dev_pinconfig; + int pinconfig; + + ret = uclass_get_device_by_phandle_id(UCLASS_PINCONFIG, + pin->phandle, + &dev_pinconfig); + if (ret) { + printf("Could not get pinconfig device\n"); + goto end; + } + + pinconfig = pinctrl_decode_pin_config_dm(dev_pinconfig); + if (pinconfig < 0) { + printf("Could not parse pinconfig\n"); + goto end; + } + + ret = rk3399_pinctrl_set_pin(dev, pin->banknum, pin->index, + pin->muxval, pinconfig); + if (ret) { + printf("Could not set pinctrl settings\n"); + goto end; + } + } + +end: + free(fields); + return ret; +} + static void pinctrl_rk3399_pwm_config(struct rk3399_grf_regs *grf, struct rk3399_pmugrf_regs *pmugrf, int pwm_id) { @@ -468,6 +692,7 @@ static int rk3399_pinctrl_set_state_simple(struct udevice *dev, } static struct pinctrl_ops rk3399_pinctrl_ops = { + .set_state = rk3399_pinctrl_set_state, .set_state_simple = rk3399_pinctrl_set_state_simple, .request = rk3399_pinctrl_request, .get_periph_id = rk3399_pinctrl_get_periph_id, @@ -481,6 +706,7 @@ static int rk3399_pinctrl_probe(struct udevice *dev) priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); debug("%s: grf=%p, pmugrf=%p\n", __func__, priv->grf, priv->pmugrf); + priv->banks = rk3399_pin_banks; return ret; } From patchwork Mon Dec 17 13:30:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoph Muellner X-Patchwork-Id: 1014487 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=theobroma-systems.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43JMYF56ZMz9s4s for ; Tue, 18 Dec 2018 00:33:21 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 706A0C220AE; Mon, 17 Dec 2018 13:31:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id D980AC22058; Mon, 17 Dec 2018 13:30:25 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 01686C220CD; Mon, 17 Dec 2018 13:30:21 +0000 (UTC) Received: from mail.theobroma-systems.com (vegas.theobroma-systems.com [144.76.126.164]) by lists.denx.de (Postfix) with ESMTPS id DF551C22075 for ; Mon, 17 Dec 2018 13:30:17 +0000 (UTC) Received: from [86.59.122.178] (port=40968 helo=purcell.lan) by mail.theobroma-systems.com with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1gYsyN-0006nQ-1g; Mon, 17 Dec 2018 14:30:15 +0100 From: Christoph Muellner To: u-boot@lists.denx.de Date: Mon, 17 Dec 2018 14:30:04 +0100 Message-Id: <20181217133006.16208-7-christoph.muellner@theobroma-systems.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> References: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> Cc: Alexander Graf , Ryder Lee Subject: [U-Boot] [PATCH v3 6/8] rockchip: rk3399: Add Kconfig option for full pinctrl driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch adds a Kconfig option to enable the full pinctrl driver for the RK3399. This flag needs to be enabed in order to get the features of the full pinctrl driver compiled in (i.e. a .set_state() callback). Signed-off-by: Christoph Muellner --- Changes in v3: None Changes in v2: None drivers/pinctrl/Kconfig | 10 ++++++++++ drivers/pinctrl/rockchip/pinctrl_rk3399.c | 9 +++++++++ 2 files changed, 19 insertions(+) diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 7e6fad305a..7ec06f08b9 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -238,6 +238,16 @@ config PINCTRL_ROCKCHIP_RK3399 the GPIO definitions and pin control functions for each available multiplex function. +config PINCTRL_ROCKCHIP_RK3399_FULL + bool "Rockchip rk3399 pin control driver (full)" + depends on PINCTRL_FULL && PINCTRL_ROCKCHIP_RK3399 + help + Support full pin multiplexing control on Rockchip rk3399 SoCs. + + This enables the full pinctrl driver for the RK3399. + Contrary to the non-full pinctrl driver, this will evaluate + the board DTB to get the pinctrl settings. + config PINCTRL_ROCKCHIP_RV1108 bool "Rockchip rv1108 pin control driver" depends on DM diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c index ed9828989f..19c15bf46c 100644 --- a/drivers/pinctrl/rockchip/pinctrl_rk3399.c +++ b/drivers/pinctrl/rockchip/pinctrl_rk3399.c @@ -15,8 +15,10 @@ #include #include +#if CONFIG_IS_ENABLED(PINCTRL_ROCKCHIP_RK3399_FULL) static const u32 RK_GRF_P_PULLUP = 1; static const u32 RK_GRF_P_PULLDOWN = 2; +#endif /* PINCTRL_ROCKCHIP_RK3399_FULL */ struct rk3399_pinctrl_priv { struct rk3399_grf_regs *grf; @@ -24,6 +26,7 @@ struct rk3399_pinctrl_priv { struct rockchip_pin_bank *banks; }; +#if CONFIG_IS_ENABLED(PINCTRL_ROCKCHIP_RK3399_FULL) /** * Location of pinctrl/pinconf registers. */ @@ -243,6 +246,8 @@ end: return ret; } +#endif /* PINCTRL_ROCKCHIP_RK3399_FULL */ + static void pinctrl_rk3399_pwm_config(struct rk3399_grf_regs *grf, struct rk3399_pmugrf_regs *pmugrf, int pwm_id) { @@ -692,7 +697,9 @@ static int rk3399_pinctrl_set_state_simple(struct udevice *dev, } static struct pinctrl_ops rk3399_pinctrl_ops = { +#if CONFIG_IS_ENABLED(PINCTRL_ROCKCHIP_RK3399_FULL) .set_state = rk3399_pinctrl_set_state, +#endif .set_state_simple = rk3399_pinctrl_set_state_simple, .request = rk3399_pinctrl_request, .get_periph_id = rk3399_pinctrl_get_periph_id, @@ -706,7 +713,9 @@ static int rk3399_pinctrl_probe(struct udevice *dev) priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); debug("%s: grf=%p, pmugrf=%p\n", __func__, priv->grf, priv->pmugrf); +#if CONFIG_IS_ENABLED(PINCTRL_ROCKCHIP_RK3399_FULL) priv->banks = rk3399_pin_banks; +#endif /* PINCTRL_ROCKCHIP_RK3399_FULL */ return ret; } From patchwork Mon Dec 17 13:30:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoph Muellner X-Patchwork-Id: 1014492 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=theobroma-systems.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43JMb00YxJz9sCh for ; Tue, 18 Dec 2018 00:34:52 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id CC831C21FE0; Mon, 17 Dec 2018 13:32:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BC022C21E7E; Mon, 17 Dec 2018 13:30:30 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 01D98C21D8A; Mon, 17 Dec 2018 13:30:21 +0000 (UTC) Received: from mail.theobroma-systems.com (vegas.theobroma-systems.com [144.76.126.164]) by lists.denx.de (Postfix) with ESMTPS id 3A9B5C21E7E for ; Mon, 17 Dec 2018 13:30:17 +0000 (UTC) Received: from [86.59.122.178] (port=40968 helo=purcell.lan) by mail.theobroma-systems.com with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1gYsyN-0006nQ-Ix; Mon, 17 Dec 2018 14:30:15 +0100 From: Christoph Muellner To: u-boot@lists.denx.de Date: Mon, 17 Dec 2018 14:30:05 +0100 Message-Id: <20181217133006.16208-8-christoph.muellner@theobroma-systems.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> References: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> Subject: [U-Boot] [PATCH v3 7/8] rockchip: rk3399-puma: enable full pinctrl driver in Puma defconfig. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch enables the full pinctrl driver in the defconfig for the RK3399-Q7. Signed-off-by: Christoph Muellner --- Changes in v3: None Changes in v2: None configs/puma-rk3399_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 1afa5a75f9..3c293b69e4 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -75,6 +75,7 @@ CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_ROCKCHIP_RK3399=y +CONFIG_PINCTRL_ROCKCHIP_RK3399_FULL=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_FAN53555=y CONFIG_PMIC_RK8XX=y From patchwork Mon Dec 17 13:30:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoph Muellner X-Patchwork-Id: 1014491 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=theobroma-systems.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43JMZz1Rwnz9s4s for ; Tue, 18 Dec 2018 00:34:51 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id D0BEDC2211C; Mon, 17 Dec 2018 13:32:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 81804C22103; Mon, 17 Dec 2018 13:30:34 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C4B7EC21EFD; Mon, 17 Dec 2018 13:30:24 +0000 (UTC) Received: from mail.theobroma-systems.com (vegas.theobroma-systems.com [144.76.126.164]) by lists.denx.de (Postfix) with ESMTPS id 81AD8C22033 for ; Mon, 17 Dec 2018 13:30:20 +0000 (UTC) Received: from [86.59.122.178] (port=40968 helo=purcell.lan) by mail.theobroma-systems.com with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1gYsyO-0006nQ-7O; Mon, 17 Dec 2018 14:30:16 +0100 From: Christoph Muellner To: u-boot@lists.denx.de Date: Mon, 17 Dec 2018 14:30:06 +0100 Message-Id: <20181217133006.16208-9-christoph.muellner@theobroma-systems.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> References: <20181217133006.16208-1-christoph.muellner@theobroma-systems.com> Subject: [U-Boot] [PATCH v3 8/8] rockchip: rk3399-puma: Set VDD_LOG to 950 mV. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch sets VDD_LOG to 950 mV on RK3399-Q7. This is required to address stability issues on Puma in heavy-load use-cases. Reported-by: Assaf Agmon Signed-off-by: Philipp Tomsich Signed-off-by: Christoph Muellner --- Changes in v3: - Fix message verbosity in pinctrl driver. - Changed patches according to review feedback. - Add patch to enable the full pinctrl driver only for Puma boards. Changes in v2: - Changed patches according to review feedback. - Fix pinctrl infrastructure instead of hacking board_init() code. arch/arm/dts/rk3399-puma.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index 09f7992f65..8304f67192 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -172,7 +172,7 @@ regulator-max-microvolt = <1400000>; regulator-always-on; regulator-boot-on; - regulator-init-microvolt = <900000>; + regulator-init-microvolt = <950000>; }; };