From patchwork Fri Dec 7 10:10:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Ni X-Patchwork-Id: 1009313 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="odfVR+0L"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43B7ch2mGQz9s55 for ; Fri, 7 Dec 2018 21:14:44 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726014AbeLGKO1 (ORCPT ); Fri, 7 Dec 2018 05:14:27 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:7394 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725976AbeLGKOZ (ORCPT ); Fri, 7 Dec 2018 05:14:25 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Fri, 07 Dec 2018 02:14:23 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 07 Dec 2018 02:14:25 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 07 Dec 2018 02:14:25 -0800 Received: from HQMAIL108.nvidia.com (172.18.146.13) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 7 Dec 2018 10:14:24 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Fri, 7 Dec 2018 10:14:24 +0000 Received: from niwei-ubuntu.nvidia.com (Not Verified[10.19.225.182]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Fri, 07 Dec 2018 02:14:24 -0800 From: Wei Ni To: , , CC: , , , , Wei Ni Subject: [PATCH v1 1/3] of: add nvidia,thermtrips property Date: Fri, 7 Dec 2018 18:10:05 +0800 Message-ID: <1544177407-20203-2-git-send-email-wni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1544177407-20203-1-git-send-email-wni@nvidia.com> References: <1544177407-20203-1-git-send-email-wni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1544177663; bh=nNHCTHyDZVdi5MybDDVW0/CDd/jc8GMicoETAORekNE=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=odfVR+0L6cv1aL8eUAvSUEwqL4FwVQsXGK5GkJfPI6JPN4sYa6jVn3tWA7c/acTHu FAFW0b4SyZa1wX3LLjE93z4XtdozO/eT8r93UytT6PGoyYqTjahNjFCLe4BaMjgwzV IhC0vdmwTH2Y6nMumvlmh+yEHnlcLIDnKzQ/wIS98rZswDW+Zi0y3GhbNFwwNGSFdk l2xwJjPBLT1Xcw2FH/iQnrecqbgN8fo6obaCNdEKDmnPjejqyGTeoGL8maZFV7a+Sm M+87F9+dsrSyIuYz2wHyOolUDX7dkAIFSn/3ZjBGmEGnDDC2YpeTb68ILl+iVXvhii frZLIj8pVUbew== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add optional property "nvidia,thermtrips". If present, these trips will be used as HW shutdown trips, and critical trips will be used as SW shutdown trips. Signed-off-by: Wei Ni --- .../bindings/thermal/nvidia,tegra124-soctherm.txt | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt index b6c0ae53d4dc..ab66d6feab4b 100644 --- a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt +++ b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt @@ -55,10 +55,21 @@ Required properties : - #cooling-cells: Should be 1. This cooling device only support on/off state. See ./thermal.txt for a description of this property. +Optional properties: +- nvidia,thermtrips : When present, this property specifies the temperature at + which the soctherm hardware will assert the thermal trigger signal to the + Power Management IC, which can be configured to reset or shutdown the device. + It is an array of pairs where each pair represents a tsensor id followed by a + temperature in milli Celcius. In the absence of this property the critical + trip point will be used for thermtrip temperature. + Note: -- the "critical" type trip points will be set to SOC_THERM hardware as the -shut down temperature. Once the temperature of this thermal zone is higher -than it, the system will be shutdown or reset by hardware. +- the "critical" type trip points will be used to set the temperature at which +the SOC_THERM hardware will assert a thermal trigger if the "nvidia,thermtrips" +property is missing. When the thermtrips property is present, the breach of a +critical trip point is reported back to the thermal framework to implement +software shutdown. + - the "hot" type trip points will be set to SOC_THERM hardware as the throttle temperature. Once the the temperature of this thermal zone is higher than it, it will trigger the HW throttle event. @@ -79,6 +90,9 @@ Example : #thermal-sensor-cells = <1>; + nvidia,thermtrips = ; + throttle-cfgs { /* * When the "heavy" cooling device triggered, From patchwork Fri Dec 7 10:10:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Ni X-Patchwork-Id: 1009314 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="ILFpL2bQ"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43B7fB595Cz9s55 for ; Fri, 7 Dec 2018 21:16:02 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725976AbeLGKQA (ORCPT ); Fri, 7 Dec 2018 05:16:00 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:14612 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726055AbeLGKO3 (ORCPT ); Fri, 7 Dec 2018 05:14:29 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Fri, 07 Dec 2018 02:14:16 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 07 Dec 2018 02:14:27 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 07 Dec 2018 02:14:27 -0800 Received: from HQMAIL103.nvidia.com (172.20.187.11) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 7 Dec 2018 10:14:26 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Fri, 7 Dec 2018 10:14:27 +0000 Received: from niwei-ubuntu.nvidia.com (Not Verified[10.19.225.182]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Fri, 07 Dec 2018 02:14:26 -0800 From: Wei Ni To: , , CC: , , , , Wei Ni Subject: [PATCH v1 2/3] thermal: tegra: support hw and sw shutdown Date: Fri, 7 Dec 2018 18:10:06 +0800 Message-ID: <1544177407-20203-3-git-send-email-wni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1544177407-20203-1-git-send-email-wni@nvidia.com> References: <1544177407-20203-1-git-send-email-wni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1544177656; bh=1LywdgjLpd3xRVe86gjf0OPGN9bMnYosujWcf25lZqw=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=ILFpL2bQyobK/ICl1vfN1qcfwSwisq7XVKYgaSYh+LRYVOepGsXuI1VfWj8Fqyf75 wgD2+V2FxlxxARtRyfH8igl71ft6lqYYKpvPIZMOctHHY4NRMYNPEr4pZUWHxMTz+m 9pEEJ0gCpttCWdBmZhe4/mA9KhExFEJrXya1PdadWD75foofKgVo8e0jTiGksmKRYO W1qGI7CKe5SGKF7n7quddob2VTgmUCHCYYX9hiY/FqWB8f3MU86ZQhsheSTw9+vwvM FwQG2vwtAJi9LOwPRjWqXEKh765GF/JBaLZ4cI2A35Ed4Bne+eba9jKNyoLW4zEJ3y n/LN5D5Hu8+Jg== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Currently the critical trip points in thermal framework are the only way to specify a temperature at which HW should shutdown. This is insufficient for certain platforms which would want an orderly software shutdown in addition to HW shutdown. This change support to parse "nvidia, thermtrips" property, it allows soctherm DT to specify thermtrip temperatures so that critical trip points framework can be used for doing software shutdown. Signed-off-by: Wei Ni --- drivers/thermal/tegra/soctherm.c | 99 ++++++++++++++++++++++++++----- drivers/thermal/tegra/soctherm.h | 6 ++ drivers/thermal/tegra/tegra210-soctherm.c | 8 +++ 3 files changed, 98 insertions(+), 15 deletions(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index ed28110a3535..673c3ffa9001 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -446,6 +446,24 @@ find_throttle_cfg_by_name(struct tegra_soctherm *ts, const char *name) return NULL; } +static int tsensor_group_thermtrip_get(struct tegra_soctherm *ts, int id) +{ + int i, temp = min_low_temp; + struct tsensor_group_thermtrips *tt = ts->soc->thermtrips; + + if (id >= TEGRA124_SOCTHERM_SENSOR_NUM) + return temp; + + if (tt) { + for (i = 0; i < ts->soc->num_ttgs; i++) { + if (tt[i].id == id) + return tt[i].temp; + } + } + + return temp; +} + static int tegra_thermctl_set_trip_temp(void *data, int trip, int temp) { struct tegra_thermctl_zone *zone = data; @@ -464,7 +482,16 @@ static int tegra_thermctl_set_trip_temp(void *data, int trip, int temp) return ret; if (type == THERMAL_TRIP_CRITICAL) { - return thermtrip_program(dev, sg, temp); + /* + * If thermtrips property is set in DT, + * doesn't need to program critical type trip to HW, + * if not, program critical trip to HW. + */ + if (min_low_temp == tsensor_group_thermtrip_get(ts, sg->id)) + return thermtrip_program(dev, sg, temp); + else + return 0; + } else if (type == THERMAL_TRIP_HOT) { int i; @@ -523,7 +550,8 @@ static int get_hot_temp(struct thermal_zone_device *tz, int *trip, int *temp) * @dev: struct device * of the SOC_THERM instance * * Configure the SOC_THERM HW trip points, setting "THERMTRIP" - * "THROTTLE" trip points , using "critical" or "hot" type trip_temp + * "THROTTLE" trip points , using "thermtrips", "critical" or "hot" + * type trip_temp * from thermal zone. * After they have been configured, THERMTRIP or THROTTLE will take * action when the configured SoC thermal sensor group reaches a @@ -545,28 +573,23 @@ static int tegra_soctherm_set_hwtrips(struct device *dev, { struct tegra_soctherm *ts = dev_get_drvdata(dev); struct soctherm_throt_cfg *stc; - int i, trip, temperature; - int ret; + int i, trip, temperature, ret; - ret = tz->ops->get_crit_temp(tz, &temperature); - if (ret) { - dev_warn(dev, "thermtrip: %s: missing critical temperature\n", - sg->name); - goto set_throttle; - } + /* Get thermtrips. If missing, try to get critical trips. */ + temperature = tsensor_group_thermtrip_get(ts, sg->id); + if (min_low_temp == temperature) + if (tz->ops->get_crit_temp(tz, &temperature)) + temperature = max_high_temp; ret = thermtrip_program(dev, sg, temperature); if (ret) { - dev_err(dev, "thermtrip: %s: error during enable\n", - sg->name); + dev_err(dev, "thermtrip: %s: error during enable\n", sg->name); return ret; } - dev_info(dev, - "thermtrip: will shut down when %s reaches %d mC\n", + dev_info(dev, "thermtrip: will shut down when %s reaches %d mC\n", sg->name, temperature); -set_throttle: ret = get_hot_temp(tz, &trip, &temperature); if (ret) { dev_warn(dev, "throttrip: %s: missing hot temperature\n", @@ -907,6 +930,50 @@ static const struct thermal_cooling_device_ops throt_cooling_ops = { .set_cur_state = throt_set_cdev_state, }; +static int soctherm_thermtrips_parse(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct tegra_soctherm *ts = dev_get_drvdata(dev); + struct tsensor_group_thermtrips *tt = ts->soc->thermtrips; + const int max_num_prop = ts->soc->num_ttgs * 2; + u32 *tlb; + int i, j, n, ret; + + if (!tt) + return -ENOMEM; + + n = of_property_count_u32_elems(dev->of_node, "nvidia,thermtrips"); + if (n <= 0) { + dev_info(dev, + "missing thermtrips, will use critical trips as shut down temp\n"); + return n; + } + + n = min(max_num_prop, n); + + tlb = devm_kcalloc(&pdev->dev, max_num_prop, sizeof(u32), GFP_KERNEL); + if (!tlb) + return -ENOMEM; + ret = of_property_read_u32_array(dev->of_node, "nvidia,thermtrips", + tlb, n); + if (ret) { + dev_err(dev, "invalid num ele: thermtrips:%d\n", ret); + return ret; + } + + i = 0; + for (j = 0; j < n; j = j + 2) { + if (tlb[j] >= TEGRA124_SOCTHERM_SENSOR_NUM) + continue; + + tt[i].id = tlb[j]; + tt[i].temp = tlb[j+1]; + i++; + } + + return 0; +} + /** * soctherm_init_hw_throt_cdev() - Parse the HW throttle configurations * and register them as cooling devices. @@ -1348,6 +1415,8 @@ static int tegra_soctherm_probe(struct platform_device *pdev) if (err) return err; + soctherm_thermtrips_parse(pdev); + soctherm_init_hw_throt_cdev(pdev); soctherm_init(pdev); diff --git a/drivers/thermal/tegra/soctherm.h b/drivers/thermal/tegra/soctherm.h index e96ca73fd780..c05c7e37e968 100644 --- a/drivers/thermal/tegra/soctherm.h +++ b/drivers/thermal/tegra/soctherm.h @@ -92,6 +92,11 @@ struct tegra_tsensor { const struct tegra_tsensor_group *group; }; +struct tsensor_group_thermtrips { + u8 id; + u32 temp; +}; + struct tegra_soctherm_fuse { u32 fuse_base_cp_mask, fuse_base_cp_shift; u32 fuse_base_ft_mask, fuse_base_ft_shift; @@ -113,6 +118,7 @@ struct tegra_soctherm_soc { const int thresh_grain; const unsigned int bptt; const bool use_ccroc; + struct tsensor_group_thermtrips *thermtrips; }; int tegra_calc_shared_calib(const struct tegra_soctherm_fuse *tfuse, diff --git a/drivers/thermal/tegra/tegra210-soctherm.c b/drivers/thermal/tegra/tegra210-soctherm.c index ad53169a8e95..0a0c3cec7134 100644 --- a/drivers/thermal/tegra/tegra210-soctherm.c +++ b/drivers/thermal/tegra/tegra210-soctherm.c @@ -203,6 +203,13 @@ static const struct tegra_soctherm_fuse tegra210_soctherm_fuse = { .fuse_spare_realignment = 0, }; +struct tsensor_group_thermtrips tegra210_tsensor_thermtrips[] = { + {.id = TEGRA124_SOCTHERM_SENSOR_NUM}, + {.id = TEGRA124_SOCTHERM_SENSOR_NUM}, + {.id = TEGRA124_SOCTHERM_SENSOR_NUM}, + {.id = TEGRA124_SOCTHERM_SENSOR_NUM}, +}; + const struct tegra_soctherm_soc tegra210_soctherm = { .tsensors = tegra210_tsensors, .num_tsensors = ARRAY_SIZE(tegra210_tsensors), @@ -212,4 +219,5 @@ const struct tegra_soctherm_soc tegra210_soctherm = { .thresh_grain = TEGRA210_THRESH_GRAIN, .bptt = TEGRA210_BPTT, .use_ccroc = false, + .thermtrips = tegra210_tsensor_thermtrips, }; From patchwork Fri Dec 7 10:10:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Ni X-Patchwork-Id: 1009312 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="VhDs1+WD"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43B7cg2pW0z9s0t for ; Fri, 7 Dec 2018 21:14:43 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726008AbeLGKOb (ORCPT ); Fri, 7 Dec 2018 05:14:31 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:14618 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725976AbeLGKOa (ORCPT ); Fri, 7 Dec 2018 05:14:30 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Fri, 07 Dec 2018 02:14:18 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 07 Dec 2018 02:14:29 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 07 Dec 2018 02:14:29 -0800 Received: from HQMAIL106.nvidia.com (172.18.146.12) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 7 Dec 2018 10:14:28 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Fri, 7 Dec 2018 10:14:29 +0000 Received: from niwei-ubuntu.nvidia.com (Not Verified[10.19.225.182]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Fri, 07 Dec 2018 02:14:28 -0800 From: Wei Ni To: , , CC: , , , , Wei Ni Subject: [PATCH v1 3/3] arm64: dts: tegra210: set thermtrip Date: Fri, 7 Dec 2018 18:10:07 +0800 Message-ID: <1544177407-20203-4-git-send-email-wni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1544177407-20203-1-git-send-email-wni@nvidia.com> References: <1544177407-20203-1-git-send-email-wni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1544177658; bh=9AJ9SFRAIcIBPmc/HlPCTC67fy3Vwake9TMBHYQ2Bbc=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=VhDs1+WD525q9lizbZM3gtgHKBefyjjsitjzIrly9qbvCnKa2W9oY1mOcxd4TTJFu VzPKRElC7K3Pj1cKI2vBko196ean3b/5JbsoG088gyfSiyD/hHxNbV4JzvhcMhPwvA 1M/0lfdktnmWtFkhVCfZieuiG1ng7aaIpf0GQLHZ3b4M+JwIyv9qozV5Kxv6IN50oW +YpIWD/1MI1lL+4bEBTS2Snr5R3oWpWH+gZ88P/OBAmUJDBnmArxnSEGEdOihzCjQF aJsW84vyKAY6JJ3rVdXsFcFNbecT5+7cjdnnR13OuxvyQRh3WPy4k+436rfJdmmaNV Lf80eULrqzsdg== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Set "nvidia,thermtrips" property, it used to set HW shutdown temperatures. Signed-off-by: Wei Ni --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 8fe47d6445a5..f2e89b218b23 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -1330,6 +1330,9 @@ reset-names = "soctherm"; #thermal-sensor-cells = <1>; + nvidia,thermtrips = ; + throttle-cfgs { throttle_heavy: heavy { nvidia,priority = <100>; @@ -1349,8 +1352,8 @@ <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; trips { - cpu-shutdown-trip { - temperature = <102500>; + cpu-critical-trip { + temperature = <102000>; hysteresis = <0>; type = "critical"; }; @@ -1377,7 +1380,7 @@ <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; trips { - mem-shutdown-trip { + mem-critical-trip { temperature = <103000>; hysteresis = <0>; type = "critical"; @@ -1399,8 +1402,8 @@ <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; trips { - gpu-shutdown-trip { - temperature = <103000>; + gpu-critical-trip { + temperature = <102500>; hysteresis = <0>; type = "critical"; }; @@ -1427,7 +1430,7 @@ <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; trips { - pllx-shutdown-trip { + pllx-critical-trip { temperature = <103000>; hysteresis = <0>; type = "critical";