From patchwork Wed Dec 5 06:32:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andes X-Patchwork-Id: 1008024 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=andestech.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 438pr26Dmnz9s7W for ; Wed, 5 Dec 2018 17:34:58 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 9688DC2248D; Wed, 5 Dec 2018 06:34:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.4 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, RDNS_DYNAMIC autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E4F83C21FB2; Wed, 5 Dec 2018 06:34:46 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 757ECC21C4A; Wed, 5 Dec 2018 06:34:45 +0000 (UTC) Received: from ATCSQR.andestech.com (59-120-53-16.HINET-IP.hinet.net [59.120.53.16]) by lists.denx.de (Postfix) with ESMTPS id 6A6A6C21C4A for ; Wed, 5 Dec 2018 06:34:44 +0000 (UTC) Received: from mail.andestech.com (atcpcs12.andestech.com [10.0.1.220]) by ATCSQR.andestech.com with ESMTP id wB56WmY4051674; Wed, 5 Dec 2018 14:32:48 +0800 (GMT-8) (envelope-from uboot@andestech.com) Received: from [127.0.1.1] (10.0.15.117) by ATCPCS12.andestech.com (10.0.1.220) with Microsoft SMTP Server id 14.3.123.3; Wed, 5 Dec 2018 14:34:30 +0800 MIME-Version: 1.0 From: To: , , , Date: Wed, 5 Dec 2018 14:32:16 +0800 Message-ID: X-Originating-IP: [10.0.15.117] X-DNSRBL: X-MAIL: ATCSQR.andestech.com wB56WmY4051674 X-Content-Filtered-By: Mailman/MimeDel 2.1.18 Subject: [U-Boot] Uboot send pull request X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Hi Tom, Please pull some riscv update: 1. Fix BBL may be corrupted problem. 2. Support U-Boot run ib S-mode. https://travis-ci.org/rickchen36/u-boot-riscv/builds/463646974 Thanks Rick The following changes since commit 2e2a2a5d4f0c2e2642326d9000ce1f1553632e6a: Merge branch 'master' of git://git.denx.de/u-boot-sh (2018-12-04 19:22:31 -0500) are available in the Git repository at: git://git.denx.de/u-boot-riscv.git for you to fetch changes up to 48cbf6246052de10d35b616b5efb2f783904a49d: riscv: ax25-ae350: Pass dtb address to u-boot with a1 register (2018-12-05 14:14:16 +0800) ---------------------------------------------------------------- Anup Patel (3): riscv: Add kconfig option to run U-Boot in S-mode riscv: qemu: Use different SYS_TEXT_BASE for S-mode riscv: Add S-mode defconfigs for QEMU virt machine Rick Chen (1): riscv: ax25-ae350: Pass dtb address to u-boot with a1 register arch/riscv/Kconfig | 5 +++++ arch/riscv/cpu/start.S | 25 +++++++++++++++---------- arch/riscv/include/asm/encoding.h | 6 ++++++ arch/riscv/lib/interrupts.c | 31 ++++++++++++++++++++++--------- board/AndesTech/ax25-ae350/ax25-ae350.c | 3 ++- board/emulation/qemu-riscv/Kconfig | 3 ++- board/emulation/qemu-riscv/MAINTAINERS | 2 ++ configs/qemu-riscv32_smode_defconfig | 10 ++++++++++ configs/qemu-riscv64_smode_defconfig | 11 +++++++++++ 9 files changed, 75 insertions(+), 21 deletions(-) create mode 100644 configs/qemu-riscv32_smode_defconfig create mode 100644 configs/qemu-riscv64_smode_defconfig