From patchwork Sun Dec 2 19:35:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1006533 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="JOjdA/v9"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 437JJt5gd9z9s47 for ; Mon, 3 Dec 2018 06:36:14 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725747AbeLBTgQ (ORCPT ); Sun, 2 Dec 2018 14:36:16 -0500 Received: from mail-wm1-f66.google.com ([209.85.128.66]:36698 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725616AbeLBTgQ (ORCPT ); Sun, 2 Dec 2018 14:36:16 -0500 Received: by mail-wm1-f66.google.com with SMTP id a18so3621916wmj.1; Sun, 02 Dec 2018 11:36:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=LYlAK5oYDdCUP/Dc3WUFK8DyLWBIup4NN2cLGA4Hjg0=; b=JOjdA/v9JaLGfFC13mznoyXXtLfuyOFjaVgfyKs5G2tOtp+vf0gvfkTU1T8im4ZGNv y0D9NJhQDv++nmQ8/jBslcDYtcoA+2xhEfVmt/Vdi5OO3yzvh9qGGdaTDfKZleFCrjOB 3O4Q6dag3WOb1E28aw/o4fGSdtexuQrtDP+sgic9TiBK87j+sxIxG2DpxceOsqFg2DtQ r+hf0UXk+tTSdO78ou2Jspmo+n5r7UDb2oh+ekAQ1Y50qpNVhYNYsWCyzdD5R9V1EjrV N3aYNbeQpMcAdGUWbkSK0ohNUuLvA4Z+69Zq6aL6wyOvs240rCH5u/c7RMajCxMen/At eSPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=LYlAK5oYDdCUP/Dc3WUFK8DyLWBIup4NN2cLGA4Hjg0=; b=Jgonl2KF7lgw3xgRAkxYViHBeN8KUDf1BvQHFn0Nhszs9vh/WXsT3GS7y8hK0M+ihN tqabOMYwhdf2i1rRoZiB0V01055RodG18rSHgMqdiXlHXbO4yo6z6RxNVVtjDbYkm5FX IiwKpJT1Zz/eQMYJm6G6+VcAtMhAtJBsc2N2tCPhlnbhVO77LBMOMowRK2XOQW5eXXdk ckyzlxaNNC5+fnGZX+bXSd6twnewaP8dOtwrtytdsvynXAXb/WQy1QV2pWz6mIc/tpSO vW9jrf4KpBipy0Bw3oHJ53zOPnCgjfvBEqZqx5SLklBUUl8CBDy8mhzrvpk7p+T3BnN9 fLTg== X-Gm-Message-State: AA+aEWbCjuV+jwPhg8i1akYGTK4aFzS4tdl7owZsdVoKTSkP6Esg69+x cgz2BQYz+RMncl6trekcyBf/Yqw8 X-Google-Smtp-Source: AFSGD/U6vPro2gDx8+94F2Tr5fs5JVWcDpWAK17imYEFdn7osK38eD+WFifAHMM5j+tYRHH/ytBvBQ== X-Received: by 2002:a1c:650b:: with SMTP id z11mr5830218wmb.23.1543779370620; Sun, 02 Dec 2018 11:36:10 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id y185sm4016628wmg.34.2018.12.02.11.36.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:36:09 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH 01/14] gpio: pca953x: Deduplicate the bank_size Date: Sun, 2 Dec 2018 20:35:40 +0100 Message-Id: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The bank_size = fls(...) code was duplicated in the driver 5 times, pull it into separate function. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 023a32cfac42..31e3b1b52330 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -159,11 +159,16 @@ struct pca953x_chip { int (*read_regs)(struct pca953x_chip *, int, u8 *); }; +static int pca953x_bank_shift(struct pca953x_chip *chip) +{ + return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); +} + static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, int off) { int ret; - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); + int bank_shift = pca953x_bank_shift(chip); int offset = off / BANK_SZ; ret = i2c_smbus_read_byte_data(chip->client, @@ -182,7 +187,7 @@ static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, int off) { int ret; - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); + int bank_shift = pca953x_bank_shift(chip); int offset = off / BANK_SZ; ret = i2c_smbus_write_byte_data(chip->client, @@ -221,7 +226,7 @@ static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) { - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); + int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; @@ -265,7 +270,7 @@ static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val) { - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); + int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; @@ -402,13 +407,12 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits) { struct pca953x_chip *chip = gpiochip_get_data(gc); + int bank_shift = pca953x_bank_shift(chip); unsigned int bank_mask, bank_val; - int bank_shift, bank; + int bank; u8 reg_val[MAX_BANK]; int ret; - bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); - mutex_lock(&chip->i2c_lock); memcpy(reg_val, chip->reg_output, NBANK(chip)); for (bank = 0; bank < NBANK(chip); bank++) { From patchwork Sun Dec 2 19:35:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1006534 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ZPKtjWeI"; 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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id y185sm4016628wmg.34.2018.12.02.11.36.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:36:11 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH 02/14] gpio: pca953x: Fix AI overflow on PCAL6524 Date: Sun, 2 Dec 2018 20:35:41 +0100 Message-Id: <20181202193553.29704-2-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> References: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The PCAL_PINCTRL_MASK is too large. The extended register block on PCAL6524, which is the largest chip with this block, has the block limited to address range 0x40..0x7f. This is because the bit 7 in the command register is used for the Address Increment functionality. Trim the mask to 0x60 to match the datasheet and to prevent accidental overwrite of the AI bit. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski Reviewed-by: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 31e3b1b52330..4e9c79ca69c5 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -58,7 +58,7 @@ #define PCA_GPIO_MASK 0x00FF #define PCAL_GPIO_MASK 0x1f -#define PCAL_PINCTRL_MASK 0xe0 +#define PCAL_PINCTRL_MASK 0x60 #define PCA_INT 0x0100 #define PCA_PCAL 0x0200 From patchwork Sun Dec 2 19:35:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1006535 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="krEXoI3h"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 437JJx49qSz9s47 for ; Mon, 3 Dec 2018 06:36:17 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725788AbeLBTgU (ORCPT ); Sun, 2 Dec 2018 14:36:20 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:33511 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725710AbeLBTgT (ORCPT ); Sun, 2 Dec 2018 14:36:19 -0500 Received: by mail-wm1-f67.google.com with SMTP id r24so5445732wmh.0; Sun, 02 Dec 2018 11:36:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Rm7z5Cjr3bXWI9Di4Ky6yJyaTa48zHt711qZrvk7FI8=; b=krEXoI3hFHpr1/qe9Y2v1Wv84Kd0KXe/+CKtayHeXKAvf43SW5/HfMJD/AUI6QUCKC n+IfU++uUPYK5m56h9VKFfnnMtOPqNqVtV4Cc/jN4g1mjIhftOfzWI9a5659BeDOY0rD 5RYsaUeI9HzEYgMghaHs2CVdORZ2EFqPBAWMrNVbpkK9zub4Hn8SV4t3Gqa09HJ8JDVY qFE3o6xXwoSXw+hnorTh+X7Jb9Xd8S7YozDsPjpxPPQLHFvEvSm3z5m2YySsAJKZX73b c8YBvALEAOqb1HlMydSbJwDUFBQajWarlyk9sYZjY/uj+h254AVoPOsZFheWnKIFgrd5 xuTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Rm7z5Cjr3bXWI9Di4Ky6yJyaTa48zHt711qZrvk7FI8=; b=uipV9/NtS+aSaoLsQG2SGj1vnvmkY8sOwR35w6vAMh7kNctAW1ZyIZQRc+ffEMICn3 WNHjW3pWezpI9mCdJVV5WpkrYcgBpfPmgjbLNABhHTApHgKLcOric2qVe6MCOnDLZXoB WcPYjZbE/77g8DO0YOr1ZxzuZ+zvSeIf9NpKje8MJJ8fwfvDDREiBbAUzkL1aKudi/bl dYMMM1a1lHs1eaXwMWkiUNeogBNfbxbP82EakYFXHBGZCXbjnMr+EhyfVWJWygOFNAz0 /LObMvXZhmBoTngu0Z08haISBhNzIa105Wk5Kp5HR3EN11rqgIVuc6sTV+FA7zxzQ+KC LHNQ== X-Gm-Message-State: AA+aEWbNwPx7Dxu5DqI3OAokxVMYbAGau6w1j6wCrTxWN3CUPxrHn3Tp 1HamD3vz8fwzNg4q+y3+UDP1Ij2C X-Google-Smtp-Source: AFSGD/U7SaU6sfErAkV9byrOpLYoL69p2+iiqyl8hmCAWkMGxEPXIi5MwBJFS6L+UqYlb5uRJfNq4A== X-Received: by 2002:a1c:35c5:: with SMTP id c188mr6063346wma.134.1543779373344; Sun, 02 Dec 2018 11:36:13 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id y185sm4016628wmg.34.2018.12.02.11.36.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:36:12 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH 03/14] gpio: pca953x: Repair multi-byte IO address increment on PCA9575 Date: Sun, 2 Dec 2018 20:35:42 +0100 Message-Id: <20181202193553.29704-3-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> References: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The multi-byte IO on various pca953x chips requires the auto-increment bit, while other chips toggle the LSbit automatically. Note that LSbit toggling only alternates between two registers during the IO, it is not the same as address auto-increment. The driver currently assumes that #gpios > 16 implies auto-increment, while #gpios <= 16 implies LSbit toggling. This is incorrect at there are chips with 16 GPIOs which require the auto-increment bit. The PCA9575, according to NXP datasheet rev. 4.2 from 16 April 2015, section 7.3 Command Register, the bit 7 in command register is the auto-increment bit, which allows programming multiple registers sequentially. Set this bit both in pca953x_gpio_set_multiple(), where it fixes the multi register programming, and in pca957x_write_regs_16(), where is simplifies the function. In fact, the pca957x_write_regs_16() now looks rather similar to pca953x_write_regs_24() and pca953x_write_regs_16(), which is intended for subsequent patches. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 4e9c79ca69c5..479fa376bd18 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -215,13 +215,10 @@ static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) { - int ret; - - ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]); - if (ret < 0) - return ret; + u32 regaddr = (reg << 1) | REG_ADDR_AI; - return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]); + return i2c_smbus_write_i2c_block_data(chip->client, regaddr, + NBANK(chip), val); } static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) @@ -408,6 +405,7 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, { struct pca953x_chip *chip = gpiochip_get_data(gc); int bank_shift = pca953x_bank_shift(chip); + u32 regaddr = chip->regs->output << bank_shift; unsigned int bank_mask, bank_val; int bank; u8 reg_val[MAX_BANK]; @@ -426,8 +424,13 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, } } - ret = i2c_smbus_write_i2c_block_data(chip->client, - chip->regs->output << bank_shift, + /* PCA9575 needs address-increment on multi-byte writes */ + if ((PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) && + (NBANK(chip) > 1)) { + regaddr |= REG_ADDR_AI; + } + + ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, NBANK(chip), reg_val); if (ret) goto exit; From patchwork Sun Dec 2 19:35:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1006536 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="uzWnmIwI"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 437JJy2VFBz9s8r for ; Mon, 3 Dec 2018 06:36:18 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725791AbeLBTgV (ORCPT ); Sun, 2 Dec 2018 14:36:21 -0500 Received: from mail-wr1-f68.google.com ([209.85.221.68]:38650 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725782AbeLBTgU (ORCPT ); Sun, 2 Dec 2018 14:36:20 -0500 Received: by mail-wr1-f68.google.com with SMTP id v13so9985027wrw.5; Sun, 02 Dec 2018 11:36:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EUQ62/lExujbtX37sF68cLzhQ7vu+vas86ULqriXP00=; b=uzWnmIwI+gvDnaIIHfMt1SfdlLabb7ZAsrxdsLzNCwBS2XL+Nnz5yawWQyv/J7z9CT 5gBi+Hv0q5sPAgB/1k7Hw2yUFZGA3y1m+qFqnfoHpWy6awDH4VHerOify6PenGlf5cqT qR2L9P+7wCkdtXNDvUeQ3E2as+t0fPNBPXnELP7jPQe7pNwKLCHb80C/RHsyyiSYquLF 7TBCqUPZ+pb2NJjzd+O2/PlAmJ9+lUAmoUIxRJvkJSsMjkmBQUNpcMCIVof/Kvy++K/v lJQBR5NqIqp9mQI4zFsswyVgj6Xd/Tx+QsSI18yQ0mGrj/PXK/iFEpLc1//rRIjy9Rwa +B0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=EUQ62/lExujbtX37sF68cLzhQ7vu+vas86ULqriXP00=; b=d4ApmpFGkYvq5GOraS5K3kz6MzlvbHrbPJsLDKDAPJBhK6PcKA+mF+QmoR6W7sOv9I bZD0SIV6Rtj5QcAHSKlUalFDQ8pdx7ts72FGp09MaFwt/WydTOmK1RdYL54yshh9M26o hNqwgYAFb7X8oPTcRs03KnCSevNzeJJUWV4Q1gcBZ/WVuVTSRh8IfPisU97gqFkwPEOO f0Ixurj7TgY1ZT4HZItGqV1OKtb1Cl+LMoZ2JY2anv9+dIb3SvfU9nNWcAMhuATnReEe 7etJHuwGzf/OS+hP1fgCX/Nj2MIw3i2fSKxY6D0lARp7PeBAB8QHJpHWclDEe8z3M1zf Zwog== X-Gm-Message-State: AA+aEWak0GS21FBIsir/YIEBN5BGTR6qWQTTIJNtE/aFcdRg3TN0z8n8 SKhK4LmQfXp8l/xdJ+GbX4aB832L X-Google-Smtp-Source: AFSGD/Us2Cv2GBDwqjoD5x1Ggk6NpWSDBuaYFAWmsY308Hf+n+ExMRclp4cXGJWUxNEOIT4eyyHc6w== X-Received: by 2002:a5d:4dc8:: with SMTP id f8mr11936679wru.45.1543779374554; Sun, 02 Dec 2018 11:36:14 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id y185sm4016628wmg.34.2018.12.02.11.36.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:36:13 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH 04/14] gpio: pca953x: Unify pca95{3,7}x_write_regs_16() Date: Sun, 2 Dec 2018 20:35:43 +0100 Message-Id: <20181202193553.29704-4-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> References: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org At this point, these two functions only differ in whether they do or do not set the address increment bit on PCA9575. Merge these two functions together to simplify the code a bit. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 479fa376bd18..2e02b3a9ac48 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -208,14 +208,11 @@ static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) { - u16 word = get_unaligned((u16 *)val); + u32 regaddr = (reg << 1); - return i2c_smbus_write_word_data(chip->client, reg << 1, word); -} - -static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) -{ - u32 regaddr = (reg << 1) | REG_ADDR_AI; + /* PCA9575 needs address-increment on multi-byte writes */ + if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) + regaddr |= REG_ADDR_AI; return i2c_smbus_write_i2c_block_data(chip->client, regaddr, NBANK(chip), val); @@ -892,10 +889,7 @@ static int pca953x_probe(struct i2c_client *client, chip->write_regs = pca953x_write_regs_24; chip->read_regs = pca953x_read_regs_24; } else { - if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) - chip->write_regs = pca953x_write_regs_16; - else - chip->write_regs = pca957x_write_regs_16; + chip->write_regs = pca953x_write_regs_16; chip->read_regs = pca953x_read_regs_16; } From patchwork Sun Dec 2 19:35:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1006537 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="P1Jdt+a6"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 437JJz0rGpz9s47 for ; Mon, 3 Dec 2018 06:36:19 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725789AbeLBTgV (ORCPT ); Sun, 2 Dec 2018 14:36:21 -0500 Received: from mail-wm1-f66.google.com ([209.85.128.66]:56093 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725710AbeLBTgV (ORCPT ); Sun, 2 Dec 2018 14:36:21 -0500 Received: by mail-wm1-f66.google.com with SMTP id y139so3624594wmc.5; Sun, 02 Dec 2018 11:36:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=KNjplkWp4FhWYBXQ2412QnbOBs5cnYg14L4PmMlOMVg=; b=P1Jdt+a6EIqaOBwR9sJDafFLkMP1W4kWaUB7MxQ/tKXuO2e4ORr+HeEcEnErCsovJR XdzfVOBnjHGYSHuqO1uaaU87NVL4AyRKY8nR+/kOeLHkGO3662AMJnyg8Kzt3VdQmnUS /+x57ZBACynJyEnyymTz7VA75xpSZwtc3fdUcYJzFOPFFpgGtlDvyDXWSIwjdL52uHIj zMPxaM6SfOZ1jqOU5by1hCrPx03rbmI4g6pz01njbEiA6j0Ie9xx8mswpziwg8RD4tOB JhHIZnNX+IaC2PAc4tF6fRw3FToCRmKeQhgINEtR34Z733mUgTGl/a0LGgNo1B2QDTUa QMNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KNjplkWp4FhWYBXQ2412QnbOBs5cnYg14L4PmMlOMVg=; b=eU04hjqd3jlWgvpyd+O73OHeJabL7ttlD4gS1yyZoLcd07ngmQI2Qktf892R2q7hur wWrlGVgTC67Io9UWYsTdSgfva50yjwkfeNYS6D+TvAPHLg0sEbW719oxRGdZtzhD/luY 69uJgcSTLPPjuMogQWPjLGzwszFBLQu432zLrj/5fufn/edqtjZH87SF+rCROotFnrpb teMlALcfiMhrnnrQ4tSSPC/KSLs3ksifhtGVVx3ZgziDy5bKbcyGd8HPDSwsJ7K2lY4i wsPxw3gdszT8Dtlc2d4ZScUDHcYzsZAf44zAeyz4eo+giN+8cJ1rt4yKyhVHZi++PONQ IA2g== X-Gm-Message-State: AA+aEWaCfl4D/W7/9xwpdX10E9dSDJhYsEboBi79yr/68yiF4YJWC4/2 C+gieUO7ZOuNpmFtPitRy/bWhd0K X-Google-Smtp-Source: AFSGD/UuliWu8MTyv7lYDai2/B2CjNp2m2Opc3nGxRlRMA6zBZtEn1urbs3b5olpB/gy17Xu0kh/Yg== X-Received: by 2002:a1c:9e4a:: with SMTP id h71mr2494583wme.82.1543779375944; Sun, 02 Dec 2018 11:36:15 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id y185sm4016628wmg.34.2018.12.02.11.36.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:36:14 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH 05/14] gpio: pca953x: Unify pca953x_{read, write}_regs_{16, 24}() Date: Sun, 2 Dec 2018 20:35:44 +0100 Message-Id: <20181202193553.29704-5-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> References: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org At this point, these two functions only differ in whether they do or do not set the address increment bit. The 16 GPIO case does not need to set the AI bit, except for PCA9575 on write, while the 24 GPIO and more case does set the AI bit always. Merge these two functions together to simplify the code a bit. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 49 ++++++++++++++----------------------- 1 file changed, 18 insertions(+), 31 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 2e02b3a9ac48..551fa69661b2 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -206,9 +206,16 @@ static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val) return i2c_smbus_write_byte_data(chip->client, reg, *val); } -static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) +static int pca953x_write_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) { - u32 regaddr = (reg << 1); + int bank_shift = pca953x_bank_shift(chip); + int addr = (reg & PCAL_GPIO_MASK) << bank_shift; + int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; + u8 regaddr = pinctrl | addr; + + /* Chips with 24 and more GPIOs always support Auto Increment */ + if (NBANK(chip) > 2) + regaddr |= REG_ADDR_AI; /* PCA9575 needs address-increment on multi-byte writes */ if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) @@ -218,17 +225,6 @@ static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) NBANK(chip), val); } -static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) -{ - int bank_shift = pca953x_bank_shift(chip); - int addr = (reg & PCAL_GPIO_MASK) << bank_shift; - int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; - - return i2c_smbus_write_i2c_block_data(chip->client, - pinctrl | addr | REG_ADDR_AI, - NBANK(chip), val); -} - static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { int ret = 0; @@ -252,24 +248,18 @@ static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val) return ret; } -static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val) -{ - int ret; - - ret = i2c_smbus_read_word_data(chip->client, reg << 1); - put_unaligned(ret, (u16 *)val); - - return ret; -} - -static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val) +static int pca953x_read_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) { int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; + u8 regaddr = pinctrl | addr; + + /* Chips with 24 and more GPIOs always support Auto Increment */ + if (NBANK(chip) > 2) + regaddr |= REG_ADDR_AI; - return i2c_smbus_read_i2c_block_data(chip->client, - pinctrl | addr | REG_ADDR_AI, + return i2c_smbus_read_i2c_block_data(chip->client, regaddr, NBANK(chip), val); } @@ -885,12 +875,9 @@ static int pca953x_probe(struct i2c_client *client, if (chip->gpio_chip.ngpio <= 8) { chip->write_regs = pca953x_write_regs_8; chip->read_regs = pca953x_read_regs_8; - } else if (chip->gpio_chip.ngpio >= 24) { - chip->write_regs = pca953x_write_regs_24; - chip->read_regs = pca953x_read_regs_24; } else { - chip->write_regs = pca953x_write_regs_16; - chip->read_regs = pca953x_read_regs_16; + chip->write_regs = pca953x_write_regs_mul; + chip->read_regs = pca953x_read_regs_mul; } if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) From patchwork Sun Dec 2 19:35:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1006538 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ZWF0SLne"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 437JK06R1Cz9s47 for ; Mon, 3 Dec 2018 06:36:20 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725795AbeLBTgX (ORCPT ); Sun, 2 Dec 2018 14:36:23 -0500 Received: from mail-wm1-f66.google.com ([209.85.128.66]:56094 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725782AbeLBTgX (ORCPT ); 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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id y185sm4016628wmg.34.2018.12.02.11.36.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:36:16 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH 06/14] gpio: pca953x: Unify pca953x_{read, write}_regs_{8, mul}() Date: Sun, 2 Dec 2018 20:35:45 +0100 Message-Id: <20181202193553.29704-6-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> References: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org At this point, the pca953x_{read,write}_regs_mul() can read single bank PCA953x GPIO chips as well. Merge the _8 and _mul functions together to simplify the code a bit. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 54 ++++++------------------------------- 1 file changed, 8 insertions(+), 46 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 551fa69661b2..09fd8cde9ca9 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -154,9 +154,6 @@ struct pca953x_chip { struct regulator *regulator; const struct pca953x_reg_config *regs; - - int (*write_regs)(struct pca953x_chip *, int, u8 *); - int (*read_regs)(struct pca953x_chip *, int, u8 *); }; static int pca953x_bank_shift(struct pca953x_chip *chip) @@ -201,17 +198,13 @@ static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, return 0; } -static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val) -{ - return i2c_smbus_write_byte_data(chip->client, reg, *val); -} - -static int pca953x_write_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) +static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; u8 regaddr = pinctrl | addr; + int ret; /* Chips with 24 and more GPIOs always support Auto Increment */ if (NBANK(chip) > 2) @@ -221,15 +214,8 @@ static int pca953x_write_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) regaddr |= REG_ADDR_AI; - return i2c_smbus_write_i2c_block_data(chip->client, regaddr, - NBANK(chip), val); -} - -static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) -{ - int ret = 0; - - ret = chip->write_regs(chip, reg, val); + ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, + NBANK(chip), val); if (ret < 0) { dev_err(&chip->client->dev, "failed writing register\n"); return ret; @@ -238,36 +224,20 @@ static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) return 0; } -static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val) -{ - int ret; - - ret = i2c_smbus_read_byte_data(chip->client, reg); - *val = ret; - - return ret; -} - -static int pca953x_read_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) +static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) { int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; u8 regaddr = pinctrl | addr; + int ret; /* Chips with 24 and more GPIOs always support Auto Increment */ if (NBANK(chip) > 2) regaddr |= REG_ADDR_AI; - return i2c_smbus_read_i2c_block_data(chip->client, regaddr, - NBANK(chip), val); -} - -static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) -{ - int ret; - - ret = chip->read_regs(chip, reg, val); + ret = i2c_smbus_read_i2c_block_data(chip->client, regaddr, + NBANK(chip), val); if (ret < 0) { dev_err(&chip->client->dev, "failed reading register\n"); return ret; @@ -872,14 +842,6 @@ static int pca953x_probe(struct i2c_client *client, */ pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); - if (chip->gpio_chip.ngpio <= 8) { - chip->write_regs = pca953x_write_regs_8; - chip->read_regs = pca953x_read_regs_8; - } else { - chip->write_regs = pca953x_write_regs_mul; - chip->read_regs = pca953x_read_regs_mul; - } - if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) ret = device_pca953x_init(chip, invert); else From patchwork Sun Dec 2 19:35:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1006539 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="P0EkSd5D"; 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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id y185sm4016628wmg.34.2018.12.02.11.36.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:36:17 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH 07/14] gpio: pca953x: Factor out common code from device_pca95xx_init() Date: Sun, 2 Dec 2018 20:35:46 +0100 Message-Id: <20181202193553.29704-7-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> References: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The PCA957x and PCA953x init functions are almost the same, except for the different register mapping and one extra write to BKEN register in case of PCA957x. Factor out the common code. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 35 ++++++++++++----------------------- 1 file changed, 12 insertions(+), 23 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 09fd8cde9ca9..dc691bd52a79 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -119,18 +119,21 @@ struct pca953x_reg_config { int direction; int output; int input; + int invert; }; static const struct pca953x_reg_config pca953x_regs = { .direction = PCA953X_DIRECTION, .output = PCA953X_OUTPUT, .input = PCA953X_INPUT, + .invert = PCA953X_INVERT, }; static const struct pca953x_reg_config pca957x_regs = { .direction = PCA957X_CFG, .output = PCA957X_OUT, .input = PCA957X_IN, + .invert = PCA957X_INVRT, }; struct pca953x_chip { @@ -679,13 +682,11 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, } #endif -static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) +static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) { int ret; u8 val[MAX_BANK]; - chip->regs = &pca953x_regs; - ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); if (ret) goto out; @@ -701,7 +702,7 @@ static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) else memset(val, 0, NBANK(chip)); - ret = pca953x_write_regs(chip, PCA953X_INVERT, val); + ret = pca953x_write_regs(chip, chip->regs->invert, val); out: return ret; } @@ -711,22 +712,7 @@ static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) int ret; u8 val[MAX_BANK]; - chip->regs = &pca957x_regs; - - ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); - if (ret) - goto out; - ret = pca953x_read_regs(chip, chip->regs->direction, - chip->reg_direction); - if (ret) - goto out; - - /* set platform specific polarity inversion */ - if (invert) - memset(val, 0xFF, NBANK(chip)); - else - memset(val, 0, NBANK(chip)); - ret = pca953x_write_regs(chip, PCA957X_INVRT, val); + ret = device_pca95xx_init(chip, invert); if (ret) goto out; @@ -842,10 +828,13 @@ static int pca953x_probe(struct i2c_client *client, */ pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); - if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) - ret = device_pca953x_init(chip, invert); - else + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { + chip->regs = &pca953x_regs; + ret = device_pca95xx_init(chip, invert); + } else { + chip->regs = &pca957x_regs; ret = device_pca957x_init(chip, invert); + } if (ret) goto err_exit; From patchwork Sun Dec 2 19:35:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1006540 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="RHCkSeIe"; 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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id y185sm4016628wmg.34.2018.12.02.11.36.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:36:19 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH 08/14] gpio: pca953x: Zap ad-hoc I2C block write in multi GPIO set Date: Sun, 2 Dec 2018 20:35:47 +0100 Message-Id: <20181202193553.29704-8-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> References: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The ad-hoc i2c block write can be replaced by standard register accessor function, which correctly handles all the chip details and differences. Do so to simplify the code. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index dc691bd52a79..b3386819c550 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -364,8 +364,6 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits) { struct pca953x_chip *chip = gpiochip_get_data(gc); - int bank_shift = pca953x_bank_shift(chip); - u32 regaddr = chip->regs->output << bank_shift; unsigned int bank_mask, bank_val; int bank; u8 reg_val[MAX_BANK]; @@ -384,14 +382,7 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, } } - /* PCA9575 needs address-increment on multi-byte writes */ - if ((PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) && - (NBANK(chip) > 1)) { - regaddr |= REG_ADDR_AI; - } - - ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, - NBANK(chip), reg_val); + ret = pca953x_write_regs(chip, chip->regs->output, reg_val); if (ret) goto exit; From patchwork Sun Dec 2 19:35:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1006542 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="hLoG3URH"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 437JK63pPSz9s8r for ; Mon, 3 Dec 2018 06:36:26 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725802AbeLBTg2 (ORCPT ); Sun, 2 Dec 2018 14:36:28 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:55092 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725782AbeLBTg2 (ORCPT ); Sun, 2 Dec 2018 14:36:28 -0500 Received: by mail-wm1-f68.google.com with SMTP id z18so3642461wmc.4; Sun, 02 Dec 2018 11:36:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hSlQnCcojHHdEEkajLCa9nKueSOFn+5wqiNe1S0dq70=; b=hLoG3URHBvEwMT98RQtsTzM9ZFCJWcNPguretqrM7bQJifC89sNZU0Z1ev+Jk+5gvr 4ITJc30gMFOflz8wBW0K/Hi436mltbdP86GMIS6JwVAqXMdUjQWKhIIHlhdyJW+ENyf5 MfnLQGZrpm446McSllD3B0nhBhp8MSvhzIVl/2hJ2kpB0CZzP34H/U9uJFOz2jF2FgfR J1nYaPG5s09YH7fKiwQ/agdryt9fBxxzFygLSD+LdXXQH3CecXAfrbd3Gl+w40/EZZnI pk5p/ht+BIVqLPgMvJfL0bCn4uXsI6lPZOKh/aNIzgY6I+PUx5AgcwIM3INFHBIZOZVe r+XQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hSlQnCcojHHdEEkajLCa9nKueSOFn+5wqiNe1S0dq70=; b=PTcWRfaulT/1o55ZQGn4OAoNMqs6EhJdQ50QDaV92PyS07Z1skI5K4acQ/SuIePOcn LuqsiKFvQZpo7Lh69GRWpAAjFtrtHRUZA80OzfJWD9JapaWV81OyHGE3mKGekZLdYsh6 vTSUHvBLL/pBoHk86DhQ6LaWXB0LbfN1W8VzWwpwmrtbfwxsZCujIga2kNwtkFP1/Q/q 0yLSvfbp5GrgC4Z8naZJ3EKNW2AsHHlZTUzd549cIW9oeOxFlfDd8Tqw+uNdZeNgjW8z v8svAapK1UZLhK//YIPIrr0STq9f4AgZ4EUA+u4B1T3s7cAOTJ102O1K4VQezC7R5tFD fh7w== X-Gm-Message-State: AA+aEWZE1j48CIaVSbMcoUZ/JJpFzK1rfO+9uAX+N5kTBNSTA0XL/R6m WPPy5e/r7D2/pNkNJEjysuAfQzfq X-Google-Smtp-Source: AFSGD/WGL0wMXyVTj3cr2tbfTuJT04zP5rXkwGtnAUQ8AVi35yoQkY98GsHQrIxt6GFBVuqTC25byQ== X-Received: by 2002:a1c:f916:: with SMTP id x22mr6024546wmh.87.1543779380954; Sun, 02 Dec 2018 11:36:20 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id y185sm4016628wmg.34.2018.12.02.11.36.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:36:20 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH 09/14] gpio: pca953x: Extract the register address mangling to single function Date: Sun, 2 Dec 2018 20:35:48 +0100 Message-Id: <20181202193553.29704-9-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> References: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Instead of having the I2C register calculation function spread across multiple accessor functions, pull it out into a single function which returns the adjusted register address. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 59 ++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 30 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index b3386819c550..7e66f46b41b2 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -164,17 +164,37 @@ static int pca953x_bank_shift(struct pca953x_chip *chip) return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); } +static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off, + bool write, bool addrinc) +{ + int bank_shift = pca953x_bank_shift(chip); + int addr = (reg & PCAL_GPIO_MASK) << bank_shift; + int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; + u8 regaddr = pinctrl | addr | (off / BANK_SZ); + + /* Single byte read doesn't need AI bit set. */ + if (!addrinc) + return regaddr; + + /* Chips with 24 and more GPIOs always support Auto Increment */ + if (write && NBANK(chip) > 2) + regaddr |= REG_ADDR_AI; + + /* PCA9575 needs address-increment on multi-byte writes */ + if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) + regaddr |= REG_ADDR_AI; + + return regaddr; +} + static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, int off) { + u8 regaddr = pca953x_recalc_addr(chip, reg, off, false, false); int ret; - int bank_shift = pca953x_bank_shift(chip); - int offset = off / BANK_SZ; - ret = i2c_smbus_read_byte_data(chip->client, - (reg << bank_shift) + offset); + ret = i2c_smbus_read_byte_data(chip->client, regaddr); *val = ret; - if (ret < 0) { dev_err(&chip->client->dev, "failed reading register\n"); return ret; @@ -186,13 +206,10 @@ static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, int off) { + u8 regaddr = pca953x_recalc_addr(chip, reg, off, true, false); int ret; - int bank_shift = pca953x_bank_shift(chip); - int offset = off / BANK_SZ; - - ret = i2c_smbus_write_byte_data(chip->client, - (reg << bank_shift) + offset, val); + ret = i2c_smbus_write_byte_data(chip->client, regaddr, val); if (ret < 0) { dev_err(&chip->client->dev, "failed writing register\n"); return ret; @@ -203,20 +220,9 @@ static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { - int bank_shift = pca953x_bank_shift(chip); - int addr = (reg & PCAL_GPIO_MASK) << bank_shift; - int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; - u8 regaddr = pinctrl | addr; + u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true); int ret; - /* Chips with 24 and more GPIOs always support Auto Increment */ - if (NBANK(chip) > 2) - regaddr |= REG_ADDR_AI; - - /* PCA9575 needs address-increment on multi-byte writes */ - if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) - regaddr |= REG_ADDR_AI; - ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, NBANK(chip), val); if (ret < 0) { @@ -229,16 +235,9 @@ static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) { - int bank_shift = pca953x_bank_shift(chip); - int addr = (reg & PCAL_GPIO_MASK) << bank_shift; - int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; - u8 regaddr = pinctrl | addr; + u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true); int ret; - /* Chips with 24 and more GPIOs always support Auto Increment */ - if (NBANK(chip) > 2) - regaddr |= REG_ADDR_AI; - ret = i2c_smbus_read_i2c_block_data(chip->client, regaddr, NBANK(chip), val); if (ret < 0) { From patchwork Sun Dec 2 19:35:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1006541 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; 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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id y185sm4016628wmg.34.2018.12.02.11.36.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:36:21 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH 10/14] gpio: pca953x: Perform basic regmap conversion Date: Sun, 2 Dec 2018 20:35:49 +0100 Message-Id: <20181202193553.29704-10-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> References: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Convert the driver to use regmap to access the chips. Due to the convoluted register mapping scheme, implement read/write/volatile check functions that untangle the mess and perform check accordingly. This patch does not zap the internal register cache of the PCA953x driver, nor does it push the regmap access down into the gpiochip accessors to simplify the review. All that is in subsequent patches. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 159 ++++++++++++++++++++++++++++++++++-- 1 file changed, 151 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 7e66f46b41b2..389fa891f342 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -30,6 +31,8 @@ #define PCA953X_INVERT 0x02 #define PCA953X_DIRECTION 0x03 +#define REG_ADDR_MASK 0x3f +#define REG_ADDR_EXT 0x40 #define REG_ADDR_AI 0x80 #define PCA957X_IN 0x00 @@ -141,6 +144,7 @@ struct pca953x_chip { u8 reg_output[MAX_BANK]; u8 reg_direction[MAX_BANK]; struct mutex i2c_lock; + struct regmap *regmap; #ifdef CONFIG_GPIO_PCA953X_IRQ struct mutex irq_lock; @@ -164,6 +168,141 @@ static int pca953x_bank_shift(struct pca953x_chip *chip) return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); } +#define PCA953x_BANK_INPUT BIT(0) +#define PCA953x_BANK_OUTPUT BIT(1) +#define PCA953x_BANK_POLARITY BIT(2) +#define PCA953x_BANK_CONFIG BIT(3) + +#define PCA957x_BANK_INPUT BIT(0) +#define PCA957x_BANK_POLARITY BIT(1) +#define PCA957x_BANK_BUSHOLD BIT(2) +#define PCA957x_BANK_CONFIG BIT(4) +#define PCA957x_BANK_OUTPUT BIT(5) + +#define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2) +#define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5) +#define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6) + +/* + * We care about the following registers: + * - Standard set, below 0x40, each port can be replicated up to 8 times + * - PCA953x standard + * Input port 0x00 + 0 * bank_size R + * Output port 0x00 + 1 * bank_size RW + * Polarity Inversion port 0x00 + 2 * bank_size RW + * Configuration port 0x00 + 3 * bank_size RW + * - PCA957x with mixed up registers + * Input port 0x00 + 0 * bank_size R + * Polarity Inversion port 0x00 + 1 * bank_size RW + * Bus hold port 0x00 + 2 * bank_size RW + * Configuration port 0x00 + 4 * bank_size RW + * Output port 0x00 + 5 * bank_size RW + * + * - Extended set, above 0x40, often chip specific. + * - PCAL6524/PCAL9555A with custom PCAL IRQ handling: + * Input latch register 0x40 + 2 * bank_size RW + * Interrupt mask register 0x40 + 5 * bank_size RW + * Interrupt status register 0x40 + 6 * bank_size R + * + * - Registers with bit 0x80 set, the AI bit + * The bit is cleared and the registers fall into one of the + * categories above. + */ + +static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg, + u32 checkbank) +{ + int bank_shift = pca953x_bank_shift(chip); + int bank = (reg & REG_ADDR_MASK) >> bank_shift; + int offset = reg & (BIT(bank_shift) - 1); + + /* Special PCAL extended register check. */ + if (reg & REG_ADDR_EXT) { + if (!(chip->driver_data & PCA_PCAL)) + return false; + bank += 8; + } + + /* Register is not in the matching bank. */ + if (!(BIT(bank) & checkbank)) + return false; + + /* Register is not within allowed range of bank. */ + if (offset >= NBANK(chip)) + return false; + + return true; +} + +static bool pca953x_readable_register(struct device *dev, unsigned int reg) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + u32 bank; + + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { + bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT | + PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG; + } else { + bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT | + PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG | + PCA957x_BANK_BUSHOLD; + } + + if (chip->driver_data & PCA_PCAL) { + bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_IRQ_MASK | + PCAL9xxx_BANK_IRQ_STAT; + } + + return pca953x_check_register(chip, reg, bank); +} + +static bool pca953x_writeable_register(struct device *dev, unsigned int reg) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + u32 bank; + + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { + bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY | + PCA953x_BANK_CONFIG; + } else { + bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY | + PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD; + } + + if (chip->driver_data & PCA_PCAL) + bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_IRQ_MASK; + + return pca953x_check_register(chip, reg, bank); +} + +static bool pca953x_volatile_register(struct device *dev, unsigned int reg) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + u32 bank; + + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) + bank = PCA953x_BANK_INPUT; + else + bank = PCA957x_BANK_INPUT; + + if (chip->driver_data & PCA_PCAL) + bank |= PCAL9xxx_BANK_IRQ_STAT; + + return pca953x_check_register(chip, reg, bank); +} + +const struct regmap_config pca953x_i2c_regmap = { + .reg_bits = 8, + .val_bits = 8, + + .readable_reg = pca953x_readable_register, + .writeable_reg = pca953x_writeable_register, + .volatile_reg = pca953x_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .max_register = 0x7f, +}; + static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off, bool write, bool addrinc) { @@ -193,8 +332,7 @@ static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, u8 regaddr = pca953x_recalc_addr(chip, reg, off, false, false); int ret; - ret = i2c_smbus_read_byte_data(chip->client, regaddr); - *val = ret; + ret = regmap_read(chip->regmap, regaddr, val); if (ret < 0) { dev_err(&chip->client->dev, "failed reading register\n"); return ret; @@ -209,7 +347,7 @@ static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, u8 regaddr = pca953x_recalc_addr(chip, reg, off, true, false); int ret; - ret = i2c_smbus_write_byte_data(chip->client, regaddr, val); + ret = regmap_write(chip->regmap, regaddr, val); if (ret < 0) { dev_err(&chip->client->dev, "failed writing register\n"); return ret; @@ -223,8 +361,7 @@ static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true); int ret; - ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, - NBANK(chip), val); + ret = regmap_bulk_write(chip->regmap, regaddr, val, NBANK(chip)); if (ret < 0) { dev_err(&chip->client->dev, "failed writing register\n"); return ret; @@ -238,8 +375,7 @@ static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true); int ret; - ret = i2c_smbus_read_i2c_block_data(chip->client, regaddr, - NBANK(chip), val); + ret = regmap_bulk_read(chip->regmap, regaddr, val, NBANK(chip)); if (ret < 0) { dev_err(&chip->client->dev, "failed reading register\n"); return ret; @@ -793,6 +929,14 @@ static int pca953x_probe(struct i2c_client *client, } } + i2c_set_clientdata(client, chip); + + chip->regmap = devm_regmap_init_i2c(client, &pca953x_i2c_regmap); + if (IS_ERR(chip->regmap)) { + ret = PTR_ERR(chip->regmap); + goto err_exit; + } + mutex_init(&chip->i2c_lock); /* * In case we have an i2c-mux controlled by a GPIO provided by an @@ -843,7 +987,6 @@ static int pca953x_probe(struct i2c_client *client, dev_warn(&client->dev, "setup failed, %d\n", ret); } - i2c_set_clientdata(client, chip); return 0; err_exit: From patchwork Sun Dec 2 19:35:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1006543 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; 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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id y185sm4016628wmg.34.2018.12.02.11.36.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:36:22 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH 11/14] gpio: pca953x: Zap ad-hoc reg_direction cache Date: Sun, 2 Dec 2018 20:35:50 +0100 Message-Id: <20181202193553.29704-11-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> References: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace the ad-hoc reg_direction direction register caching with generic regcache cache. This reduces code duplication. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 52 ++++++++++++++++++++----------------- 1 file changed, 28 insertions(+), 24 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 389fa891f342..a01e9f158439 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -142,7 +142,6 @@ static const struct pca953x_reg_config pca957x_regs = { struct pca953x_chip { unsigned gpio_start; u8 reg_output[MAX_BANK]; - u8 reg_direction[MAX_BANK]; struct mutex i2c_lock; struct regmap *regmap; @@ -387,18 +386,13 @@ static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) { struct pca953x_chip *chip = gpiochip_get_data(gc); - u8 reg_val; + u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off, + true, false); + u8 bit = BIT(off % BANK_SZ); int ret; mutex_lock(&chip->i2c_lock); - reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); - - ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off); - if (ret) - goto exit; - - chip->reg_direction[off / BANK_SZ] = reg_val; -exit: + ret = regmap_write_bits(chip->regmap, dirreg, bit, bit); mutex_unlock(&chip->i2c_lock); return ret; } @@ -407,6 +401,9 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, unsigned off, int val) { struct pca953x_chip *chip = gpiochip_get_data(gc); + u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off, + true, false); + u8 bit = BIT(off % BANK_SZ); u8 reg_val; int ret; @@ -426,12 +423,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, chip->reg_output[off / BANK_SZ] = reg_val; /* then direction */ - reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); - ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off); - if (ret) - goto exit; - - chip->reg_direction[off / BANK_SZ] = reg_val; + ret = regmap_write_bits(chip->regmap, dirreg, bit, 0); exit: mutex_unlock(&chip->i2c_lock); return ret; @@ -483,16 +475,19 @@ static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off) { struct pca953x_chip *chip = gpiochip_get_data(gc); + u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off, + true, false); + u8 bit = BIT(off % BANK_SZ); u32 reg_val; int ret; mutex_lock(&chip->i2c_lock); - ret = pca953x_read_single(chip, chip->regs->direction, ®_val, off); + ret = regmap_read(chip->regmap, dirreg, ®_val); mutex_unlock(&chip->i2c_lock); if (ret < 0) return ret; - return !!(reg_val & (1u << (off % BANK_SZ))); + return !!(reg_val & bit); } static void pca953x_gpio_set_multiple(struct gpio_chip *gc, @@ -580,6 +575,9 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d) u8 new_irqs; int level, i; u8 invert_irq_mask[MAX_BANK]; + u8 reg_direction[MAX_BANK]; + + regmap_read(chip->regmap, chip->regs->direction, reg_direction); if (chip->driver_data & PCA_PCAL) { /* Enable latch on interrupt-enabled inputs */ @@ -595,7 +593,7 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d) /* Look for any newly setup interrupt */ for (i = 0; i < NBANK(chip); i++) { new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i]; - new_irqs &= ~chip->reg_direction[i]; + new_irqs &= reg_direction[i]; while (new_irqs) { level = __ffs(new_irqs); @@ -660,6 +658,7 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) bool pending_seen = false; bool trigger_seen = false; u8 trigger[MAX_BANK]; + u8 reg_direction[MAX_BANK]; int ret, i; if (chip->driver_data & PCA_PCAL) { @@ -690,8 +689,9 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) return false; /* Remove output pins from the equation */ + regmap_read(chip->regmap, chip->regs->direction, reg_direction); for (i = 0; i < NBANK(chip); i++) - cur_stat[i] &= chip->reg_direction[i]; + cur_stat[i] &= reg_direction[i]; memcpy(old_stat, chip->irq_stat, NBANK(chip)); @@ -745,6 +745,7 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) { struct i2c_client *client = chip->client; + u8 reg_direction[MAX_BANK]; int ret, i; if (client->irq && irq_base != -1 @@ -759,8 +760,9 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, * interrupt. We have to rely on the previous read for * this purpose. */ + regmap_read(chip->regmap, chip->regs->direction, reg_direction); for (i = 0; i < NBANK(chip); i++) - chip->irq_stat[i] &= chip->reg_direction[i]; + chip->irq_stat[i] &= reg_direction[i]; mutex_init(&chip->irq_lock); ret = devm_request_threaded_irq(&client->dev, @@ -817,9 +819,9 @@ static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) if (ret) goto out; - ret = pca953x_read_regs(chip, chip->regs->direction, - chip->reg_direction); - if (ret) + ret = regcache_sync_region(chip->regmap, chip->regs->direction, + chip->regs->direction + NBANK(chip)); + if (ret != 0) goto out; /* set platform specific polarity inversion */ @@ -937,6 +939,8 @@ static int pca953x_probe(struct i2c_client *client, goto err_exit; } + regcache_mark_dirty(chip->regmap); + mutex_init(&chip->i2c_lock); /* * In case we have an i2c-mux controlled by a GPIO provided by an From patchwork Sun Dec 2 19:35:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1006544 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="KyOc/tqR"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 437JK8218Hz9s8r for ; Mon, 3 Dec 2018 06:36:28 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725808AbeLBTgb (ORCPT ); Sun, 2 Dec 2018 14:36:31 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:55097 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725782AbeLBTga (ORCPT ); Sun, 2 Dec 2018 14:36:30 -0500 Received: by mail-wm1-f68.google.com with SMTP id z18so3642543wmc.4; Sun, 02 Dec 2018 11:36:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FCvjdnEVbFecfI2qBYAM3SKbaBcUh56dNFKymTXwPGU=; b=KyOc/tqR171Wwy2C0DsKQoFgk3hTIitQq2LvYtMaQ2FqhMMFC6GQsoaD/TInZXvc/R dBgvfl8JYAbAkgWMpBgLKNvPgEmk/JVtNxsdVDAZpE6EFjJbo4v+2nl9B9EGq6MfxRio zLSE7ui/OBAL5dQ5UhpUtxEifU0V75fegqImd3mJqyS2kn2PgDXbIzUUNtY5Osvh3dZa jc3C5XggLAV6WQQSe6+Kw6WAyzIyDn2kjwn019aRUj64S4WNgYel0BboJ8ACTjy0qnlg jlGH16m418uqcAEVG6BtXBEzI4I8OjShbgzRm5l7QVNvxKE3uhjFzei0S+0zVhWGZcPX PSBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FCvjdnEVbFecfI2qBYAM3SKbaBcUh56dNFKymTXwPGU=; b=Lfz103KtgN/mD8fidUjyieouBvUN6gOwjyFzj+0AimAFRt2uHg4fQhfGoDNnddGXLj 5adbhdW41fDBZiUvXzDNy65WpR8yfWq94G1ggfB+CRRSH4ZtVM+hl0yCwNxgI/wv9mIN v6EnXXv+W2H5yDozXgehaNkdnfd3xXx+uhzHbLcAzGK7EBSczmY2e7x/m/UWYbJsgYqK vs4WpElH6X0l5SZ/jfxn5PyhBjpq89uRIF0aw8V/QZmlM80Kme0llqIE6wHCnihBcqUz /pnkBZKxzRnG/ze81Z20T/HKNsZHPsg0HzKGj5/ZM1Y4jRNFdizGpZF7osOyqlKt1o/U cDtA== X-Gm-Message-State: AA+aEWYAsUq0Fk7MRUXOV8F3qHt4Ddw/LW3ey/ppFOwRdqbNhMzNA0ul qdKbwK4yl8Yge/HVxKNxdtrMQbqp X-Google-Smtp-Source: AFSGD/VRrLpAjVFO9WvdpdipioO3Y1+H9Iz0VwZAmoyu9c9xPEXJ0OLLIzSM/6ZejlZAndCctKTqTQ== X-Received: by 2002:a1c:8bd0:: with SMTP id n199mr6083416wmd.104.1543779384851; Sun, 02 Dec 2018 11:36:24 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id y185sm4016628wmg.34.2018.12.02.11.36.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:36:23 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH 12/14] gpio: pca953x: Zap ad-hoc reg_output cache Date: Sun, 2 Dec 2018 20:35:51 +0100 Message-Id: <20181202193553.29704-12-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> References: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace the ad-hoc reg_output output register caching with generic regcache cache. Drop pca953x_write_single() which is no longer used. This reduces code duplication. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 65 +++++++++---------------------------- 1 file changed, 15 insertions(+), 50 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index a01e9f158439..8155f1dd667b 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -141,7 +141,6 @@ static const struct pca953x_reg_config pca957x_regs = { struct pca953x_chip { unsigned gpio_start; - u8 reg_output[MAX_BANK]; struct mutex i2c_lock; struct regmap *regmap; @@ -340,21 +339,6 @@ static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, return 0; } -static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, - int off) -{ - u8 regaddr = pca953x_recalc_addr(chip, reg, off, true, false); - int ret; - - ret = regmap_write(chip->regmap, regaddr, val); - if (ret < 0) { - dev_err(&chip->client->dev, "failed writing register\n"); - return ret; - } - - return 0; -} - static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true); @@ -403,25 +387,17 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, struct pca953x_chip *chip = gpiochip_get_data(gc); u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off, true, false); + u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off, + true, false); u8 bit = BIT(off % BANK_SZ); - u8 reg_val; int ret; mutex_lock(&chip->i2c_lock); /* set output level */ - if (val) - reg_val = chip->reg_output[off / BANK_SZ] - | (1u << (off % BANK_SZ)); - else - reg_val = chip->reg_output[off / BANK_SZ] - & ~(1u << (off % BANK_SZ)); - - ret = pca953x_write_single(chip, chip->regs->output, reg_val, off); + ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); if (ret) goto exit; - chip->reg_output[off / BANK_SZ] = reg_val; - /* then direction */ ret = regmap_write_bits(chip->regmap, dirreg, bit, 0); exit: @@ -452,23 +428,12 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) { struct pca953x_chip *chip = gpiochip_get_data(gc); - u8 reg_val; - int ret; + u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off, + true, false); + u8 bit = BIT(off % BANK_SZ); mutex_lock(&chip->i2c_lock); - if (val) - reg_val = chip->reg_output[off / BANK_SZ] - | (1u << (off % BANK_SZ)); - else - reg_val = chip->reg_output[off / BANK_SZ] - & ~(1u << (off % BANK_SZ)); - - ret = pca953x_write_single(chip, chip->regs->output, reg_val, off); - if (ret) - goto exit; - - chip->reg_output[off / BANK_SZ] = reg_val; -exit: + regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); mutex_unlock(&chip->i2c_lock); } @@ -500,7 +465,10 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, int ret; mutex_lock(&chip->i2c_lock); - memcpy(reg_val, chip->reg_output, NBANK(chip)); + ret = pca953x_read_regs(chip, chip->regs->output, reg_val); + if (ret) + goto exit; + for (bank = 0; bank < NBANK(chip); bank++) { bank_mask = mask[bank / sizeof(*mask)] >> ((bank % sizeof(*mask)) * 8); @@ -512,11 +480,7 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, } } - ret = pca953x_write_regs(chip, chip->regs->output, reg_val); - if (ret) - goto exit; - - memcpy(chip->reg_output, reg_val, NBANK(chip)); + pca953x_write_regs(chip, chip->regs->output, reg_val); exit: mutex_unlock(&chip->i2c_lock); } @@ -815,8 +779,9 @@ static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) int ret; u8 val[MAX_BANK]; - ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); - if (ret) + ret = regcache_sync_region(chip->regmap, chip->regs->output, + chip->regs->output + NBANK(chip)); + if (ret != 0) goto out; ret = regcache_sync_region(chip->regmap, chip->regs->direction, From patchwork Sun Dec 2 19:35:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1006545 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="jyuwbB68"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 437JK91LzWz9s47 for ; Mon, 3 Dec 2018 06:36:29 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725809AbeLBTgc (ORCPT ); Sun, 2 Dec 2018 14:36:32 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:33520 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725800AbeLBTgb (ORCPT ); Sun, 2 Dec 2018 14:36:31 -0500 Received: by mail-wm1-f68.google.com with SMTP id r24so5446003wmh.0; Sun, 02 Dec 2018 11:36:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DtsjrG9yANleneNTtSwf6E0TwSfYMC9PLG2YS+3l1vo=; b=jyuwbB68i0TjXT4O+QjZ3qmeqbHXoPBpNEPk6vDYySwz34w3E8G9GjMHShZQRQRdTQ nHH9tJW/ZCknfljeG1JP+d72BSErmRuaFFpnsfo7/xF4gsN94bwV33kUk5EdHTEyakKR XBzCZzawpwWpjh4sNeitDFjk7QuTzsjSt/adaHApPaQwVT/0fUnN/fvHsFOjLAuUg2u+ i52HuavEns4psRWnSOX4mbqPzCyZ4DRA0cSC8W35Inodvb5pS2jhRiiIci4f6WsPC6Hk RGRT1aiIYb0tsyJM6mSf5Q9cyS4DmSeuvqbXQbfRZavtYuQcSW8sPW1H9k/qyyPNXg0Y 4dRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DtsjrG9yANleneNTtSwf6E0TwSfYMC9PLG2YS+3l1vo=; b=THZMg4rlL+HzMhMY2iAwnHhpbL3cHxUwWh7zuIWRHPAIOEk1W7nS/ReOAiLtCCEIP/ CX2rUB4KU0iljxQtYm2b463ISOz28Gvt2dIr1H1tLCWCIjmyBaqoi+FzLS6yYGDgJQRs ympmDI1z24fRucXAnaOLrE9EULjH9hm55KWC9FSJ3UdgHDGwGcyZqs2L1CeiLzCAw0lS Ok0+vHujuEqeLIrnCR+3O2sf+KixUwcAyztYBn0mgawL50FGWVfgiA1ga4og7f4TsNxk Mya0z2SWI/K2YkWtetcuTM+Gj0P5F1dsDK0Mp3/WaBIDZ0WC+l/oiv+wN1IGthPFqhOk siDw== X-Gm-Message-State: AA+aEWZgp2oyhWVMfbymDjZh+rbGX8yg7T6qDNT0hHtnoZn8/W3sXEvm o5qj28oKNvkF1dAGlqv3XkMrmu7Y X-Google-Smtp-Source: AFSGD/V27onsOpmWUdadPjoCMJeXF4HpVXjBHac0XnkoonftHfqF9/WiGqFGJ+vhUpIg6qOYjRM7nQ== X-Received: by 2002:a1c:ad45:: with SMTP id w66mr5745369wme.60.1543779386240; Sun, 02 Dec 2018 11:36:26 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id y185sm4016628wmg.34.2018.12.02.11.36.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:36:25 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH 13/14] gpio: pca953x: Zap single use of pca953x_read_single() Date: Sun, 2 Dec 2018 20:35:52 +0100 Message-Id: <20181202193553.29704-13-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> References: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Drop pca953x_write_single() which is used in one place. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 22 +++++----------------- 1 file changed, 5 insertions(+), 17 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 8155f1dd667b..7c0122fac383 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -324,21 +324,6 @@ static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off, return regaddr; } -static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, - int off) -{ - u8 regaddr = pca953x_recalc_addr(chip, reg, off, false, false); - int ret; - - ret = regmap_read(chip->regmap, regaddr, val); - if (ret < 0) { - dev_err(&chip->client->dev, "failed reading register\n"); - return ret; - } - - return 0; -} - static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true); @@ -408,11 +393,14 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) { struct pca953x_chip *chip = gpiochip_get_data(gc); + u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off, + true, false); + u8 bit = BIT(off % BANK_SZ); u32 reg_val; int ret; mutex_lock(&chip->i2c_lock); - ret = pca953x_read_single(chip, chip->regs->input, ®_val, off); + ret = regmap_read(chip->regmap, inreg, ®_val); mutex_unlock(&chip->i2c_lock); if (ret < 0) { /* NOTE: diagnostic already emitted; that's all we should @@ -422,7 +410,7 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) return 0; } - return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0; + return !!(reg_val & bit); } static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) From patchwork Sun Dec 2 19:35:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1006546 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="G6gbb4ps"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 437JKB4X8Rz9s47 for ; Mon, 3 Dec 2018 06:36:30 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725810AbeLBTgd (ORCPT ); Sun, 2 Dec 2018 14:36:33 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:40090 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725616AbeLBTgd (ORCPT ); Sun, 2 Dec 2018 14:36:33 -0500 Received: by mail-wm1-f68.google.com with SMTP id q26so3583454wmf.5; Sun, 02 Dec 2018 11:36:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fjwrSxUeoVDo3A1Y98n1euA4k8u+X/NSJARYqIUm6JI=; b=G6gbb4psXOPo3+B1We7xjLnOJWNv705Fjv0K0I+bGrvzkMS0b3LCBe02a980544fBQ NU9LrhrHbD6afCLXn2+Wdzg4XGF6ua0dhvGtPrYm+J9CB+5vJDit69s+s+ij2yCm3yZ2 MDCS7CVd7f2dD3u0DtusWB0ElOdjr11a3YstXskodWsMfM+DtN/8mFx/8J8MpU/R7A+N YYBIpNdJ742UE1HLgpjpd+KILRBlmfIYJvjlfO/LfubUYLwlbPlu34u42a3gVQhMeHnG dC9Mmmhtc2hFGeMDlaZ+AsC5eMOo5q1d55OspvEdTd9fZwLssSirWnlbkR9riQRA415F qSNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fjwrSxUeoVDo3A1Y98n1euA4k8u+X/NSJARYqIUm6JI=; b=by067R6b5MaX6HaVCef58rxBRpBm2Fz7r1SLuvfNxwHqW/ztJiFEFDZENlDxSxqoWa vkkRSvWf4JsI4FHbUFfPoceW3hN9ooBhLDTQFxO839he/63NuycbBm4H9FigCc1tFY64 UL3aLChbWjJaEP6pzPlQzN/B2Zl1W4DFMTwqmWY+2YWFdK6+SJBQCiGxEg9zaxwtYah1 xQLuy0OBjYQoT0ZleoUM+xz+r7bCb9UmSjH8j1zO2qxv9K9+SRS1vLu/Oc2E2X7Y75dC BXjPxoQeT5WQqI/6ZseCMhhHJzvTsXU6oFNZyh4tdP1y5YJUI3vK3yktmNhHHL87zNKs 9VXQ== X-Gm-Message-State: AA+aEWY2HbHmQx7SVRMaKi7qCGCkeGCP5rDui7sWWyL7YJsVIJhS4jkK CG8c3DHBrVsENOIs7SrCZ5Hkoiml X-Google-Smtp-Source: AFSGD/XdUngfS+L8Y3Gnb5AWt3RORnzFdUR7BSURnL95DK7V2CH/NLbUN5MqOAB3nfr2ZFvKdTUAaA== X-Received: by 2002:a1c:650b:: with SMTP id z11mr5830760wmb.23.1543779387470; Sun, 02 Dec 2018 11:36:27 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id y185sm4016628wmg.34.2018.12.02.11.36.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:36:26 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH 14/14] gpio: pca953x: Restore registers after suspend/resume cycle Date: Sun, 2 Dec 2018 20:35:53 +0100 Message-Id: <20181202193553.29704-14-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> References: <20181202193553.29704-1-marek.vasut+renesas@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org It is possible that the PCA953x is powered down during suspend. Use regmap cache to assure the registers in the PCA953x are in line with the driver state after resume. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 92 +++++++++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 7c0122fac383..e2c2e97b7321 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -972,6 +972,95 @@ static int pca953x_remove(struct i2c_client *client) return ret; } +#ifdef CONFIG_PM_SLEEP +static int pca953x_regcache_sync(struct device *dev) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + int ret; + + /* + * The ordering between direction and output is important, + * sync these registers first and only then sync the rest. + */ + ret = regcache_sync_region(chip->regmap, chip->regs->direction, + chip->regs->direction + NBANK(chip)); + if (ret != 0) { + dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret); + return ret; + } + + ret = regcache_sync_region(chip->regmap, chip->regs->output, + chip->regs->output + NBANK(chip)); + if (ret != 0) { + dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret); + return ret; + } + +#ifdef CONFIG_GPIO_PCA953X_IRQ + if (chip->driver_data & PCA_PCAL) { + pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); + pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask); + + ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH, + PCAL953X_IN_LATCH + NBANK(chip)); + if (ret != 0) { + dev_err(dev, "Failed to sync INT latch registers: %d\n", + ret); + return ret; + } + + ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK, + PCAL953X_INT_MASK + NBANK(chip)); + if (ret != 0) { + dev_err(dev, "Failed to sync INT mask registers: %d\n", + ret); + return ret; + } + } +#endif + + return 0; +} + +static int pca953x_suspend(struct device *dev) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + + regcache_mark_dirty(chip->regmap); + pca953x_regcache_sync(dev); + regcache_cache_only(chip->regmap, true); + + regulator_disable(chip->regulator); + + return 0; +} + +static int pca953x_resume(struct device *dev) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + int ret; + + ret = regulator_enable(chip->regulator); + if (ret != 0) { + dev_err(dev, "Failed to enable regulator: %d\n", ret); + return 0; + } + + regcache_cache_only(chip->regmap, false); + ret = pca953x_regcache_sync(dev); + if (ret) + return ret; + + ret = regcache_sync(chip->regmap); + if (ret != 0) { + dev_err(dev, "Failed to restore register map: %d\n", ret); + return ret; + } + + return 0; +} +#endif + /* convenience to stop overlong match-table lines */ #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int) #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int) @@ -1015,9 +1104,12 @@ static const struct of_device_id pca953x_dt_ids[] = { MODULE_DEVICE_TABLE(of, pca953x_dt_ids); +static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume); + static struct i2c_driver pca953x_driver = { .driver = { .name = "pca953x", + .pm = &pca953x_pm_ops, .of_match_table = pca953x_dt_ids, .acpi_match_table = ACPI_PTR(pca953x_acpi_ids), },