From patchwork Thu Nov 22 23:47:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vicente Bergas X-Patchwork-Id: 1002184 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=flashrom.org (client-ip=80.81.252.135; helo=mail.coreboot.org; envelope-from=flashrom-bounces@flashrom.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="BJEHQE6c"; dkim-atps=neutral Received: from mail.coreboot.org (mail.coreboot.org [80.81.252.135]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 431T8s47Lwz9s7T for ; Fri, 23 Nov 2018 18:54:04 +1100 (AEDT) Received: from [127.0.0.1] (helo=ra.coreboot.org) by mail.coreboot.org with esmtp (Exim 4.88) (envelope-from ) id 1gQ6Fy-0004dN-8n; Fri, 23 Nov 2018 08:52:06 +0100 Received: from mail-wr1-f68.google.com ([209.85.221.68]) by mail.coreboot.org with esmtps (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.88) (envelope-from ) id 1gPygL-0006b2-M4 for flashrom@flashrom.org; Fri, 23 Nov 2018 00:46:56 +0100 Received: by mail-wr1-f68.google.com with SMTP id p4so10691127wrt.7 for ; Thu, 22 Nov 2018 15:47:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=6a3Y6CPmxBn1SLXghAQtQCFKxPYpz/og0qXC3CEIjhE=; b=BJEHQE6cX8chVGyE2aRiJUVPBCZ+ztlDjGOuTJiFQEYpJL+H35ffc+uM0ySjyWNTND BsnjAHutS+pP/G4uYPB0U8hNgCehC8G1zZ8KT/gsshokoKzQ5yPACn3ov/KYHADUCmty jf8Gnv4ViExpzsTS3xhkbugEcTI2dqMNA1EZe/lhZjMfrtWU1o5iPfDK1nk+xiCVjyhm 3Bwkpn7Sw/fufpxhwqC+JHO4WY//MVesuistAZ3orREVp/gWaHv3Vj9n17XYb7g3d6v+ 8TWbbhl9xJP61SJ5Pp9DxfG9sJHaJerFs58tPA1cFKbbefsyZPzldnS68KRIuCQ+nXsC Fl0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=6a3Y6CPmxBn1SLXghAQtQCFKxPYpz/og0qXC3CEIjhE=; b=LN6BcXDzVoLHQIYNrMMNt7Y1Ge4C0Ct/lJtqEgg9LuoqDdrc23qM6JIFscmsOGSHEu Dhj9wgMB3TCiGR2a7un8/E4KJrymf9vs8iwAHeVbvE8uclc5hzRPAnqrVjquqNfIRq0Q f+dPpCk512l5zxRLYVeC+E7hfHGPZuMIAQaSA1u29roPyT+TSGJNOJdrCq4lgzPi/GXD S+0gNb5NbGgY67xPccu/a7o0Lym+inX2a4FflVhCVVrQtosomVoHxhptTUW1FdudSSjg U6v9KCSe3608aLXmqT3UVsVnkwMVyomEB3LHQ5F8yGlxzME6mclMHYi54KrGYoY58/9w x9+g== X-Gm-Message-State: AA+aEWa9G1s5Hmcv/E67shwAGXEq8VnPZfldpFhWlKeabUPtFVkXoW+t uG/EMtqczEDufxU6mkKVTkSST4Ako5I= X-Google-Smtp-Source: AFSGD/X+a5JIF6+D40ltpwas91aDCdCgMRRw8nu9UtdczHsu4Qnc7P2uoo/5qxKczLozg1nv40WmQg== X-Received: by 2002:a05:6000:1287:: with SMTP id f7mr12231727wrx.302.1542930441495; Thu, 22 Nov 2018 15:47:21 -0800 (PST) Received: from silver.localdomain ([92.59.185.54]) by smtp.gmail.com with ESMTPSA id l3sm27889778wru.36.2018.11.22.15.47.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 22 Nov 2018 15:47:20 -0800 (PST) From: Vicente Bergas To: flashrom@flashrom.org Date: Fri, 23 Nov 2018 00:47:05 +0100 Message-Id: <20181122234705.30290-1-vicencb@gmail.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 X-Spam-Score: -3.9 (---) X-Mailman-Approved-At: Fri, 23 Nov 2018 08:52:04 +0100 Subject: [flashrom] [PATCH] Do not abuse cs_bit X-BeenThere: flashrom@flashrom.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: flashrom discussion and development mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vicente Bergas Errors-To: flashrom-bounces@flashrom.org Sender: "flashrom" X-Duff: Orig. Duff, Duff Lite, Duff Dry, Duff Dark, Raspberry Duff, Lady Duff, Red Duff, Tartar Control Duff "cs_bit[s]" variable stores the bit location for Chip Select, as implied by the name. A new variable "cfg" is added for static configuration bits, like Output Enables. If outputs are disabled during operation, then the result will depend on the target having proper pull-up resistors, which is not always guaranteed. Signed-off-by: Vicente Bergas --- ft2232_spi.c | 33 +++++++++++++++------------------ 1 file changed, 15 insertions(+), 18 deletions(-) diff --git a/ft2232_spi.c b/ft2232_spi.c index 95584aa..fe7fcf8 100644 --- a/ft2232_spi.c +++ b/ft2232_spi.c @@ -84,18 +84,19 @@ const struct dev_entry devs_ft2232spi[] = { #define BITMODE_BITBANG_NORMAL 1 #define BITMODE_BITBANG_SPI 2 -/* The variables cs_bits and pindir store the values for the "set data bits low byte" MPSSE command that +/* The variables cs_bit, cfg and pindir store the values for the "set data bits low byte" MPSSE command that * sets the initial state and the direction of the I/O pins. The pin offsets are as follows: * SCK is bit 0. * DO is bit 1. * DI is bit 2. - * CS is bit 3. + * CS is at cs_bit. Default is bit 3. * * The default values (set below) are used for most devices: * value: 0x08 CS=high, DI=low, DO=low, SK=low * dir: 0x0b CS=output, DI=input, DO=output, SK=output */ -static uint8_t cs_bits = 0x08; +static uint8_t cs_bit = 0x08; +static uint8_t cfg = 0x00; static uint8_t pindir = 0x0b; static struct ftdi_context ftdic_context; @@ -209,10 +210,9 @@ int ft2232_spi_init(void) ft2232_type = AMONTEC_JTAGKEY_PID; channel_count = 2; /* JTAGkey(2) needs to enable its output via Bit4 / GPIOL0 - * value: 0x18 OE=high, CS=high, DI=low, DO=low, SK=low - * dir: 0x1b OE=output, CS=output, DI=input, DO=output, SK=output */ - cs_bits = 0x18; - pindir = 0x1b; + * value: 0x08 #OE=low, CS=high, DI=low, DO=low, SK=low + * dir: 0x1b #OE=output, CS=output, DI=input, DO=output, SK=output */ + pindir |= 0x10; } else if (!strcasecmp(arg, "picotap")) { ft2232_vid = GOEPEL_VID; ft2232_type = GOEPEL_PICOTAP_PID; @@ -229,8 +229,7 @@ int ft2232_spi_init(void) /* In its default configuration it is a jtagkey clone */ ft2232_type = FTDI_FT2232H_PID; channel_count = 2; - cs_bits = 0x18; - pindir = 0x1b; + pindir |= 0x10; } else if (!strcasecmp(arg, "openmoko")) { ft2232_vid = FIC_VID; ft2232_type = OPENMOKO_DBGBOARD_PID; @@ -242,8 +241,7 @@ int ft2232_spi_init(void) /* arm-usb-ocd(-h) has an output buffer that needs to be enabled by pulling ADBUS4 low. * value: 0x08 #OE=low, CS=high, DI=low, DO=low, SK=low * dir: 0x1b #OE=output, CS=output, DI=input, DO=output, SK=output */ - cs_bits = 0x08; - pindir = 0x1b; + pindir |= 0x10; } else if (!strcasecmp(arg, "arm-usb-tiny")) { ft2232_vid = OLIMEX_VID; ft2232_type = OLIMEX_ARM_TINY_PID; @@ -253,8 +251,7 @@ int ft2232_spi_init(void) ft2232_type = OLIMEX_ARM_OCD_H_PID; channel_count = 2; /* See arm-usb-ocd */ - cs_bits = 0x08; - pindir = 0x1b; + pindir |= 0x10; } else if (!strcasecmp(arg, "arm-usb-tiny-h")) { ft2232_vid = OLIMEX_VID; ft2232_type = OLIMEX_ARM_TINY_H_PID; @@ -338,8 +335,8 @@ int ft2232_spi_init(void) return -2; } else { unsigned int pin = temp + 4; - cs_bits |= 1 << pin; - pindir |= 1 << pin; + cs_bit = 1 << pin; + pindir = (pindir & ~0x08) | cs_bit; } } free(arg); @@ -425,7 +422,7 @@ int ft2232_spi_init(void) msg_pdbg("Set data bits\n"); buf[0] = SET_BITS_LOW; - buf[1] = cs_bits; + buf[1] = cfg | cs_bit; buf[2] = pindir; if (send_buf(ftdic, buf, 3)) { ret = -8; @@ -480,7 +477,7 @@ static int ft2232_spi_send_command(struct flashctx *flash, */ msg_pspew("Assert CS#\n"); buf[i++] = SET_BITS_LOW; - buf[i++] = 0 & ~cs_bits; /* assertive */ + buf[i++] = cfg & ~cs_bit; buf[i++] = pindir; if (writecnt) { @@ -521,7 +518,7 @@ static int ft2232_spi_send_command(struct flashctx *flash, msg_pspew("De-assert CS#\n"); buf[i++] = SET_BITS_LOW; - buf[i++] = cs_bits; + buf[i++] = cfg | cs_bit; buf[i++] = pindir; ret = send_buf(ftdic, buf, i); failed |= ret;