From patchwork Thu Nov 22 21:27:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1002029 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-490762-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="E0pjViPO"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="EWoe6m/j"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 431CGK08Hmz9s47 for ; Fri, 23 Nov 2018 08:27:51 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; q= dns; s=default; b=MtBjxxregeXVPMQw2X2WO+HzEsaIt9VUTDh6gm/adACZ0n yhdscM1eMfBdM19drGDb052p6dJc5zH3zeh+StuhWhIZynVqoV0dslXD5EzVCBVY jhuZ9CDlPXfvNJAtNEqiGKfViIOAMgn3fzCPE8S7hlGLNcbMy016C1zXZHmok= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; s= default; bh=enDUtaiA519d4/eQ7LsXWTJNmas=; b=E0pjViPOjsFlnic+9W2G p0cRYkFp2RVLNC0A2JIlQm3sEf0Vb9w88vEYocB5Y5bvXCAFZcGk2NpqDu96Lw4F pdLI97UdvmM2Mgl5SMcOl08UTfnCiG3O9V63naqZhlJxQZmJQ7VnNe0LP9+eylYD 7JQScfY1XcfC4Pry33jpJw0= Received: (qmail 47677 invoked by alias); 22 Nov 2018 21:27:45 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 47664 invoked by uid 89); 22 Nov 2018 21:27:44 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-12.0 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=entity, Hx-languages-length:891, const_rtx X-HELO: mail-it1-f178.google.com Received: from mail-it1-f178.google.com (HELO mail-it1-f178.google.com) (209.85.166.178) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 22 Nov 2018 21:27:43 +0000 Received: by mail-it1-f178.google.com with SMTP id h65so15503556ith.3 for ; Thu, 22 Nov 2018 13:27:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:from:date:message-id:subject:to; bh=ij+p5XzsXPhRJcTpw5wmwwu/b7FfmtcfW/ISz+4wUJU=; b=EWoe6m/jo94J1IKld7L7Q/CP8qzlsgMcdNfQgBdbr7JiBv3yJNWAZWVMt5SaC1diCe dEdhyaA7CWAYPyYCPgwT+v1rG66lQMB2m+sLNCNM/rURMvAKVKxYAU4KzKsQfoNpGwaF RSyI5rij98nE0Z331vDWsOAe3jK1IL8fjH6LBkoJKQF8/H4Dnm1WAc1fVQNZVL1GmJHs j1zamM547OcR/1rFxJWrXL8N/gV8Xw6ksNgYP9awKmDoF1Q9UyJ4m4tkahL8EZfPryYA XZFDkYgqpqH3P3T9XhDMkKY7/69CZYlWnTrQozdp9fZREvDVEArDjsqlW9HPl1YI4qev Ww0A== MIME-Version: 1.0 From: Uros Bizjak Date: Thu, 22 Nov 2018 22:27:29 +0100 Message-ID: Subject: [PATCH, i386]: Simplify ix86_check_avx_upper_register To: "gcc-patches@gcc.gnu.org" 2018-11-22 Uros Bizjak * config/i386/i386.c (ix86_check_avx_upper_register): Return true for all SSE registers with mode bitsize > 128. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Committed to mainline SVN. Uros. Index: config/i386/i386.c =================================================================== --- config/i386/i386.c (revision 266382) +++ config/i386/i386.c (working copy) @@ -18856,12 +18856,7 @@ static bool ix86_check_avx_upper_register (const_rtx exp) { - if (SUBREG_P (exp)) - exp = SUBREG_REG (exp); - - return (REG_P (exp) - && (VALID_AVX256_REG_OR_OI_MODE (GET_MODE (exp)) - || VALID_AVX512F_REG_OR_XI_MODE (GET_MODE (exp)))); + return SSE_REG_P (exp) && GET_MODE_BITSIZE (GET_MODE (exp)) > 128; } /* Return needed mode for entity in optimize_mode_switching pass. */