From patchwork Thu Oct 12 02:38:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunsheng Lin X-Patchwork-Id: 824646 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yCDQn2nFQz9sRq for ; Thu, 12 Oct 2017 12:53:37 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754644AbdJLBx0 (ORCPT ); Wed, 11 Oct 2017 21:53:26 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:7978 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752620AbdJLBxU (ORCPT ); Wed, 11 Oct 2017 21:53:20 -0400 Received: from 172.30.72.60 (EHLO DGGEMS407-HUB.china.huawei.com) ([172.30.72.60]) by dggrg04-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id DIW89080; Thu, 12 Oct 2017 09:53:17 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.301.0; Thu, 12 Oct 2017 09:51:27 +0800 From: Yunsheng Lin To: CC: , , , , , , , , , , , , Subject: [PATCH net-next 1/2] mqprio: Add a new hardware offload type in mqprio Date: Thu, 12 Oct 2017 10:38:31 +0800 Message-ID: <1507775912-22402-2-git-send-email-linyunsheng@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1507775912-22402-1-git-send-email-linyunsheng@huawei.com> References: <1507775912-22402-1-git-send-email-linyunsheng@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090204.59DECB0D.0065, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 86e7fcb386f6967373a0cc74131e12ca Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org When a driver supports both dcb and hardware offloaded mqprio, and user is running mqprio and dcb tool concurrently, the configuration set by each tool may be conflicted with each other because the dcb and mqprio may be using the same hardwere offload component and share the tc system in the network stack. This patch adds a new offload type to indicate that the underlying driver offload prio mapping as part of DCB. If the driver would be incapable of that it would refuse the offload. User would then have to explicitly request that qdisc offload. Signed-off-by: Yunsheng Lin Suggested-by: Yuval Mintz --- include/uapi/linux/pkt_sched.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/uapi/linux/pkt_sched.h b/include/uapi/linux/pkt_sched.h index 099bf55..8016027 100644 --- a/include/uapi/linux/pkt_sched.h +++ b/include/uapi/linux/pkt_sched.h @@ -620,6 +620,7 @@ struct tc_drr_stats { enum { TC_MQPRIO_HW_OFFLOAD_NONE, /* no offload requested */ TC_MQPRIO_HW_OFFLOAD_TCS, /* offload TCs, no queue counts */ + TC_MQPRIO_HW_OFFLOAD_DCB, /* offload shared by DCB */ __TC_MQPRIO_HW_OFFLOAD_MAX }; From patchwork Thu Oct 12 02:38:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunsheng Lin X-Patchwork-Id: 824647 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yCDR5122cz9sRq for ; Thu, 12 Oct 2017 12:53:53 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754188AbdJLBxZ (ORCPT ); Wed, 11 Oct 2017 21:53:25 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:7976 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752065AbdJLBxU (ORCPT ); Wed, 11 Oct 2017 21:53:20 -0400 Received: from 172.30.72.60 (EHLO DGGEMS407-HUB.china.huawei.com) ([172.30.72.60]) by dggrg04-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id DIW89083; Thu, 12 Oct 2017 09:53:17 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.301.0; Thu, 12 Oct 2017 09:51:28 +0800 From: Yunsheng Lin To: CC: , , , , , , , , , , , , Subject: [PATCH net-next 2/2] net: hns3: Add mqprio hardware offload support in hns3 driver Date: Thu, 12 Oct 2017 10:38:32 +0800 Message-ID: <1507775912-22402-3-git-send-email-linyunsheng@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1507775912-22402-1-git-send-email-linyunsheng@huawei.com> References: <1507775912-22402-1-git-send-email-linyunsheng@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090204.59DECB0D.00AA, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: bcf64d171528928ad7da6ce18b6b304f Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org When using tc qdisc, dcb_ops->setup_tc is used to tell hclge_dcb module to do the tm related setup. Only TC_MQPRIO_HW_OFFLOAD_DCB offload type is supported. Signed-off-by: Yunsheng Lin --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c | 23 +++++++++++ .../net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c | 46 ++++++++++++++-------- 3 files changed, 54 insertions(+), 16 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 575f50d..3acd8db 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -381,6 +381,7 @@ struct hnae3_dcb_ops { u8 (*setdcbx)(struct hnae3_handle *, u8); int (*map_update)(struct hnae3_handle *); + int (*setup_tc)(struct hnae3_handle *, u8, u8 *); }; struct hnae3_ae_algo { diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c index 1b30a6f..7ec9484 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c @@ -276,6 +276,28 @@ static u8 hclge_setdcbx(struct hnae3_handle *h, u8 mode) return 0; } +static int hclge_setup_tc(struct hnae3_handle *h, u8 tc, u8 *prio_tc) +{ + struct hclge_vport *vport = hclge_get_vport(h); + struct hclge_dev *hdev = vport->back; + int ret; + + if (tc > hdev->tc_max) { + dev_err(&hdev->pdev->dev, + "setup tc failed, tc(%u) > tc_max(%u)\n", + tc, hdev->tc_max); + return -EINVAL; + } + + hclge_tm_schd_info_update(hdev, tc); + + ret = hclge_tm_prio_tc_info_update(hdev, prio_tc); + if (ret) + return ret; + + return hclge_tm_init_hw(hdev); +} + static const struct hnae3_dcb_ops hns3_dcb_ops = { .ieee_getets = hclge_ieee_getets, .ieee_setets = hclge_ieee_setets, @@ -284,6 +306,7 @@ static u8 hclge_setdcbx(struct hnae3_handle *h, u8 mode) .getdcbx = hclge_getdcbx, .setdcbx = hclge_setdcbx, .map_update = hclge_map_update, + .setup_tc = hclge_setup_tc, }; void hclge_dcb_ops_set(struct hclge_dev *hdev) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c index ba550c1..79d8d6b 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c @@ -1186,42 +1186,56 @@ static void hns3_nic_udp_tunnel_del(struct net_device *netdev, } } -static int hns3_setup_tc(struct net_device *netdev, u8 tc) +static int hns3_setup_tc(struct net_device *netdev, u8 tc, u8 *prio_tc) { struct hnae3_handle *h = hns3_get_handle(netdev); struct hnae3_knic_private_info *kinfo = &h->kinfo; + bool if_running; unsigned int i; int ret; if (tc > HNAE3_MAX_TC) return -EINVAL; - if (kinfo->num_tc == tc) - return 0; - if (!netdev) return -EINVAL; - if (!tc) { - netdev_reset_tc(netdev); - return 0; + if_running = netif_running(netdev); + if (if_running) { + hns3_nic_net_stop(netdev); + msleep(100); } - /* Set num_tc for netdev */ - ret = netdev_set_num_tc(netdev, tc); + ret = (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ? + kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP; if (ret) - return ret; + goto out; + + if (tc <= 1) { + netdev_reset_tc(netdev); + } else { + ret = netdev_set_num_tc(netdev, tc); + if (ret) + goto out; + + for (i = 0; i < HNAE3_MAX_TC; i++) { + if (!kinfo->tc_info[i].enable) + continue; - /* Set per TC queues for the VSI */ - for (i = 0; i < HNAE3_MAX_TC; i++) { - if (kinfo->tc_info[i].enable) netdev_set_tc_queue(netdev, kinfo->tc_info[i].tc, kinfo->tc_info[i].tqp_count, kinfo->tc_info[i].tqp_offset); + } } - return 0; + ret = hns3_nic_set_real_num_queue(netdev); + +out: + if (if_running) + hns3_nic_net_open(netdev); + + return ret; } static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type, @@ -1229,10 +1243,10 @@ static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type, { struct tc_mqprio_qopt *mqprio = type_data; - if (type != TC_SETUP_MQPRIO) + if (type != TC_SETUP_MQPRIO || mqprio->hw != TC_MQPRIO_HW_OFFLOAD_DCB) return -EOPNOTSUPP; - return hns3_setup_tc(dev, mqprio->num_tc); + return hns3_setup_tc(dev, mqprio->num_tc, mqprio->prio_tc_map); } static int hns3_vlan_rx_add_vid(struct net_device *netdev,