From patchwork Wed Oct 11 23:48:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Segher Boessenkool X-Patchwork-Id: 824611 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-463991-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="oEu24W9J"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yC9ft0vx7z9sRq for ; Thu, 12 Oct 2017 10:48:52 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id; q=dns; s=default; b=tSwycS4bB6QA 4P4Wt9alakGGA8X+Bb7+sV+uTDU+4Yp7Bdo5njJ7/+4ibg8QBotz35l+thKtaRhc Yq+KtV+92MMR1R9bSy3DEhSv/iYBzRRR+fJ25G/n3718hZDC3oG1C6hAIxgGe33X GtWYnO8ot2JSSN1bfDgHwVoyZAGZYf4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id; s=default; bh=PWiZe7iX2C5u0d22iR RLLLIR9HY=; b=oEu24W9J2SAvFca7Ko3vkdy9xq/b0tYqHEs9r9pKb8rMVUi/dM Vo9zVJD+N6i7N9Sg5kOE+kqq1rmzBZzNXHS1dXCUUDWIHv1A1qNSrmOjIfux2Csz Q80vHFyaexFFkxuEAVSw25/77itIMWvdFDRJltO2kNWJ8b/sX5Zqpmdn8= Received: (qmail 47501 invoked by alias); 11 Oct 2017 23:48:44 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 47467 invoked by uid 89); 11 Oct 2017 23:48:44 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-24.2 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=ob X-HELO: gcc1-power7.osuosl.org Received: from gcc1-power7.osuosl.org (HELO gcc1-power7.osuosl.org) (140.211.15.137) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 11 Oct 2017 23:48:43 +0000 Received: by gcc1-power7.osuosl.org (Postfix, from userid 10019) id A4D5812402DD; Wed, 11 Oct 2017 23:48:41 +0000 (UTC) From: Segher Boessenkool To: gcc-patches@gcc.gnu.org Cc: dje.gcc@gmail.com, Segher Boessenkool Subject: [PATCH] rs6000: Remove TARGET_ISEL64 Date: Wed, 11 Oct 2017 23:48:38 +0000 Message-Id: X-IsSubscribed: yes TARGET_ISEL64 just means TARGET_ISEL && TARGET_POWERPC64. Since everywhere it is used uses :GPR already, we can just as well use TARGET_ISEL always. Tested as usual, committing. Segher 2017-10-11 Segher Boessenkool * config/rs6000/rs6000.h (TARGET_ISEL64): Delete. * config/rs6000/rs6000.md (sel): Delete mode attribute. (movcc, isel_signed_, isel_unsigned_, *isel_reversed_signed_, *isel_reversed_unsigned_): Use TARGET_ISEL instead of TARGET_ISEL. --- gcc/config/rs6000/rs6000.h | 2 -- gcc/config/rs6000/rs6000.md | 13 +++++-------- 2 files changed, 5 insertions(+), 10 deletions(-) diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 21e536b..5a5244a 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -565,8 +565,6 @@ extern int rs6000_vector_align[]; #define TARGET_ALTIVEC_ABI rs6000_altivec_abi #define TARGET_LDBRX (TARGET_POPCNTD || rs6000_cpu == PROCESSOR_CELL) -#define TARGET_ISEL64 (TARGET_ISEL && TARGET_POWERPC64) - /* ISA 2.01 allowed FCFID to be done in 32-bit, previously it was 64-bit only. Enable 32-bit fcfid's on any of the switches for newer ISA machines or XILINX. */ diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 7e1566a..611aa9d 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -578,9 +578,6 @@ (define_mode_attr bits [(QI "8") (HI "16") (SI "32") (DI "64")]) ; DImode bits (define_mode_attr dbits [(QI "56") (HI "48") (SI "32")]) -;; ISEL/ISEL64 target selection -(define_mode_attr sel [(SI "") (DI "64")]) - ;; Bitmask for shift instructions (define_mode_attr hH [(SI "h") (DI "H")]) @@ -4915,7 +4912,7 @@ (define_expand "movcc" (if_then_else:GPR (match_operand 1 "comparison_operator" "") (match_operand:GPR 2 "gpc_reg_operand" "") (match_operand:GPR 3 "gpc_reg_operand" "")))] - "TARGET_ISEL" + "TARGET_ISEL" " { if (rs6000_emit_cmove (operands[0], operands[1], operands[2], operands[3])) @@ -4940,7 +4937,7 @@ (define_insn "isel_signed_" (const_int 0)]) (match_operand:GPR 2 "reg_or_zero_operand" "O,b") (match_operand:GPR 3 "gpc_reg_operand" "r,r")))] - "TARGET_ISEL" + "TARGET_ISEL" "isel %0,%2,%3,%j1" [(set_attr "type" "isel")]) @@ -4952,7 +4949,7 @@ (define_insn "isel_unsigned_" (const_int 0)]) (match_operand:GPR 2 "reg_or_zero_operand" "O,b") (match_operand:GPR 3 "gpc_reg_operand" "r,r")))] - "TARGET_ISEL" + "TARGET_ISEL" "isel %0,%2,%3,%j1" [(set_attr "type" "isel")]) @@ -4968,7 +4965,7 @@ (define_insn "*isel_reversed_signed_" (const_int 0)]) (match_operand:GPR 2 "gpc_reg_operand" "r,r") (match_operand:GPR 3 "reg_or_zero_operand" "O,b")))] - "TARGET_ISEL" + "TARGET_ISEL" { PUT_CODE (operands[1], reverse_condition (GET_CODE (operands[1]))); return "isel %0,%3,%2,%j1"; @@ -4983,7 +4980,7 @@ (define_insn "*isel_reversed_unsigned_" (const_int 0)]) (match_operand:GPR 2 "gpc_reg_operand" "r,r") (match_operand:GPR 3 "reg_or_zero_operand" "O,b")))] - "TARGET_ISEL" + "TARGET_ISEL" { PUT_CODE (operands[1], reverse_condition (GET_CODE (operands[1]))); return "isel %0,%3,%2,%j1";