From patchwork Tue Nov 20 12:47:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000445 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="RotQ7YX4"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zlrx4x98z9s7T for ; Tue, 20 Nov 2018 23:49:21 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 4FE52C220D0; Tue, 20 Nov 2018 12:49:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 75829C2208E; Tue, 20 Nov 2018 12:48:52 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 99C82C21FF3; Tue, 20 Nov 2018 12:48:40 +0000 (UTC) Received: from mail-pg1-f195.google.com (mail-pg1-f195.google.com [209.85.215.195]) by lists.denx.de (Postfix) with ESMTPS id 9A52AC21FF3 for ; Tue, 20 Nov 2018 12:48:36 +0000 (UTC) Received: by mail-pg1-f195.google.com with SMTP id w7so851373pgp.13 for ; Tue, 20 Nov 2018 04:48:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=c2MnxOT1VUuS5eF73fPXm/NWIUEXTIOsoiTVDbfk70U=; b=RotQ7YX4DuqQcG1FUFOcDPCMxsxmZMQR9fjUzoj1lwdOWau+uxQ2ZJy60phzIRXHJy dCRNrFFZY9AW8jml536c3Mkedyzv0XzQKb4Iw2knUP4fKp7w2uw2BwWmrsxFQtPWYQfg f010JkftTxmzGdIyw43/WeXB8V53LfSyuR3aw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=c2MnxOT1VUuS5eF73fPXm/NWIUEXTIOsoiTVDbfk70U=; b=UzieVEJyIZ+WDmVLcC2cHNz1k2X+b7APgJGqdM3QSyeAzHl5R3eIQ9N/YbjiUNbMvs a/RV6pdO6O3G08m1MiX6andJAwfzl20tZi2y2OOMpcDbJtBPK457rthkUORvnDMAeVzC cUvMn837Y7/P/wK3OxdOL+72aFe72GwPlzBQ8w6jfmz176PXLSBVYo8FIDQOWdr20OrD uiBPPISrxtcHBh6JmKEUao9L0WOcWd/rfzKtp+/1HWcHGkjvrz8DMOHr0zJWz+s/N8Rw EN/FZiEWDLP850A6p54G//2xKGIUWdh70Lp7BtLY1bh2XyNwxVUZvX9RmUbQoAsSqauF KPzQ== X-Gm-Message-State: AGRZ1gIjusLiZnWCApnqWJkce8w13ZweOYeAC9OOotYwvRX1y728yuVX RG8PLYdZjwhZbP/1wWeiihJ/giPw7cs= X-Google-Smtp-Source: AJdET5fAEruuhu1cWB/SQiSEdL81W0KbQx0IUZ2LWm/9+7SETqvC371t6XMHrkCD7eQw4oCZAXyxlA== X-Received: by 2002:a62:e0d8:: with SMTP id d85mr2001211pfm.214.1542718114862; Tue, 20 Nov 2018 04:48:34 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.48.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:48:34 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:41 +0530 Message-Id: <20181120124814.23293-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 01/34] spi: Remove unused spi_init X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki --- drivers/net/e1000_spi.c | 3 --- drivers/spi/atmel_spi.c | 5 ----- drivers/spi/davinci_spi.c | 5 ----- drivers/spi/fsl_dspi.c | 5 ----- drivers/spi/fsl_espi.c | 5 ----- drivers/spi/lpc32xx_ssp.c | 9 --------- drivers/spi/mxc_spi.c | 4 ---- drivers/spi/mxs_spi.c | 4 ---- drivers/spi/omap3_spi.c | 5 ----- drivers/spi/sh_qspi.c | 5 ----- drivers/spi/sh_spi.c | 4 ---- drivers/spi/soft_spi_legacy.c | 7 ------- include/spi.h | 7 ------- 13 files changed, 68 deletions(-) diff --git a/drivers/net/e1000_spi.c b/drivers/net/e1000_spi.c index b38f4df9f3..aecd290d72 100644 --- a/drivers/net/e1000_spi.c +++ b/drivers/net/e1000_spi.c @@ -77,9 +77,6 @@ static inline struct e1000_hw *e1000_hw_from_spi(struct spi_slave *spi) return container_of(spi, struct e1000_hw, spi); } -/* Not sure why all of these are necessary */ -void spi_init(void) { /* Nothing to do */ } - struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode) { diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c index 1db8bbef2b..cf4de9ee1a 100644 --- a/drivers/spi/atmel_spi.c +++ b/drivers/spi/atmel_spi.c @@ -34,11 +34,6 @@ static int spi_has_wdrbt(struct atmel_spi_slave *slave) return (ATMEL_SPI_VERSION_REV(ver) >= 0x210); } -void spi_init() -{ - -} - struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode) { diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 07fa5e3b8a..4d2c106440 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -388,11 +388,6 @@ void spi_cs_deactivate(struct spi_slave *slave) /* do nothing */ } -void spi_init(void) -{ - /* do nothing */ -} - struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode) { diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c index f7ed8fbe08..764c94215e 100644 --- a/drivers/spi/fsl_dspi.c +++ b/drivers/spi/fsl_dspi.c @@ -390,11 +390,6 @@ static int fsl_dspi_cfg_speed(struct fsl_dspi_priv *priv, uint speed) return 0; } #ifndef CONFIG_DM_SPI -void spi_init(void) -{ - /* Nothing to do */ -} - int spi_cs_is_valid(unsigned int bus, unsigned int cs) { if (((cs >= 0) && (cs < 8)) && ((bus >= 0) && (bus < 8))) diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index e9941593f5..7444ae1a06 100644 --- a/drivers/spi/fsl_espi.c +++ b/drivers/spi/fsl_espi.c @@ -118,11 +118,6 @@ void spi_free_slave(struct spi_slave *slave) free(fsl); } -void spi_init(void) -{ - -} - int spi_claim_bus(struct spi_slave *slave) { struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave); diff --git a/drivers/spi/lpc32xx_ssp.c b/drivers/spi/lpc32xx_ssp.c index ce12eee657..4b09366317 100644 --- a/drivers/spi/lpc32xx_ssp.c +++ b/drivers/spi/lpc32xx_ssp.c @@ -47,15 +47,6 @@ static inline struct lpc32xx_spi_slave *to_lpc32xx_spi_slave( return container_of(slave, struct lpc32xx_spi_slave, slave); } -/* spi_init is called during boot when CONFIG_CMD_SPI is defined */ -void spi_init(void) -{ - /* - * nothing to do: clocking was enabled in lpc32xx_ssp_enable() - * and configuration will be done in spi_setup_slave() - */ -} - /* the following is called in sequence by do_spi_xfer() */ struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode) diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index 0dccc38b82..b2636909ce 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -400,10 +400,6 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, return mxc_spi_xfer_internal(mxcs, bitlen, dout, din, flags); } -void spi_init(void) -{ -} - /* * Some SPI devices require active chip-select over multiple * transactions, we achieve this using a GPIO. Still, the SPI diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c index 006fe8281c..5065e407f8 100644 --- a/drivers/spi/mxs_spi.c +++ b/drivers/spi/mxs_spi.c @@ -39,10 +39,6 @@ static inline struct mxs_spi_slave *to_mxs_slave(struct spi_slave *slave) return container_of(slave, struct mxs_spi_slave, slave); } -void spi_init(void) -{ -} - int spi_cs_is_valid(unsigned int bus, unsigned int cs) { /* MXS SPI: 4 ports and 3 chip selects maximum */ diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index ecf54bb714..c7fcf050a5 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -461,11 +461,6 @@ static inline struct omap3_spi_priv *to_omap3_spi(struct spi_slave *slave) return container_of(slave, struct omap3_spi_priv, slave); } -void spi_init(void) -{ - /* do nothing */ -} - void spi_free_slave(struct spi_slave *slave) { struct omap3_spi_priv *priv = to_omap3_spi(slave); diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c index 64dfd748d6..5ae203d8d4 100644 --- a/drivers/spi/sh_qspi.c +++ b/drivers/spi/sh_qspi.c @@ -247,11 +247,6 @@ void spi_cs_deactivate(struct spi_slave *slave) sh_qspi_cs_deactivate(ss); } -void spi_init(void) -{ - /* nothing to do */ -} - struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode) { diff --git a/drivers/spi/sh_spi.c b/drivers/spi/sh_spi.c index bc2bd638e6..c58fd0ebc4 100644 --- a/drivers/spi/sh_spi.c +++ b/drivers/spi/sh_spi.c @@ -66,10 +66,6 @@ static int write_fifo_empty_wait(struct sh_spi *ss) return 0; } -void spi_init(void) -{ -} - static void sh_spi_set_cs(struct sh_spi *ss, unsigned int cs) { unsigned long val = 0; diff --git a/drivers/spi/soft_spi_legacy.c b/drivers/spi/soft_spi_legacy.c index 0aac0c065d..cc5ab5f991 100644 --- a/drivers/spi/soft_spi_legacy.c +++ b/drivers/spi/soft_spi_legacy.c @@ -36,13 +36,6 @@ static inline struct soft_spi_slave *to_soft_spi(struct spi_slave *slave) /* Public Functions */ /*=====================================================================*/ -/*----------------------------------------------------------------------- - * Initialization - */ -void spi_init (void) -{ -} - struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode) { diff --git a/include/spi.h b/include/spi.h index 938627bc01..92427e5f32 100644 --- a/include/spi.h +++ b/include/spi.h @@ -117,13 +117,6 @@ struct spi_slave { #define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */ }; -/** - * Initialization, must be called once on start up. - * - * TODO: I don't think we really need this. - */ -void spi_init(void); - /** * spi_do_alloc_slave - Allocate a new SPI slave (internal) * From patchwork Tue Nov 20 12:47:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000446 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="mY8Qb4Ca"; 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Tue, 20 Nov 2018 04:48:37 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.48.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:48:36 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:42 +0530 Message-Id: <20181120124814.23293-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 02/34] spi: Remove used spi_init X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" spi_init used in some areas in tree, but the respective drivers will remove in future patches. So remove the same instances. Signed-off-by: Jagan Teki --- common/board_f.c | 1 - doc/driver-model/spi-howto.txt | 5 ----- examples/standalone/atmel_df_pow2.c | 2 -- include/_exports.h | 2 -- 4 files changed, 10 deletions(-) diff --git a/common/board_f.c b/common/board_f.c index f1a1432d86..27c27803cc 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -262,7 +262,6 @@ __weak int init_func_vid(void) static int init_func_spi(void) { puts("SPI: "); - spi_init(); puts("ready\n"); return 0; } diff --git a/doc/driver-model/spi-howto.txt b/doc/driver-model/spi-howto.txt index 1955ffe284..38c26f642b 100644 --- a/doc/driver-model/spi-howto.txt +++ b/doc/driver-model/spi-howto.txt @@ -163,11 +163,6 @@ At this point you should be able to build U-Boot for your board with the empty SPI driver. You still have empty methods in your driver, but we will write these one by one. -If you have spi_init() functions or the like that are called from your -board then the build will fail. Remove these calls and make a note of the -init that needs to be done. - - 7. Set up your platform data structure This will hold the information your driver to operate, like its hardware diff --git a/examples/standalone/atmel_df_pow2.c b/examples/standalone/atmel_df_pow2.c index 2e14aba390..b7bd243730 100644 --- a/examples/standalone/atmel_df_pow2.c +++ b/examples/standalone/atmel_df_pow2.c @@ -126,8 +126,6 @@ int atmel_df_pow2(int argc, char * const argv[]) return 1; } - spi_init(); - while (1) { struct spi_slave *slave; char *line, *p; diff --git a/include/_exports.h b/include/_exports.h index 5416041243..c15050e30b 100644 --- a/include/_exports.h +++ b/include/_exports.h @@ -50,11 +50,9 @@ #endif #if !defined(CONFIG_CMD_SPI) || defined(CONFIG_DM_SPI) - EXPORT_FUNC(dummy, void, spi_init, void) EXPORT_FUNC(dummy, void, spi_setup_slave, void) EXPORT_FUNC(dummy, void, spi_free_slave, void) #else - EXPORT_FUNC(spi_init, void, spi_init, void) EXPORT_FUNC(spi_setup_slave, struct spi_slave *, spi_setup_slave, unsigned int, unsigned int, unsigned int, unsigned int) EXPORT_FUNC(spi_free_slave, void, spi_free_slave, struct spi_slave *) From patchwork Tue Nov 20 12:47:43 2018 Content-Type: text/plain; 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Tue, 20 Nov 2018 04:48:40 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.48.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:48:39 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:43 +0530 Message-Id: <20181120124814.23293-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini , Vitaly Andrianov , Peter Howard Subject: [U-Boot] [PATCH 03/34] spi: davinci: Full dm conversion X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" davinci_spi now support dt along with platform data, respective boards need to switch into dm for the same. Cc: Adam Ford Cc: Vitaly Andrianov Cc: Stefano Babic Cc: Peter Howard Cc: Tom Rini Signed-off-by: Jagan Teki Tested-By: Adam Ford #da850evm --- Makefile | 9 +++ drivers/spi/Makefile | 2 +- drivers/spi/davinci_spi.c | 157 -------------------------------------- drivers/spi/spi.c | 35 +++++++++ 4 files changed, 45 insertions(+), 158 deletions(-) diff --git a/Makefile b/Makefile index 552687db53..d06cb5c287 100644 --- a/Makefile +++ b/Makefile @@ -917,6 +917,15 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) @echo "(possibly in a subsequent patch in your series)" @echo "before sending patches to the mailing list." @echo "====================================================" +endif +ifeq ($(CONFIG_DM_SPI),) +ifeq ($(CONFIG_DAVINCI_SPI),y) + @echo "===================== WARNING ======================" + @echo "This board uses SPI driver from drivers/spi/ without" + @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" + @echo "otherwise SPI on this board, cannot work." + @echo "====================================================" +endif endif @# Check that this build does not use CONFIG options that we do not @# know about unless they are in Kconfig. All the existing CONFIG diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 7242ea7e40..cf5a5cccc0 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -6,6 +6,7 @@ # There are many options which enable SPI, so make this library available ifdef CONFIG_DM_SPI obj-y += spi-uclass.o +obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o @@ -22,7 +23,6 @@ obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o obj-$(CONFIG_CF_SPI) += cf_spi.o -obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 4d2c106440..c1646f6cdc 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -52,41 +52,6 @@ /* SPIDEF */ #define SPIDEF_CSDEF0_MASK BIT(0) -#ifndef CONFIG_DM_SPI -#define SPI0_BUS 0 -#define SPI0_BASE CONFIG_SYS_SPI_BASE -/* - * Define default SPI0_NUM_CS as 1 for existing platforms that uses this - * driver. Platform can configure number of CS using CONFIG_SYS_SPI0_NUM_CS - * if more than one CS is supported and by defining CONFIG_SYS_SPI0. - */ -#ifndef CONFIG_SYS_SPI0 -#define SPI0_NUM_CS 1 -#else -#define SPI0_NUM_CS CONFIG_SYS_SPI0_NUM_CS -#endif - -/* - * define CONFIG_SYS_SPI1 when platform has spi-1 device (bus #1) and - * CONFIG_SYS_SPI1_NUM_CS defines number of CS on this bus - */ -#ifdef CONFIG_SYS_SPI1 -#define SPI1_BUS 1 -#define SPI1_NUM_CS CONFIG_SYS_SPI1_NUM_CS -#define SPI1_BASE CONFIG_SYS_SPI1_BASE -#endif - -/* - * define CONFIG_SYS_SPI2 when platform has spi-2 device (bus #2) and - * CONFIG_SYS_SPI2_NUM_CS defines number of CS on this bus - */ -#ifdef CONFIG_SYS_SPI2 -#define SPI2_BUS 2 -#define SPI2_NUM_CS CONFIG_SYS_SPI2_NUM_CS -#define SPI2_BASE CONFIG_SYS_SPI2_BASE -#endif -#endif - DECLARE_GLOBAL_DATA_PTR; /* davinci spi register set */ @@ -119,9 +84,6 @@ struct davinci_spi_regs { /* davinci spi slave */ struct davinci_spi_slave { -#ifndef CONFIG_DM_SPI - struct spi_slave slave; -#endif struct davinci_spi_regs *regs; unsigned int freq; /* current SPI bus frequency */ unsigned int mode; /* current SPI mode used */ @@ -343,124 +305,6 @@ out: return 0; } -#ifndef CONFIG_DM_SPI - -static inline struct davinci_spi_slave *to_davinci_spi(struct spi_slave *slave) -{ - return container_of(slave, struct davinci_spi_slave, slave); -} - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - int ret = 0; - - switch (bus) { - case SPI0_BUS: - if (cs < SPI0_NUM_CS) - ret = 1; - break; -#ifdef CONFIG_SYS_SPI1 - case SPI1_BUS: - if (cs < SPI1_NUM_CS) - ret = 1; - break; -#endif -#ifdef CONFIG_SYS_SPI2 - case SPI2_BUS: - if (cs < SPI2_NUM_CS) - ret = 1; - break; -#endif - default: - /* Invalid bus number. Do nothing */ - break; - } - return ret; -} - -void spi_cs_activate(struct spi_slave *slave) -{ - /* do nothing */ -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - /* do nothing */ -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct davinci_spi_slave *ds; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - ds = spi_alloc_slave(struct davinci_spi_slave, bus, cs); - if (!ds) - return NULL; - - switch (bus) { - case SPI0_BUS: - ds->regs = (struct davinci_spi_regs *)SPI0_BASE; - break; -#ifdef CONFIG_SYS_SPI1 - case SPI1_BUS: - ds->regs = (struct davinci_spi_regs *)SPI1_BASE; - break; -#endif -#ifdef CONFIG_SYS_SPI2 - case SPI2_BUS: - ds->regs = (struct davinci_spi_regs *)SPI2_BASE; - break; -#endif - default: /* Invalid bus number */ - return NULL; - } - - ds->freq = max_hz; - ds->mode = mode; - - return &ds->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct davinci_spi_slave *ds = to_davinci_spi(slave); - - free(ds); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct davinci_spi_slave *ds = to_davinci_spi(slave); - - ds->cur_cs = slave->cs; - - return __davinci_spi_xfer(ds, bitlen, dout, din, flags); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct davinci_spi_slave *ds = to_davinci_spi(slave); - -#ifdef CONFIG_SPI_HALF_DUPLEX - ds->half_duplex = true; -#else - ds->half_duplex = false; -#endif - return __davinci_spi_claim_bus(ds, ds->slave.cs); -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct davinci_spi_slave *ds = to_davinci_spi(slave); - - __davinci_spi_release_bus(ds); -} - -#else static int davinci_spi_set_speed(struct udevice *bus, uint max_hz) { struct davinci_spi_slave *ds = dev_get_priv(bus); @@ -579,4 +423,3 @@ U_BOOT_DRIVER(davinci_spi) = { .ops = &davinci_spi_ops, .priv_auto_alloc_size = sizeof(struct davinci_spi_slave), }; -#endif diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 22910de0dd..ba1d1b082d 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -38,3 +38,38 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus, return ptr; } + +#if !defined(CONFIG_DM_SPI) && defined(CONFIG_DAVINCI_SPI) +void spi_cs_activate(struct spi_slave *slave) +{ +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ +} + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + return NULL; +} + +void spi_free_slave(struct spi_slave *slave) +{ +} + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + return 0; +} + +int spi_claim_bus(struct spi_slave *slave) +{ + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ +} +#endif From patchwork Tue Nov 20 12:47:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000447 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Signed-off-by: Jagan Teki --- Makefile | 2 +- drivers/spi/Makefile | 2 +- drivers/spi/kirkwood_spi.c | 229 +++++------------------- drivers/spi/spi.c | 4 +- include/dm/platform_data/spi_kirkwood.h | 15 ++ 5 files changed, 61 insertions(+), 191 deletions(-) create mode 100644 include/dm/platform_data/spi_kirkwood.h diff --git a/Makefile b/Makefile index d06cb5c287..214f1bcdbf 100644 --- a/Makefile +++ b/Makefile @@ -919,7 +919,7 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) @echo "====================================================" endif ifeq ($(CONFIG_DM_SPI),) -ifeq ($(CONFIG_DAVINCI_SPI),y) +ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI),y),y) @echo "===================== WARNING ======================" @echo "This board uses SPI driver from drivers/spi/ without" @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index cf5a5cccc0..3c74418992 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -7,6 +7,7 @@ ifdef CONFIG_DM_SPI obj-y += spi-uclass.o obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o +obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o @@ -29,7 +30,6 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o obj-$(CONFIG_ICH_SPI) += ich.o -obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 5dd1ad67cf..e9ca95697f 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -13,31 +13,41 @@ #include #include #include -#ifdef CONFIG_KIRKWOOD -#include -#endif #include -static void _spi_cs_activate(struct kwspi_registers *reg) +#include + +struct mvebu_spi_dev { + bool is_errata_50mhz_ac; +}; + +struct mvebu_spi_priv { + struct kwspi_registers *spireg; +}; + +static void spi_cs_activate(struct kwspi_registers *reg) { setbits_le32(®->ctrl, KWSPI_CSN_ACT); } -static void _spi_cs_deactivate(struct kwspi_registers *reg) +static void spi_cs_deactivate(struct kwspi_registers *reg) { clrbits_le32(®->ctrl, KWSPI_CSN_ACT); } -static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) +static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) { + struct udevice *bus = dev->parent; + struct mvebu_spi_platdata *plat = dev_get_platdata(bus); + struct kwspi_registers *reg = plat->spireg; unsigned int tmpdout, tmpdin; int tm, isread = 0; - debug("spi_xfer: dout %p din %p bitlen %u\n", dout, din, bitlen); + debug("%s: dout %p din %p bitlen %u\n", __func__, dout, din, bitlen); if (flags & SPI_XFER_BEGIN) - _spi_cs_activate(reg); + spi_cs_activate(reg); /* * handle data in 8-bit chunks @@ -55,8 +65,8 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, clrbits_le32(®->irq_cause, KWSPI_SMEMRDIRQ); writel(tmpdout, ®->dout); /* Write the data out */ - debug("*** spi_xfer: ... %08x written, bitlen %d\n", - tmpdout, bitlen); + debug("%s: ... %08x written, bitlen %d\n", + __func__, tmpdout, bitlen); /* * Wait for SPI transmit to get out @@ -67,8 +77,8 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, if (readl(®->irq_cause) & KWSPI_SMEMRDIRQ) { isread = 1; tmpdin = readl(®->din); - debug("spi_xfer: din %p..%08x read\n", - din, tmpdin); + debug("%s: din %p..%08x read\n", + __func__, din, tmpdin); if (din) { *((u8 *)din) = (u8)tmpdin; @@ -82,179 +92,17 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, break; } if (tm >= KWSPI_TIMEOUT) - printf("*** spi_xfer: Time out during SPI transfer\n"); + printf("%s: Time out during SPI transfer\n", __func__); debug("loopend bitlen %d\n", bitlen); } if (flags & SPI_XFER_END) - _spi_cs_deactivate(reg); + spi_cs_deactivate(reg); return 0; } -#ifndef CONFIG_DM_SPI - -static struct kwspi_registers *spireg = - (struct kwspi_registers *)MVEBU_SPI_BASE; - -#ifdef CONFIG_KIRKWOOD -static u32 cs_spi_mpp_back[2]; -#endif - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct spi_slave *slave; - u32 data; -#ifdef CONFIG_KIRKWOOD - static const u32 kwspi_mpp_config[2][2] = { - { MPP0_SPI_SCn, 0 }, /* if cs == 0 */ - { MPP7_SPI_SCn, 0 } /* if cs != 0 */ - }; -#endif - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - slave = spi_alloc_slave_base(bus, cs); - if (!slave) - return NULL; - - writel(KWSPI_SMEMRDY, &spireg->ctrl); - - /* calculate spi clock prescaller using max_hz */ - data = ((CONFIG_SYS_TCLK / 2) / max_hz) + 0x10; - data = data < KWSPI_CLKPRESCL_MIN ? KWSPI_CLKPRESCL_MIN : data; - data = data > KWSPI_CLKPRESCL_MASK ? KWSPI_CLKPRESCL_MASK : data; - - /* program spi clock prescaller using max_hz */ - writel(KWSPI_ADRLEN_3BYTE | data, &spireg->cfg); - debug("data = 0x%08x\n", data); - - writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause); - writel(KWSPI_IRQMASK, &spireg->irq_mask); - -#ifdef CONFIG_KIRKWOOD - /* program mpp registers to select SPI_CSn */ - kirkwood_mpp_conf(kwspi_mpp_config[cs ? 1 : 0], cs_spi_mpp_back); -#endif - - return slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ -#ifdef CONFIG_KIRKWOOD - kirkwood_mpp_conf(cs_spi_mpp_back, NULL); -#endif - free(slave); -} - -#if defined(CONFIG_SYS_KW_SPI_MPP) -u32 spi_mpp_backup[4]; -#endif - -__attribute__((weak)) int board_spi_claim_bus(struct spi_slave *slave) -{ - return 0; -} - -int spi_claim_bus(struct spi_slave *slave) -{ -#if defined(CONFIG_SYS_KW_SPI_MPP) - u32 config; - u32 spi_mpp_config[4]; - - config = CONFIG_SYS_KW_SPI_MPP; - - if (config & MOSI_MPP6) - spi_mpp_config[0] = MPP6_SPI_MOSI; - else - spi_mpp_config[0] = MPP1_SPI_MOSI; - - if (config & SCK_MPP10) - spi_mpp_config[1] = MPP10_SPI_SCK; - else - spi_mpp_config[1] = MPP2_SPI_SCK; - - if (config & MISO_MPP11) - spi_mpp_config[2] = MPP11_SPI_MISO; - else - spi_mpp_config[2] = MPP3_SPI_MISO; - - spi_mpp_config[3] = 0; - spi_mpp_backup[3] = 0; - - /* set new spi mpp and save current mpp config */ - kirkwood_mpp_conf(spi_mpp_config, spi_mpp_backup); -#endif - - return board_spi_claim_bus(slave); -} - -__attribute__((weak)) void board_spi_release_bus(struct spi_slave *slave) -{ -} - -void spi_release_bus(struct spi_slave *slave) -{ -#if defined(CONFIG_SYS_KW_SPI_MPP) - kirkwood_mpp_conf(spi_mpp_backup, NULL); -#endif - - board_spi_release_bus(slave); -} - -#ifndef CONFIG_SPI_CS_IS_VALID -/* - * you can define this function board specific - * define above CONFIG in board specific config file and - * provide the function in board specific src file - */ -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - return bus == 0 && (cs == 0 || cs == 1); -} -#endif - -void spi_init(void) -{ -} - -void spi_cs_activate(struct spi_slave *slave) -{ - _spi_cs_activate(spireg); -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - _spi_cs_deactivate(spireg); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - return _spi_xfer(spireg, bitlen, dout, din, flags); -} - -#else - -/* Here now the DM part */ - -struct mvebu_spi_dev { - bool is_errata_50mhz_ac; -}; - -struct mvebu_spi_platdata { - struct kwspi_registers *spireg; - bool is_errata_50mhz_ac; -}; - -struct mvebu_spi_priv { - struct kwspi_registers *spireg; -}; - static int mvebu_spi_set_speed(struct udevice *bus, uint hz) { struct mvebu_spi_platdata *plat = dev_get_platdata(bus); @@ -329,15 +177,6 @@ static int mvebu_spi_set_mode(struct udevice *bus, uint mode) return 0; } -static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct udevice *bus = dev->parent; - struct mvebu_spi_platdata *plat = dev_get_platdata(bus); - - return _spi_xfer(plat->spireg, bitlen, dout, din, flags); -} - static int mvebu_spi_claim_bus(struct udevice *dev) { struct udevice *bus = dev->parent; @@ -351,6 +190,17 @@ static int mvebu_spi_claim_bus(struct udevice *dev) return 0; } +static const struct dm_spi_ops mvebu_spi_ops = { + .claim_bus = mvebu_spi_claim_bus, + .xfer = mvebu_spi_xfer, + .set_speed = mvebu_spi_set_speed, + .set_mode = mvebu_spi_set_mode, + /* + * cs_info is not needed, since we require all chip selects to be + * in the device tree explicitly + */ +}; + static int mvebu_spi_probe(struct udevice *bus) { struct mvebu_spi_platdata *plat = dev_get_platdata(bus); @@ -363,6 +213,7 @@ static int mvebu_spi_probe(struct udevice *bus) return 0; } +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) static int mvebu_spi_ofdata_to_platdata(struct udevice *bus) { struct mvebu_spi_platdata *plat = dev_get_platdata(bus); @@ -421,15 +272,17 @@ static const struct udevice_id mvebu_spi_ids[] = { }, { } }; +#endif U_BOOT_DRIVER(mvebu_spi) = { .name = "mvebu_spi", .id = UCLASS_SPI, +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .of_match = mvebu_spi_ids, - .ops = &mvebu_spi_ops, .ofdata_to_platdata = mvebu_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct mvebu_spi_platdata), +#endif + .ops = &mvebu_spi_ops, .priv_auto_alloc_size = sizeof(struct mvebu_spi_priv), .probe = mvebu_spi_probe, }; -#endif diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index ba1d1b082d..5181d5b83f 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -39,7 +39,9 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus, return ptr; } -#if !defined(CONFIG_DM_SPI) && defined(CONFIG_DAVINCI_SPI) +#if !defined(CONFIG_DM_SPI) && \ + defined(CONFIG_DAVINCI_SPI) || \ + defined(CONFIG_KIRKWOOD_SPI) void spi_cs_activate(struct spi_slave *slave) { } diff --git a/include/dm/platform_data/spi_kirkwood.h b/include/dm/platform_data/spi_kirkwood.h new file mode 100644 index 0000000000..ae9b2783a9 --- /dev/null +++ b/include/dm/platform_data/spi_kirkwood.h @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2018 Jagan Teki + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __spi_kirkwood_h +#define __spi_kirkwood_h + +struct mvebu_spi_platdata { + struct kwspi_registers *spireg; + bool is_errata_50mhz_ac; +}; + +#endif /* __spi_kirkwood_h */ From patchwork Tue Nov 20 12:47:45 2018 Content-Type: text/plain; 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Tue, 20 Nov 2018 04:48:45 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.48.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:48:44 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:45 +0530 Message-Id: <20181120124814.23293-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini , Vitaly Andrianov , Peter Howard Subject: [U-Boot] [PATCH 05/34] spi: ti_qspi: Full dm conversion X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" ti_qspi now support dt along with platform data, respective boards need to switch into dm for the same. Cc: Tom Rini Cc: Vitaly Andrianov Cc: Peter Howard Signed-off-by: Jagan Teki --- Makefile | 2 +- drivers/spi/Makefile | 2 +- drivers/spi/spi.c | 3 +- drivers/spi/ti_qspi.c | 490 +++++++++---------------- include/dm/platform_data/spi_ti_qspi.h | 19 + 5 files changed, 200 insertions(+), 316 deletions(-) create mode 100644 include/dm/platform_data/spi_ti_qspi.h diff --git a/Makefile b/Makefile index 214f1bcdbf..efa68e7343 100644 --- a/Makefile +++ b/Makefile @@ -919,7 +919,7 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) @echo "====================================================" endif ifeq ($(CONFIG_DM_SPI),) -ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI),y),y) +ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) $(CONFIG_TI_QSPI),y),y) @echo "===================== WARNING ======================" @echo "This board uses SPI driver from drivers/spi/ without" @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 3c74418992..748d9a90ab 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o +obj-$(CONFIG_TI_QSPI) += ti_qspi.o else obj-y += spi.o obj-$(CONFIG_SOFT_SPI) += soft_spi_legacy.o @@ -52,7 +53,6 @@ obj-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o obj-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o obj-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o obj-$(CONFIG_TEGRA210_QSPI) += tegra210_qspi.o -obj-$(CONFIG_TI_QSPI) += ti_qspi.o obj-$(CONFIG_XILINX_SPI) += xilinx_spi.o obj-$(CONFIG_ZYNQ_SPI) += zynq_spi.o obj-$(CONFIG_ZYNQ_QSPI) += zynq_qspi.o diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 5181d5b83f..500853fc95 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -41,7 +41,8 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus, #if !defined(CONFIG_DM_SPI) && \ defined(CONFIG_DAVINCI_SPI) || \ - defined(CONFIG_KIRKWOOD_SPI) + defined(CONFIG_KIRKWOOD_SPI) || \ + defined(CONFIG_TI_QSPI) void spi_cs_activate(struct spi_slave *slave) { } diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 2dcce66de0..7235554003 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -19,6 +19,8 @@ #include #include +#include + DECLARE_GLOBAL_DATA_PTR; /* ti qpsi register bit masks */ @@ -33,17 +35,17 @@ DECLARE_GLOBAL_DATA_PTR; #define QSPI_CLK_DIV_MAX 0xffff /* command */ #define QSPI_EN_CS(n) (n << 28) -#define QSPI_WLEN(n) ((n-1) << 19) +#define QSPI_WLEN(n) ((n - 1) << 19) #define QSPI_3_PIN BIT(18) #define QSPI_RD_SNGL BIT(16) #define QSPI_WR_SNGL (2 << 16) #define QSPI_INVAL (4 << 16) #define QSPI_RD_QUAD (7 << 16) /* device control */ -#define QSPI_DD(m, n) (m << (3 + n*8)) -#define QSPI_CKPHA(n) (1 << (2 + n*8)) -#define QSPI_CSPOL(n) (1 << (1 + n*8)) -#define QSPI_CKPOL(n) (1 << (n*8)) +#define QSPI_DD(m, n) (m << (3 + n * 8)) +#define QSPI_CKPHA(n) (1 << (2 + n * 8)) +#define QSPI_CSPOL(n) (1 << (1 + n * 8)) +#define QSPI_CKPOL(n) (1 << (n * 8)) /* status */ #define QSPI_WC BIT(1) #define QSPI_BUSY BIT(0) @@ -98,13 +100,9 @@ struct ti_qspi_regs { /* ti qspi priv */ struct ti_qspi_priv { -#ifndef CONFIG_DM_SPI - struct spi_slave slave; -#else void *memory_map; uint max_hz; u32 num_cs; -#endif struct ti_qspi_regs *base; void *ctrl_mod_mmap; ulong fclk; @@ -113,37 +111,113 @@ struct ti_qspi_priv { u32 dc; }; -static void ti_spi_set_speed(struct ti_qspi_priv *priv, uint hz) +/* TODO: control from sf layer to here through dm-spi */ +#if defined(CONFIG_TI_EDMA3) && !defined(CONFIG_DMA) +void spi_flash_copy_mmap(void *data, void *offset, size_t len) +{ + unsigned int addr = (unsigned int)(data); + unsigned int edma_slot_num = 1; + + /* Invalidate the area, so no writeback into the RAM races with DMA */ + invalidate_dcache_range(addr, addr + roundup(len, ARCH_DMA_MINALIGN)); + + /* enable edma3 clocks */ + enable_edma3_clocks(); + + /* Call edma3 api to do actual DMA transfer */ + edma3_transfer(EDMA3_BASE, edma_slot_num, data, offset, len); + + /* disable edma3 clocks */ + disable_edma3_clocks(); + + *((unsigned int *)offset) += len; +} +#endif + +static void ti_qspi_cs_deactivate(struct ti_qspi_priv *priv) +{ + writel(priv->cmd | QSPI_INVAL, &priv->base->cmd); + /* dummy readl to ensure bus sync */ + readl(&priv->base->cmd); +} + +static void ti_qspi_ctrl_mode_mmap(void *ctrl_mod_mmap, int cs, bool enable) +{ + u32 val; + + val = readl(ctrl_mod_mmap); + if (enable) + val |= MEM_CS(cs); + else + val &= MEM_CS_UNSELECT; + writel(val, ctrl_mod_mmap); +} + +static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, + struct spi_slave *slave, + bool enable) +{ + u32 memval; + u32 mode = slave->mode & (SPI_RX_QUAD | SPI_RX_DUAL); + + if (!enable) { + writel(0, &priv->base->setup0); + return; + } + + memval = QSPI_SETUP0_NUM_A_BYTES | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS; + + switch (mode) { + case SPI_RX_QUAD: + memval |= QSPI_CMD_READ_QUAD; + memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS; + memval |= QSPI_SETUP0_READ_QUAD; + slave->mode |= SPI_RX_QUAD; + break; + case SPI_RX_DUAL: + memval |= QSPI_CMD_READ_DUAL; + memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS; + memval |= QSPI_SETUP0_READ_DUAL; + break; + default: + memval |= QSPI_CMD_READ; + memval |= QSPI_SETUP0_NUM_D_BYTES_NO_BITS; + memval |= QSPI_SETUP0_READ_NORMAL; + break; + } + + writel(memval, &priv->base->setup0); +} + +static int ti_qspi_set_speed(struct udevice *bus, uint max_hz) { + struct ti_qspi_priv *priv = dev_get_priv(bus); uint clk_div; - if (!hz) + if (!max_hz) clk_div = 0; else - clk_div = DIV_ROUND_UP(priv->fclk, hz) - 1; + clk_div = DIV_ROUND_UP(priv->fclk, max_hz) - 1; /* truncate clk_div value to QSPI_CLK_DIV_MAX */ if (clk_div > QSPI_CLK_DIV_MAX) clk_div = QSPI_CLK_DIV_MAX; - debug("ti_spi_set_speed: hz: %d, clock divider %d\n", hz, clk_div); + debug("%s: max_hz: %d, clock divider %d\n", __func__, max_hz, clk_div); /* disable SCLK */ writel(readl(&priv->base->clk_ctrl) & ~QSPI_CLK_EN, &priv->base->clk_ctrl); /* enable SCLK and program the clk divider */ writel(QSPI_CLK_EN | clk_div, &priv->base->clk_ctrl); -} -static void ti_qspi_cs_deactivate(struct ti_qspi_priv *priv) -{ - writel(priv->cmd | QSPI_INVAL, &priv->base->cmd); - /* dummy readl to ensure bus sync */ - readl(&priv->base->cmd); + return 0; } -static int __ti_qspi_set_mode(struct ti_qspi_priv *priv, unsigned int mode) +static int ti_qspi_set_mode(struct udevice *bus, uint mode) { + struct ti_qspi_priv *priv = dev_get_priv(bus); + priv->dc = 0; if (mode & SPI_CPHA) priv->dc |= QSPI_CKPHA(0); @@ -155,57 +229,83 @@ static int __ti_qspi_set_mode(struct ti_qspi_priv *priv, unsigned int mode) return 0; } -static int __ti_qspi_claim_bus(struct ti_qspi_priv *priv, int cs) +static int ti_qspi_claim_bus(struct udevice *dev) { + struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); + struct spi_slave *slave = dev_get_parent_priv(dev); + struct ti_qspi_priv *priv; + struct udevice *bus; + + bus = dev->parent; + priv = dev_get_priv(bus); + + if (slave_plat->cs > priv->num_cs) { + debug("invalid qspi chip select\n"); + return -EINVAL; + } + + __ti_qspi_setup_memorymap(priv, slave, true); + writel(priv->dc, &priv->base->dc); writel(0, &priv->base->cmd); writel(0, &priv->base->data); - priv->dc <<= cs * 8; + priv->dc <<= slave_plat->cs * 8; writel(priv->dc, &priv->base->dc); return 0; } -static void __ti_qspi_release_bus(struct ti_qspi_priv *priv) +static int ti_qspi_release_bus(struct udevice *dev) { + struct spi_slave *slave = dev_get_parent_priv(dev); + struct ti_qspi_priv *priv; + struct udevice *bus; + + bus = dev->parent; + priv = dev_get_priv(bus); + + __ti_qspi_setup_memorymap(priv, slave, false); + writel(0, &priv->base->dc); writel(0, &priv->base->cmd); writel(0, &priv->base->data); -} - -static void ti_qspi_ctrl_mode_mmap(void *ctrl_mod_mmap, int cs, bool enable) -{ - u32 val; - val = readl(ctrl_mod_mmap); - if (enable) - val |= MEM_CS(cs); - else - val &= MEM_CS_UNSELECT; - writel(val, ctrl_mod_mmap); + return 0; } -static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen, - const void *dout, void *din, unsigned long flags, - u32 cs) +static int ti_qspi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) { - uint words = bitlen >> 3; /* fixed 8-bit word length */ const uchar *txp = dout; + struct dm_spi_slave_platdata *slave = dev_get_parent_platdata(dev); + uint words = bitlen >> 3; /* fixed 8-bit word length */ uchar *rxp = din; + struct ti_qspi_priv *priv; + struct udevice *bus; uint status; int timeout; + bus = dev->parent; + priv = dev_get_priv(bus); + + if (slave->cs > priv->num_cs) { + debug("invalid qspi chip select\n"); + return -EINVAL; + } + /* Setup mmap flags */ if (flags & SPI_XFER_MMAP) { writel(MM_SWITCH, &priv->base->memswitch); if (priv->ctrl_mod_mmap) - ti_qspi_ctrl_mode_mmap(priv->ctrl_mod_mmap, cs, true); + ti_qspi_ctrl_mode_mmap(priv->ctrl_mod_mmap, + slave->cs, true); return 0; } else if (flags & SPI_XFER_MMAP_END) { writel(~MM_SWITCH, &priv->base->memswitch); if (priv->ctrl_mod_mmap) - ti_qspi_ctrl_mode_mmap(priv->ctrl_mod_mmap, cs, false); + ti_qspi_ctrl_mode_mmap(priv->ctrl_mod_mmap, + slave->cs, false); return 0; } @@ -220,7 +320,7 @@ static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen, /* Setup command reg */ priv->cmd = 0; priv->cmd |= QSPI_WLEN(8); - priv->cmd |= QSPI_EN_CS(cs); + priv->cmd |= QSPI_EN_CS(slave->cs); if (priv->mode & SPI_3WIRE) priv->cmd |= QSPI_3_PIN; priv->cmd |= 0xfff; @@ -281,7 +381,7 @@ static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen, *rxp++ = readl(&priv->base->data); xfer_len = 1; debug("rx done, status %08x, read %02x\n", - status, *(rxp-1)); + status, *(rxp - 1)); } words -= xfer_len; } @@ -293,263 +393,40 @@ static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen, return 0; } -/* TODO: control from sf layer to here through dm-spi */ -#if defined(CONFIG_TI_EDMA3) && !defined(CONFIG_DMA) -void spi_flash_copy_mmap(void *data, void *offset, size_t len) -{ - unsigned int addr = (unsigned int) (data); - unsigned int edma_slot_num = 1; - - /* Invalidate the area, so no writeback into the RAM races with DMA */ - invalidate_dcache_range(addr, addr + roundup(len, ARCH_DMA_MINALIGN)); - - /* enable edma3 clocks */ - enable_edma3_clocks(); - - /* Call edma3 api to do actual DMA transfer */ - edma3_transfer(EDMA3_BASE, edma_slot_num, data, offset, len); - - /* disable edma3 clocks */ - disable_edma3_clocks(); - - *((unsigned int *)offset) += len; -} -#endif - -#ifndef CONFIG_DM_SPI - -static inline struct ti_qspi_priv *to_ti_qspi_priv(struct spi_slave *slave) -{ - return container_of(slave, struct ti_qspi_priv, slave); -} - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - return 1; -} - -void spi_cs_activate(struct spi_slave *slave) -{ - /* CS handled in xfer */ - return; -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - struct ti_qspi_priv *priv = to_ti_qspi_priv(slave); - ti_qspi_cs_deactivate(priv); -} - -void spi_init(void) -{ - /* nothing to do */ -} - -static void ti_spi_setup_spi_register(struct ti_qspi_priv *priv) -{ - u32 memval = 0; - -#ifdef CONFIG_QSPI_QUAD_SUPPORT - struct spi_slave *slave = &priv->slave; - memval |= (QSPI_CMD_READ_QUAD | QSPI_SETUP0_NUM_A_BYTES | - QSPI_SETUP0_NUM_D_BYTES_8_BITS | - QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE | - QSPI_NUM_DUMMY_BITS); - slave->mode |= SPI_RX_QUAD; -#else - memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | - QSPI_SETUP0_NUM_D_BYTES_NO_BITS | - QSPI_SETUP0_READ_NORMAL | QSPI_CMD_WRITE | - QSPI_NUM_DUMMY_BITS; -#endif - - writel(memval, &priv->base->setup0); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct ti_qspi_priv *priv; - -#ifdef CONFIG_AM43XX - gpio_request(CONFIG_QSPI_SEL_GPIO, "qspi_gpio"); - gpio_direction_output(CONFIG_QSPI_SEL_GPIO, 1); -#endif - - priv = spi_alloc_slave(struct ti_qspi_priv, bus, cs); - if (!priv) { - printf("SPI_error: Fail to allocate ti_qspi_priv\n"); - return NULL; - } - - priv->base = (struct ti_qspi_regs *)QSPI_BASE; - priv->mode = mode; -#if defined(CONFIG_DRA7XX) - priv->ctrl_mod_mmap = (void *)CORE_CTRL_IO; - priv->slave.memory_map = (void *)MMAP_START_ADDR_DRA; - priv->fclk = QSPI_DRA7XX_FCLK; -#else - priv->slave.memory_map = (void *)MMAP_START_ADDR_AM43x; - priv->fclk = QSPI_FCLK; -#endif - - ti_spi_set_speed(priv, max_hz); - -#ifdef CONFIG_TI_SPI_MMAP - ti_spi_setup_spi_register(priv); -#endif - - return &priv->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct ti_qspi_priv *priv = to_ti_qspi_priv(slave); - free(priv); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct ti_qspi_priv *priv = to_ti_qspi_priv(slave); - - debug("%s: bus:%i cs:%i\n", __func__, priv->slave.bus, priv->slave.cs); - __ti_qspi_set_mode(priv, priv->mode); - return __ti_qspi_claim_bus(priv, priv->slave.cs); -} -void spi_release_bus(struct spi_slave *slave) -{ - struct ti_qspi_priv *priv = to_ti_qspi_priv(slave); - - debug("%s: bus:%i cs:%i\n", __func__, priv->slave.bus, priv->slave.cs); - __ti_qspi_release_bus(priv); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - struct ti_qspi_priv *priv = to_ti_qspi_priv(slave); - - debug("spi_xfer: bus:%i cs:%i bitlen:%i flags:%lx\n", - priv->slave.bus, priv->slave.cs, bitlen, flags); - return __ti_qspi_xfer(priv, bitlen, dout, din, flags, priv->slave.cs); -} - -#else /* CONFIG_DM_SPI */ - -static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, - struct spi_slave *slave, - bool enable) -{ - u32 memval; - u32 mode = slave->mode & (SPI_RX_QUAD | SPI_RX_DUAL); - - if (!enable) { - writel(0, &priv->base->setup0); - return; - } - - memval = QSPI_SETUP0_NUM_A_BYTES | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS; - - switch (mode) { - case SPI_RX_QUAD: - memval |= QSPI_CMD_READ_QUAD; - memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS; - memval |= QSPI_SETUP0_READ_QUAD; - slave->mode |= SPI_RX_QUAD; - break; - case SPI_RX_DUAL: - memval |= QSPI_CMD_READ_DUAL; - memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS; - memval |= QSPI_SETUP0_READ_DUAL; - break; - default: - memval |= QSPI_CMD_READ; - memval |= QSPI_SETUP0_NUM_D_BYTES_NO_BITS; - memval |= QSPI_SETUP0_READ_NORMAL; - break; - } - - writel(memval, &priv->base->setup0); -} - +static const struct dm_spi_ops ti_qspi_ops = { + .claim_bus = ti_qspi_claim_bus, + .release_bus = ti_qspi_release_bus, + .xfer = ti_qspi_xfer, + .set_speed = ti_qspi_set_speed, + .set_mode = ti_qspi_set_mode, +}; -static int ti_qspi_set_speed(struct udevice *bus, uint max_hz) +static int ti_qspi_probe(struct udevice *bus) { + struct ti_qspi_platdata *plat = bus->platdata; struct ti_qspi_priv *priv = dev_get_priv(bus); - ti_spi_set_speed(priv, max_hz); + priv->fclk = plat->fclk; + priv->ctrl_mod_mmap = plat->ctrl_mod_mmap; + priv->base = plat->base; + priv->memory_map = plat->memory_map; + priv->max_hz = plat->max_hz; + priv->num_cs = plat->num_cs; return 0; } -static int ti_qspi_set_mode(struct udevice *bus, uint mode) -{ - struct ti_qspi_priv *priv = dev_get_priv(bus); - return __ti_qspi_set_mode(priv, mode); -} - -static int ti_qspi_claim_bus(struct udevice *dev) -{ - struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); - struct spi_slave *slave = dev_get_parent_priv(dev); - struct ti_qspi_priv *priv; - struct udevice *bus; - - bus = dev->parent; - priv = dev_get_priv(bus); - - if (slave_plat->cs > priv->num_cs) { - debug("invalid qspi chip select\n"); - return -EINVAL; - } - - __ti_qspi_setup_memorymap(priv, slave, true); - - return __ti_qspi_claim_bus(priv, slave_plat->cs); -} - -static int ti_qspi_release_bus(struct udevice *dev) +static int ti_qspi_child_pre_probe(struct udevice *dev) { struct spi_slave *slave = dev_get_parent_priv(dev); - struct ti_qspi_priv *priv; - struct udevice *bus; - - bus = dev->parent; - priv = dev_get_priv(bus); - - __ti_qspi_setup_memorymap(priv, slave, false); - __ti_qspi_release_bus(priv); - - return 0; -} - -static int ti_qspi_xfer(struct udevice *dev, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct dm_spi_slave_platdata *slave = dev_get_parent_platdata(dev); - struct ti_qspi_priv *priv; - struct udevice *bus; - - bus = dev->parent; - priv = dev_get_priv(bus); - - if (slave->cs > priv->num_cs) { - debug("invalid qspi chip select\n"); - return -EINVAL; - } - - return __ti_qspi_xfer(priv, bitlen, dout, din, flags, slave->cs); -} - -static int ti_qspi_probe(struct udevice *bus) -{ + struct udevice *bus = dev_get_parent(dev); struct ti_qspi_priv *priv = dev_get_priv(bus); - priv->fclk = dev_get_driver_data(bus); - + slave->memory_map = priv->memory_map; return 0; } +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) static void *map_syscon_chipselects(struct udevice *bus) { #if CONFIG_IS_ENABLED(SYSCON) @@ -575,7 +452,7 @@ static void *map_syscon_chipselects(struct udevice *bus) cell = fdt_getprop(gd->fdt_blob, dev_of_offset(bus), "syscon-chipselects", &len); - if (len < 2*sizeof(fdt32_t)) { + if (len < 2 * sizeof(fdt32_t)) { debug("%s: offset not available\n", __func__); return NULL; } @@ -583,6 +460,7 @@ static void *map_syscon_chipselects(struct udevice *bus) return fdtdec_get_number(cell + 1, 1) + regmap_get_range(regmap, 0); #else fdt_addr_t addr; + addr = devfdt_get_addr_index(bus, 2); return (addr == FDT_ADDR_T_NONE) ? NULL : map_physmem(addr, 0, MAP_NOCACHE); @@ -591,61 +469,47 @@ static void *map_syscon_chipselects(struct udevice *bus) static int ti_qspi_ofdata_to_platdata(struct udevice *bus) { - struct ti_qspi_priv *priv = dev_get_priv(bus); + struct ti_qspi_platdata *plat = bus->platdata; const void *blob = gd->fdt_blob; int node = dev_of_offset(bus); - priv->ctrl_mod_mmap = map_syscon_chipselects(bus); - priv->base = map_physmem(devfdt_get_addr(bus), + plat->fclk = dev_get_driver_data(bus); + plat->ctrl_mod_mmap = map_syscon_chipselects(bus); + plat->base = map_physmem(devfdt_get_addr(bus), sizeof(struct ti_qspi_regs), MAP_NOCACHE); - priv->memory_map = map_physmem(devfdt_get_addr_index(bus, 1), 0, + plat->memory_map = map_physmem(devfdt_get_addr_index(bus, 1), 0, MAP_NOCACHE); - priv->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", -1); - if (priv->max_hz < 0) { + plat->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", -1); + if (plat->max_hz < 0) { debug("Error: Max frequency missing\n"); return -ENODEV; } - priv->num_cs = fdtdec_get_int(blob, node, "num-cs", 4); + plat->num_cs = fdtdec_get_int(blob, node, "num-cs", 4); debug("%s: regs=<0x%x>, max-frequency=%d\n", __func__, - (int)priv->base, priv->max_hz); + (int)plat->base, plat->max_hz); return 0; } -static int ti_qspi_child_pre_probe(struct udevice *dev) -{ - struct spi_slave *slave = dev_get_parent_priv(dev); - struct udevice *bus = dev_get_parent(dev); - struct ti_qspi_priv *priv = dev_get_priv(bus); - - slave->memory_map = priv->memory_map; - return 0; -} - -static const struct dm_spi_ops ti_qspi_ops = { - .claim_bus = ti_qspi_claim_bus, - .release_bus = ti_qspi_release_bus, - .xfer = ti_qspi_xfer, - .set_speed = ti_qspi_set_speed, - .set_mode = ti_qspi_set_mode, -}; - static const struct udevice_id ti_qspi_ids[] = { { .compatible = "ti,dra7xxx-qspi", .data = QSPI_DRA7XX_FCLK}, { .compatible = "ti,am4372-qspi", .data = QSPI_FCLK}, { } }; +#endif U_BOOT_DRIVER(ti_qspi) = { .name = "ti_qspi", .id = UCLASS_SPI, +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .of_match = ti_qspi_ids, - .ops = &ti_qspi_ops, .ofdata_to_platdata = ti_qspi_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct ti_qspi_platdata), +#endif + .ops = &ti_qspi_ops, .priv_auto_alloc_size = sizeof(struct ti_qspi_priv), .probe = ti_qspi_probe, .child_pre_probe = ti_qspi_child_pre_probe, }; -#endif /* CONFIG_DM_SPI */ diff --git a/include/dm/platform_data/spi_ti_qspi.h b/include/dm/platform_data/spi_ti_qspi.h new file mode 100644 index 0000000000..3f5355284e --- /dev/null +++ b/include/dm/platform_data/spi_ti_qspi.h @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2018 Jagan Teki + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __spi_ti_qspi_h +#define __spi_ti_qspi_h + +struct ti_qspi_platdata { + struct ti_qspi_regs *base; + void *ctrl_mod_mmap; + ulong fclk; + void *memory_map; + uint max_hz; + u32 num_cs; +}; + +#endif /* __spi_ti_qspi_h */ From patchwork Tue Nov 20 12:47:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000448 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; 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Use short type names (uint etc.) to make them more readable. Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 8d6d86d2b0..0c77f95159 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -20,8 +20,7 @@ #define SPI_TIMEOUT 1000 -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) +struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode) { struct spi_slave *slave; @@ -68,17 +67,16 @@ int spi_claim_bus(struct spi_slave *slave) void spi_release_bus(struct spi_slave *slave) { - } -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) +int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, + ulong flags) { volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi; - unsigned int tmpdout, tmpdin, event; + uint tmpdout, tmpdin, event; int numBlks = DIV_ROUND_UP(bitlen, 32); int tm, isRead = 0; - unsigned char charSize = 32; + uchar charSize = 32; debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen); From patchwork Tue Nov 20 12:47:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000451 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="rQVPQ6xi"; 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Tue, 20 Nov 2018 04:48:50 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.48.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:48:49 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:47 +0530 Message-Id: <20181120124814.23293-8-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 07/34] spi: mpc8xxx: Fix comments X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six There are some comments on the same line as the code they document. Put comments above the code lines they document, so the line length is not unnecessarily increased. Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 0c77f95159..3016cfe2ca 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -53,11 +53,14 @@ void spi_init(void) * some registers */ spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN; - spi->mode = (spi->mode & 0xfff0ffff) | BIT(16); /* Use SYSCLK / 8 - (16.67MHz typ.) */ - spi->event = 0xffffffff; /* Clear all SPI events */ - spi->mask = 0x00000000; /* Mask all SPI interrupts */ - spi->com = 0; /* LST bit doesn't do anything, so disregard */ + /* Use SYSCLK / 8 (16.67MHz typ.) */ + spi->mode = (spi->mode & 0xfff0ffff) | BIT(16); + /* Clear all SPI events */ + spi->event = 0xffffffff; + /* Mask all SPI interrupts */ + spi->mask = 0x00000000; + /* LST bit doesn't do anything, so disregard */ + spi->com = 0; } int spi_claim_bus(struct spi_slave *slave) @@ -84,9 +87,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, if (flags & SPI_XFER_BEGIN) spi_cs_activate(slave); - spi->event = 0xffffffff; /* Clear all SPI events */ + /* Clear all SPI events */ + spi->event = 0xffffffff; - /* handle data in 32-bit chunks */ + /* Handle data in 32-bit chunks */ while (numBlks--) { tmpdout = 0; charSize = (bitlen >= 32 ? 32 : bitlen); @@ -120,7 +124,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, spi->mode |= SPI_MODE_EN; - spi->tx = tmpdout; /* Write the data out */ + /* Write the data out */ + spi->tx = tmpdout; + debug("*** spi_xfer: ... %08x written\n", tmpdout); /* From patchwork Tue Nov 20 12:47:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000452 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="extTxDzf"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zm1S5gGBz9s3x for ; Tue, 20 Nov 2018 23:56:44 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 72B1EC22084; Tue, 20 Nov 2018 12:52:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B01A7C220CF; Tue, 20 Nov 2018 12:49:25 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0B613C220D7; Tue, 20 Nov 2018 12:49:00 +0000 (UTC) Received: from mail-pl1-f194.google.com (mail-pl1-f194.google.com [209.85.214.194]) by lists.denx.de (Postfix) with ESMTPS id 7BFDBC2209A for ; Tue, 20 Nov 2018 12:48:54 +0000 (UTC) Received: by mail-pl1-f194.google.com with SMTP id s5-v6so953820plq.11 for ; Tue, 20 Nov 2018 04:48:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TXnmJXWzQZbceoQ13rsAItoSdwmGHt2K3HR8Es2Fhzs=; b=extTxDzfQQWYXXp34aEYg28lc32Zo+D3nDkRX7KHan3cOPRTHUwk6iiNaRMdGNmA6J GeVewa/jQRf8lOP2hcHhvCzjtz5vAIjpvCaR8V1xJJQxYiHC5SeLm78m6Oxt/Tn3VMBw aViSDE4Abpd2u/StX4l/luhKto6jiJhQWQo9U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TXnmJXWzQZbceoQ13rsAItoSdwmGHt2K3HR8Es2Fhzs=; b=o51jf6WLG8z2jAYDf66tKnNQ0OXxooiubGEzmKFJWdtR60uUa2KHk07J2IfCYGVb3c p187tVfZY6Cs79qkqdhCQPVhxCO5W2mEMIz4RJ1kx5AUJWwTmTxwYw6+v6fKaJOBCxNa ZVDkYPcW3LIN43IGN5UC7+BciO2EBfKo58hLLCznnIwSEFIHoIn8d7bG+tdAjIOgbGMB 7hXl5a+LFxSoFyTaW2666XP4irNNwOhGPkBqWSVNoc9h+VilmNF9oxnB1eDL95CTu0zW NMEpAs6CH7ZDWKqJYmwvVkvOx1MGH1O014yl9+bQqIIJt+bXDyqE7J3PbWDmlbd5hDdx hnuw== X-Gm-Message-State: AA+aEWZWA4WHT5ZpssmFUdeFd5ngAjen6Y0QC9vbfpPinYFthhLPS5On DeMDSTpstpHCsz2wi1MfXvncKKNA8z0= X-Google-Smtp-Source: AFSGD/U4uVWr2MNfLkQxtNhu3eWBpppWYfwp4+rK6aU/S2FHaLSJun6+0nd27SY+/OgE8ts9oPjHcw== X-Received: by 2002:a17:902:8d8f:: with SMTP id v15-v6mr2094046plo.98.1542718132925; Tue, 20 Nov 2018 04:48:52 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.48.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:48:52 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:48 +0530 Message-Id: <20181120124814.23293-9-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 08/34] spi: mpc8xxx: Rename camel-case variables X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six There are three variables that have camel-case names, which is not the preferred naming style. Give those variables more compliant names instead. Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 3016cfe2ca..0393765b6f 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -77,9 +77,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, { volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi; uint tmpdout, tmpdin, event; - int numBlks = DIV_ROUND_UP(bitlen, 32); - int tm, isRead = 0; - uchar charSize = 32; + int num_blks = DIV_ROUND_UP(bitlen, 32); + int tm, is_read = 0; + uchar char_size = 32; debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen); @@ -91,12 +91,12 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, spi->event = 0xffffffff; /* Handle data in 32-bit chunks */ - while (numBlks--) { + while (num_blks--) { tmpdout = 0; - charSize = (bitlen >= 32 ? 32 : bitlen); + char_size = (bitlen >= 32 ? 32 : bitlen); /* Shift data so it's msb-justified */ - tmpdout = *(u32 *) dout >> (32 - charSize); + tmpdout = *(u32 *) dout >> (32 - char_size); /* The LEN field of the SPMODE register is set as follows: * @@ -134,15 +134,15 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * or time out (1 second = 1000 ms) * The NE event must be read and cleared first */ - for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) { + for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) { event = spi->event; if (event & SPI_EV_NE) { tmpdin = spi->rx; spi->event |= SPI_EV_NE; - isRead = 1; + is_read = 1; - *(u32 *) din = (tmpdin << (32 - charSize)); - if (charSize == 32) { + *(u32 *) din = (tmpdin << (32 - char_size)); + if (char_size == 32) { /* Advance output buffer by 32 bits */ din += 4; } @@ -153,7 +153,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * in the future put an arbitrary delay after writing * the device. Arbitrary delays suck, though... */ - if (isRead && (event & SPI_EV_NF)) + if (is_read && (event & SPI_EV_NF)) break; } if (tm >= SPI_TIMEOUT) From patchwork Tue Nov 20 12:47:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000464 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="nnNWM1dy"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zm8H6DRCz9s7T for ; Wed, 21 Nov 2018 00:02:39 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 2BFADC220B7; Tue, 20 Nov 2018 12:52:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C9ACBC220CB; Tue, 20 Nov 2018 12:49:19 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 17BA3C220DB; Tue, 20 Nov 2018 12:49:06 +0000 (UTC) Received: from mail-pl1-f195.google.com (mail-pl1-f195.google.com [209.85.214.195]) by lists.denx.de (Postfix) with ESMTPS id 57A11C2208D for ; Tue, 20 Nov 2018 12:48:57 +0000 (UTC) Received: by mail-pl1-f195.google.com with SMTP id u6so955707plm.8 for ; Tue, 20 Nov 2018 04:48:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3htuolda1tctbiIjFrQItpUVWObxyyaNpBTNv3Hd9MU=; b=nnNWM1dyug92fzrC6Six2BbQUg5keWc/hyeCiZ0cMblxGGD1Z2xVYn+Mep0Hqr2r3O O6qyhnAfXyUyueDKjiGm9ONoPLKwYWFfKJZB2T90VYR2fZOJi8MkeoM/Pn3oAA1Fj5xE sC9+0pTMdOoVDyfXDFmoagS6h3yn6lMZ6i+kw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3htuolda1tctbiIjFrQItpUVWObxyyaNpBTNv3Hd9MU=; b=DGAWdjd6cVwRwBOtjMuJ6pseJaG+mjCQTFCP8sq7F00DPvfJh7H+sN4qOacbIEJF4q Z736nnwm0sQADWySbRHywnsyjS/ZLCVaHcrmeEsWnod89y8RD8yvCOL2FP3PyLJ0UH8x NiVUp72xU4c+olQr6rjPehFgNRUbyjj24N99DMhQv2bSU/39cQhNR+7ZfLJLWmJhAQHA vV7rY4QbdVuroExXiBZRB+UdKXNnPfE/67SeQaBLKa/2JCPGzE18Jp0uyfR9s40tChHW WZhe8lkogxchi0eZZPZ76GZVctjn1Dyisr6ksinZ5/O6X7hYMAk/XFhCIUzQ3TUP8ln7 +n/A== X-Gm-Message-State: AA+aEWYzxEQjHICLCst+KCdKTcXCtpxJPa/mr7FfnEY8+1Hhhhf/cd6G DP0yppVvyboli78BQ7TjQfZFeG9g0Ko= X-Google-Smtp-Source: AFSGD/VvySf8JDHiv14sk0fCKwYilcyujVBghYUTj2Fg0GwHXqZLa92piWIoohbEAECSbzbp9lfu5A== X-Received: by 2002:a17:902:e207:: with SMTP id ce7-v6mr2001229plb.47.1542718135567; Tue, 20 Nov 2018 04:48:55 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.48.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:48:55 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:49 +0530 Message-Id: <20181120124814.23293-10-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 09/34] spi: mpc8xxx: Fix space after cast X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six Fix all "superfluous space after case" style errors. Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 0393765b6f..1424e7febe 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -82,7 +82,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, uchar char_size = 32; debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", - slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen); + slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen); if (flags & SPI_XFER_BEGIN) spi_cs_activate(slave); @@ -96,7 +96,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, char_size = (bitlen >= 32 ? 32 : bitlen); /* Shift data so it's msb-justified */ - tmpdout = *(u32 *) dout >> (32 - char_size); + tmpdout = *(u32 *)dout >> (32 - char_size); /* The LEN field of the SPMODE register is set as follows: * @@ -141,7 +141,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, spi->event |= SPI_EV_NE; is_read = 1; - *(u32 *) din = (tmpdin << (32 - char_size)); + *(u32 *)din = (tmpdin << (32 - char_size)); if (char_size == 32) { /* Advance output buffer by 32 bits */ din += 4; From patchwork Tue Nov 20 12:47:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000450 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="My/OB0z5"; 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Tue, 20 Nov 2018 04:48:58 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.48.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:48:57 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:50 +0530 Message-Id: <20181120124814.23293-11-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 10/34] spi: mpc8xxx: Fix function names in strings X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six Replace the function name with a "%s" format string and the __func__ variable in debug statements (as proposed by checkpatch). Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 1424e7febe..91b639f1e6 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -81,7 +81,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, int tm, is_read = 0; uchar char_size = 32; - debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", + debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__, slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen); if (flags & SPI_XFER_BEGIN) @@ -127,7 +127,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, /* Write the data out */ spi->tx = tmpdout; - debug("*** spi_xfer: ... %08x written\n", tmpdout); + debug("*** %s: ... %08x written\n", __func__, tmpdout); /* * Wait for SPI transmit to get out @@ -157,9 +157,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, break; } if (tm >= SPI_TIMEOUT) - puts("*** spi_xfer: Time out during SPI transfer"); + debug("*** %s: Time out during SPI transfer\n", + __func__); - debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin); + debug("*** %s: transfer ended. Value=%08x\n", __func__, tmpdin); } if (flags & SPI_XFER_END) From patchwork Tue Nov 20 12:47:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000454 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="GMNTZIOZ"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zm2F275Hz9s3q for ; Tue, 20 Nov 2018 23:57:25 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id E70CFC2207E; Tue, 20 Nov 2018 12:53:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9F7BCC220EC; Tue, 20 Nov 2018 12:49:29 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C0CF3C220D5; Tue, 20 Nov 2018 12:49:19 +0000 (UTC) Received: from mail-pl1-f196.google.com (mail-pl1-f196.google.com [209.85.214.196]) by lists.denx.de (Postfix) with ESMTPS id 6BE04C220A5 for ; Tue, 20 Nov 2018 12:49:02 +0000 (UTC) Received: by mail-pl1-f196.google.com with SMTP id z23so973806plo.0 for ; Tue, 20 Nov 2018 04:49:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nSqHcrr6BR1bt08FkCONc5tzPnqtk3OYZmvPa2WM1jw=; b=GMNTZIOZqvCI3YuaECrBjdkqdlT9Zbl5op0y6Amhst1GoiZh9h4Gh5nJluVwcwuexg sZV7NHaX9q6d9+thGEXvszChvdlabnBhIKUq8x7sVC9Iz6XOgCrnV+tCt5QGKlwe2iox 2ZwXo12atSIUl4iWedyFlPeAoifLd7NEslpHk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nSqHcrr6BR1bt08FkCONc5tzPnqtk3OYZmvPa2WM1jw=; b=llI6G/7KVxE+pPwSJ6AyTbr43oSZx7v+vIqM4F2tBpHdVcd/rr66SbnLHK857HpcmW 0HSw36t8i/1tfs4c9hvkKYe20xAPtNgO7acmvPrghiLvXkW9KfNjmwfVbMv0ac5ezza1 s6KnfhcR6bfVLYZ7FENv88SHGWbKuUdJPOqR1nGKmArPqPy3YikJovBw48uhWfrwQjtd I6L5V21WUUnVit4Hw9vu/sleqE67BA4rH3pHz4ZoJT9s3VnyiLvFo9+8qrQawo7RcVmv aDkE5JklJ/qK3Ekyy+tN/k3RHyjFIBwKPqHT3GE12TLQ/hRs0TiCeDHjZJuT1fbLE5aS K7OA== X-Gm-Message-State: AA+aEWZD+KlqdMnCR+z47qEIUPdagXxP4CHIBGnXBMOaDVTiXHCz+DwR vCw3OtuHdryIk8FPMJS83fr3HEKcsi8= X-Google-Smtp-Source: AFSGD/VJqQhZcywmoGQyXckguuFgmlT2y0lUFcXy1j65B+6u/J7nwDqJ3LptXpXoVpTj2w12OyzsVA== X-Received: by 2002:a17:902:b181:: with SMTP id s1-v6mr2130669plr.51.1542718140846; Tue, 20 Nov 2018 04:49:00 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.48.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:00 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:51 +0530 Message-Id: <20181120124814.23293-12-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 11/34] spi: mpc8xxx: Replace defines with enums X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six Replace pre-processor defines with proper enums, and use the BIT macro where applicable. Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 91b639f1e6..7b2ab1e4af 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -10,13 +10,25 @@ #include #include -#define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */ -#define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */ - -#define SPI_MODE_LOOP (0x80000000 >> 1) /* Loopback mode */ -#define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */ -#define SPI_MODE_MS (0x80000000 >> 6) /* Always master */ -#define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */ +enum { + SPI_EV_NE = BIT(31 - 22), /* Receiver Not Empty */ + SPI_EV_NF = BIT(31 - 23), /* Transmitter Not Full */ +}; + +enum { + SPI_MODE_LOOP = BIT(31 - 1), /* Loopback mode */ + SPI_MODE_CI = BIT(31 - 2), /* Clock invert */ + SPI_MODE_CP = BIT(31 - 3), /* Clock phase */ + SPI_MODE_DIV16 = BIT(31 - 4), /* Divide clock source by 16 */ + SPI_MODE_REV = BIT(31 - 5), /* Reverse mode - MSB first */ + SPI_MODE_MS = BIT(31 - 6), /* Always master */ + SPI_MODE_EN = BIT(31 - 7), /* Enable interface */ + + SPI_MODE_LEN_MASK = 0xf00000, + SPI_MODE_PM_MASK = 0xf0000, + + SPI_COM_LST = BIT(31 - 9), +}; #define SPI_TIMEOUT 1000 From patchwork Tue Nov 20 12:47:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000455 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="oT0YJm6i"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zm2r2NSnz9s3x for ; Tue, 20 Nov 2018 23:57:56 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id D8E9DC2205D; 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Tue, 20 Nov 2018 04:49:03 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:02 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:52 +0530 Message-Id: <20181120124814.23293-13-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 12/34] spi: mpc8xxx: Use IO accessors X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six Accesses to the register map are currently done by directly reading and writing the structure. Switch to the appropriate IO accessors instead. Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 7b2ab1e4af..da9e1e3f98 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -58,21 +58,21 @@ void spi_free_slave(struct spi_slave *slave) void spi_init(void) { - volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi; + spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi; /* * SPI pins on the MPC83xx are not muxed, so all we do is initialize * some registers */ - spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN; + out_be32(&spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN); /* Use SYSCLK / 8 (16.67MHz typ.) */ - spi->mode = (spi->mode & 0xfff0ffff) | BIT(16); + clrsetbits_be32(&spi->mode, 0x000f0000, BIT(16)); /* Clear all SPI events */ - spi->event = 0xffffffff; + setbits_be32(&spi->event, 0xffffffff); /* Mask all SPI interrupts */ - spi->mask = 0x00000000; + clrbits_be32(&spi->mask, 0xffffffff); /* LST bit doesn't do anything, so disregard */ - spi->com = 0; + out_be32(&spi->com, 0); } int spi_claim_bus(struct spi_slave *slave) @@ -87,7 +87,7 @@ void spi_release_bus(struct spi_slave *slave) int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, ulong flags) { - volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi; + spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi; uint tmpdout, tmpdin, event; int num_blks = DIV_ROUND_UP(bitlen, 32); int tm, is_read = 0; @@ -100,7 +100,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, spi_cs_activate(slave); /* Clear all SPI events */ - spi->event = 0xffffffff; + setbits_be32(&spi->event, 0xffffffff); /* Handle data in 32-bit chunks */ while (num_blks--) { @@ -118,26 +118,26 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * len > 16 0 */ - spi->mode &= ~SPI_MODE_EN; + clrbits_be32(&spi->mode, SPI_MODE_EN); if (bitlen <= 16) { if (bitlen <= 4) - spi->mode = (spi->mode & 0xff0fffff) | - (3 << 20); + clrsetbits_be32(&spi->mode, 0x00f00000, + (3 << 20)); else - spi->mode = (spi->mode & 0xff0fffff) | - ((bitlen - 1) << 20); + clrsetbits_be32(&spi->mode, 0x00f00000, + ((bitlen - 1) << 20)); } else { - spi->mode = (spi->mode & 0xff0fffff); + clrbits_be32(&spi->mode, 0x00f00000); /* Set up the next iteration if sending > 32 bits */ bitlen -= 32; dout += 4; } - spi->mode |= SPI_MODE_EN; + setbits_be32(&spi->mode, SPI_MODE_EN); /* Write the data out */ - spi->tx = tmpdout; + out_be32(&spi->tx, tmpdout); debug("*** %s: ... %08x written\n", __func__, tmpdout); @@ -147,10 +147,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * The NE event must be read and cleared first */ for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) { - event = spi->event; + event = in_be32(&spi->event); if (event & SPI_EV_NE) { - tmpdin = spi->rx; - spi->event |= SPI_EV_NE; + tmpdin = in_be32(&spi->rx); + setbits_be32(&spi->event, SPI_EV_NE); is_read = 1; *(u32 *)din = (tmpdin << (32 - char_size)); From patchwork Tue Nov 20 12:47:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000474 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="kOBDcSkI"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zmDb0MMfz9s0n for ; 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Tue, 20 Nov 2018 04:49:06 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:05 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:53 +0530 Message-Id: <20181120124814.23293-14-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 13/34] spi: mpc8xxx: Simplify if X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six Instead of having a nested if block, just have two branches within the overarching if block to eliminate one nesting level. Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index da9e1e3f98..ca34570901 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -120,13 +120,11 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, clrbits_be32(&spi->mode, SPI_MODE_EN); - if (bitlen <= 16) { - if (bitlen <= 4) - clrsetbits_be32(&spi->mode, 0x00f00000, - (3 << 20)); - else - clrsetbits_be32(&spi->mode, 0x00f00000, - ((bitlen - 1) << 20)); + if (bitlen <= 4) { + clrsetbits_be32(&spi->mode, 0x00f00000, (3 << 20)); + } else if (bitlen <= 16) { + clrsetbits_be32(&spi->mode, 0x00f00000, + ((bitlen - 1) << 20)); } else { clrbits_be32(&spi->mode, 0x00f00000); /* Set up the next iteration if sending > 32 bits */ From patchwork Tue Nov 20 12:47:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000449 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index ca34570901..962ef710f8 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -90,7 +90,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi; uint tmpdout, tmpdin, event; int num_blks = DIV_ROUND_UP(bitlen, 32); - int tm, is_read = 0; + int tm; uchar char_size = 32; debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__, @@ -144,12 +144,14 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * or time out (1 second = 1000 ms) * The NE event must be read and cleared first */ - for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) { + for (tm = 0; tm < SPI_TIMEOUT; ++tm) { event = in_be32(&spi->event); - if (event & SPI_EV_NE) { + bool have_ne = event & SPI_EV_NE; + bool have_nf = event & SPI_EV_NF; + + if (have_ne) { tmpdin = in_be32(&spi->rx); setbits_be32(&spi->event, SPI_EV_NE); - is_read = 1; *(u32 *)din = (tmpdin << (32 - char_size)); if (char_size == 32) { @@ -163,7 +165,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * in the future put an arbitrary delay after writing * the device. Arbitrary delays suck, though... */ - if (is_read && (event & SPI_EV_NF)) + if (have_ne && have_nf) break; } if (tm >= SPI_TIMEOUT) From patchwork Tue Nov 20 12:47:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000458 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="flJFdQFp"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zm5W6KY7z9s3x for ; Wed, 21 Nov 2018 00:00:15 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 66FBCC22068; Tue, 20 Nov 2018 12:54:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 7E7AEC220DD; Tue, 20 Nov 2018 12:49:41 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 279C6C220A6; Tue, 20 Nov 2018 12:49:34 +0000 (UTC) Received: from mail-pg1-f194.google.com (mail-pg1-f194.google.com [209.85.215.194]) by lists.denx.de (Postfix) with ESMTPS id 48A83C22067 for ; Tue, 20 Nov 2018 12:49:12 +0000 (UTC) Received: by mail-pg1-f194.google.com with SMTP id g189so869889pgc.5 for ; Tue, 20 Nov 2018 04:49:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DTO6ewJO6LxtcHMlk6isa3AoPn6RhI6b3q543pvVwGE=; b=flJFdQFpRl/ykUPzdhnNcU9WgM8eCID87mzJDKHFxkHQ698NTAVdobvr8FIYi112z1 MLqbH5TrSv2fuL/M6GEijR0eYh5YUx4/ua1AQrQ5iQ1Z2mD+rm4NiwBBfhlQsfBJ+esw d+c4k/Xlhb9upejh0Bhbl96N/gsvtznkPMEAA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DTO6ewJO6LxtcHMlk6isa3AoPn6RhI6b3q543pvVwGE=; b=pfqypztzAh5e3K1Y5fQWMkKoeuCJvDl2u1i5f5jO9jPqCkgSsrZ4NCWoB8TejfN3xd mL3UXi2YRdJR6FaRaDfhDdMLHewp51N+sieYj02NaO3+QQQuDeIud/U2P5t7Iin5NmaY FXzy8gxAWZTRGdpTzjL8OOF3y7OhUFEyqmgveLXCdRQDqFVbMv9dKLRUUX3LWtWSbWpR RVykzCIUiCcnmLQF8GoWm1e4C0345NLY2WrukrM0Pg3ZdUaKAEdf1Z6xiPDQKWtgM8Ir c0hcdS4qpjcMkBpQV6t4eelsCIW9spCN26Ewm7TyAYSO2+POVOgrOaHLUKQ2FfFtVu2h aL4w== X-Gm-Message-State: AGRZ1gJ2hrEZzLjGE10u1bz/K85OkYlp1u7q3RZ0F/xMv0wuv+qmmJnU grR0NB+QZjeG27VNJO/RBYJNNSNVx+8= X-Google-Smtp-Source: AJdET5eilNT8yCiCjubgMr7BTU+2PBzr72ssTTEGN+kuJGY0whOgCTlRJyMQKRDOUSYizM3GHr1ZqA== X-Received: by 2002:a62:42d4:: with SMTP id h81mr1986881pfd.259.1542718150711; Tue, 20 Nov 2018 04:49:10 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:10 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:55 +0530 Message-Id: <20181120124814.23293-16-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 15/34] spi: mpc8xxx: Simplify logic a bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six We do nothing in the loop if the "not empty" event was not detected. To simplify the logic, check if this is the case, and skip the execution of the loop early to reduce the nesting level and flag checking. Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 962ef710f8..a2e698ea17 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -149,25 +149,28 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, bool have_ne = event & SPI_EV_NE; bool have_nf = event & SPI_EV_NF; - if (have_ne) { - tmpdin = in_be32(&spi->rx); - setbits_be32(&spi->event, SPI_EV_NE); - - *(u32 *)din = (tmpdin << (32 - char_size)); - if (char_size == 32) { - /* Advance output buffer by 32 bits */ - din += 4; - } + if (!have_ne) + continue; + + tmpdin = in_be32(&spi->rx); + setbits_be32(&spi->event, SPI_EV_NE); + + *(u32 *)din = (tmpdin << (32 - char_size)); + if (char_size == 32) { + /* Advance output buffer by 32 bits */ + din += 4; } + /* * Only bail when we've had both NE and NF events. * This will cause timeouts on RO devices, so maybe * in the future put an arbitrary delay after writing * the device. Arbitrary delays suck, though... */ - if (have_ne && have_nf) + if (have_nf) break; } + if (tm >= SPI_TIMEOUT) debug("*** %s: Time out during SPI transfer\n", __func__); From patchwork Tue Nov 20 12:47:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000469 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="AHuJcTLD"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zm9R642Yz9s3x for ; Wed, 21 Nov 2018 00:03:39 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 63BECC2208C; Tue, 20 Nov 2018 12:55:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B62DDC220EB; Tue, 20 Nov 2018 12:49:46 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id EF8AFC21FF3; Tue, 20 Nov 2018 12:49:35 +0000 (UTC) Received: from mail-pg1-f195.google.com (mail-pg1-f195.google.com [209.85.215.195]) by lists.denx.de (Postfix) with ESMTPS id B1B37C2205D for ; Tue, 20 Nov 2018 12:49:14 +0000 (UTC) Received: by mail-pg1-f195.google.com with SMTP id v28so858747pgk.10 for ; Tue, 20 Nov 2018 04:49:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=p2yOgWDOu2LU09nRm/oHIlXZTD47h62ToxLJhnnyR9E=; b=AHuJcTLDCKwyWKJmfwx5GhQBegqbFhaq0Ijdo5a/IqoCpKKJwpCLUoA+6nINAFLOtj zIw8n39ZZgdpMUApcN7TGSkzE33TYaHGa7hYc4Es9tIvmjWfxJTaulQ19F+Ar1Vaw/4/ sK2Enm0LR9/s0jB7YK7/do5BHCCwffWqvT7wc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=p2yOgWDOu2LU09nRm/oHIlXZTD47h62ToxLJhnnyR9E=; b=ibr7bJHZmbMe+HP5WVpHBSbwPTtltOlgABkwQmhMxTf2lcPvZbgXt9IKeX0kkL4gGr bRxKP4AndRsZSDAoU4pYfFoebY0vXL2HdnMyabVnz88k0QavGSRMWnpvcKMMz1nFxunD OEzvht2h8k5KDaAby4NDaVAdc956s+MS1k71DF5A/RczN3zfovY3T9lBhPLnKaW/cdKS fWjZgE/OknFNBoFQG/PnYaFpqFv0x0cHQUAUwv4ud+KgF9NtKCV+Hxsq6nrwO/g0iMvI vZEMEhtiiJXjS7haAhzsCDXgUacRtG8q8mrWp7MmGEVYBz9qT72iVCDEzpyCPtL2p4YV chNw== X-Gm-Message-State: AGRZ1gKrG+wYeErjVw3/JLwmfIvDtGgdgy/Yy8srHVOcNUwLTlgMi4CM E63NQZqNX/ZjLywZ1OPqpVmd89thMpU= X-Google-Smtp-Source: AJdET5do+hpLDykJmNJETQjRWTYY0bWD1hFVKmMWxg0zSU4fhyB6ln5jree/00g14e/Px+F/hsJcUA== X-Received: by 2002:a62:4549:: with SMTP id s70mr1978173pfa.233.1542718153160; Tue, 20 Nov 2018 04:49:13 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:12 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:56 +0530 Message-Id: <20181120124814.23293-17-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 16/34] spi: mpc8xxx: Reduce scope of loop variables X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six The transmission loop starts with setting some variables, which are only used inside the loop. Reduce the scope to the loop to make the declaration and initialization of these variables coincide. In the case of char_size this also always initializes the variable immediately with the final value actually used in the loop (instead of the placeholder value 32). Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index a2e698ea17..2a0f3cc06a 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -88,10 +88,8 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, ulong flags) { spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi; - uint tmpdout, tmpdin, event; + u32 tmpdin; int num_blks = DIV_ROUND_UP(bitlen, 32); - int tm; - uchar char_size = 32; debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__, slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen); @@ -104,8 +102,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, /* Handle data in 32-bit chunks */ while (num_blks--) { - tmpdout = 0; - char_size = (bitlen >= 32 ? 32 : bitlen); + int tm; + u32 tmpdout = 0; + uchar char_size = (bitlen >= 32 ? 32 : bitlen); /* Shift data so it's msb-justified */ tmpdout = *(u32 *)dout >> (32 - char_size); @@ -145,7 +144,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * The NE event must be read and cleared first */ for (tm = 0; tm < SPI_TIMEOUT; ++tm) { - event = in_be32(&spi->event); + u32 event = in_be32(&spi->event); bool have_ne = event & SPI_EV_NE; bool have_nf = event & SPI_EV_NF; From patchwork Tue Nov 20 12:47:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000468 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; 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Tue, 20 Nov 2018 04:49:15 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:15 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:57 +0530 Message-Id: <20181120124814.23293-18-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 17/34] spi: mpc8xxx: Make code more readable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six Introduce the to_prescale_mod and set_char_len inline functions to make the code more readable. Note that the added "if (bitlen > 16)" check does not change the semantics of the current code, and hence only preserves the current error (this will be fixed in a later patch in the series). Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 2a0f3cc06a..83fd8b3cc1 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -30,6 +30,16 @@ enum { SPI_COM_LST = BIT(31 - 9), }; +static inline u32 to_prescale_mod(u32 val) +{ + return (min(val, (u32)15) << 16); +} + +static void set_char_len(spi8xxx_t *spi, u32 val) +{ + clrsetbits_be32(&spi->mode, SPI_MODE_LEN_MASK, (val << 20)); +} + #define SPI_TIMEOUT 1000 struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode) @@ -66,7 +76,7 @@ void spi_init(void) */ out_be32(&spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN); /* Use SYSCLK / 8 (16.67MHz typ.) */ - clrsetbits_be32(&spi->mode, 0x000f0000, BIT(16)); + clrsetbits_be32(&spi->mode, SPI_MODE_PM_MASK, to_prescale_mod(1)); /* Clear all SPI events */ setbits_be32(&spi->event, 0xffffffff); /* Mask all SPI interrupts */ @@ -119,13 +129,14 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, clrbits_be32(&spi->mode, SPI_MODE_EN); - if (bitlen <= 4) { - clrsetbits_be32(&spi->mode, 0x00f00000, (3 << 20)); - } else if (bitlen <= 16) { - clrsetbits_be32(&spi->mode, 0x00f00000, - ((bitlen - 1) << 20)); - } else { - clrbits_be32(&spi->mode, 0x00f00000); + if (bitlen <= 4) + set_char_len(spi, 3); + else if (bitlen <= 16) + set_char_len(spi, bitlen - 1); + else + set_char_len(spi, 0); + + if (bitlen > 16) { /* Set up the next iteration if sending > 32 bits */ bitlen -= 32; dout += 4; From patchwork Tue Nov 20 12:47:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000475 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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bh=DvxOHgjATfWl2XuOb3BuIsm23gd4oYcGplmjAwTQIp8=; b=DQ3aUAilG7c83PsQdPyEBz//U/vlt9LHjx7ojax/kCmHGMrWpfH2w3brGae1QfAR60 vQC7TlR2XaYvXjM4zApYHnFKq41Q+5xguoLN+q3Vrh0lAxaXqr2ic+PTyNzyFIxOpOZf /wNvNMk/udrepA/phKbRRQFLCaodloPqm7Tpf3hOn3RS0vEPHCJvOQiqK1QHYz4P7LE5 Yr3gcprLm/ry03ha0GTLDUAyKE/zBScAdpo3SDMoA1JUZYoF2N4hU7Z/04TcOcy2mRf3 7WolKE5ZeL7DVwhUjmlPg6uJEKS2PC8mMUsUOFj0wfiTdikqf+4QwXhKkMpfbvQrGr7V NNRw== X-Gm-Message-State: AA+aEWZX0FBBWfn0FCJERIDlvjckdnoh2dcF+258aNwhCJN1UcSLFfiZ BNdKMOPmg/7h73t9i5Xx4U8dk3rNS4A= X-Google-Smtp-Source: AFSGD/XPNpsR+1pfX1/0HFlG43NGgQLPE5w1EsXu7qwfTWkBDTMmbe7Jkq15h+flasmE8hTWrdX87w== X-Received: by 2002:a17:902:4401:: with SMTP id k1mr2082962pld.307.1542718158190; Tue, 20 Nov 2018 04:49:18 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:17 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:58 +0530 Message-Id: <20181120124814.23293-19-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 18/34] spi: mpc8xxx: Rename variable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six The variable "char_size" holds the number of bits to be transferred in the current loop iteration. A better name would be "xfer_bitlen", which we rename this variable to. Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 83fd8b3cc1..63d956a295 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -114,10 +114,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, while (num_blks--) { int tm; u32 tmpdout = 0; - uchar char_size = (bitlen >= 32 ? 32 : bitlen); + uchar xfer_bitlen = (bitlen >= 32 ? 32 : bitlen); /* Shift data so it's msb-justified */ - tmpdout = *(u32 *)dout >> (32 - char_size); + tmpdout = *(u32 *)dout >> (32 - xfer_bitlen); /* The LEN field of the SPMODE register is set as follows: * @@ -165,8 +165,8 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, tmpdin = in_be32(&spi->rx); setbits_be32(&spi->event, SPI_EV_NE); - *(u32 *)din = (tmpdin << (32 - char_size)); - if (char_size == 32) { + *(u32 *)din = (tmpdin << (32 - xfer_bitlen)); + if (xfer_bitlen == 32) { /* Advance output buffer by 32 bits */ din += 4; } From patchwork Tue Nov 20 12:47:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000470 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="rKs0VaAq"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zmB93xKXz9s0n for ; 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Tue, 20 Nov 2018 04:49:20 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:20 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:17:59 +0530 Message-Id: <20181120124814.23293-20-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 19/34] spi: mpc8xxx: Document LEN setting better X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six Instead of having a table right before the code implementing the length setting for documentation, have inline comments for the if branches actually implementing the length setting described table's entries (which is readable thanks to the set_char_len function). Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 63d956a295..1dd5bd9799 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -119,21 +119,15 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, /* Shift data so it's msb-justified */ tmpdout = *(u32 *)dout >> (32 - xfer_bitlen); - /* The LEN field of the SPMODE register is set as follows: - * - * Bit length setting - * len <= 4 3 - * 4 < len <= 16 len - 1 - * len > 16 0 - */ - clrbits_be32(&spi->mode, SPI_MODE_EN); - if (bitlen <= 4) + /* Set up length for this transfer */ + + if (bitlen <= 4) /* 4 bits or less */ set_char_len(spi, 3); - else if (bitlen <= 16) + else if (bitlen <= 16) /* at most 16 bits */ set_char_len(spi, bitlen - 1); - else + else /* more than 16 bits -> full 32 bit transfer */ set_char_len(spi, 0); if (bitlen > 16) { From patchwork Tue Nov 20 12:48:00 2018 Content-Type: text/plain; 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Tue, 20 Nov 2018 04:49:23 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:22 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:00 +0530 Message-Id: <20181120124814.23293-21-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 20/34] spi: mpc8xxx: Re-order transfer setup X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six Minize the time the adapter is disabled (via SPI_MODE_EN clearing/setting) to just the character length setting, and only set up the temporary data writing variable right before we need it, so there is a more clear distinction between setting up the SPI adapter, and setting up the data to be written. Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 1dd5bd9799..1e7c0144c2 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -116,9 +116,6 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, u32 tmpdout = 0; uchar xfer_bitlen = (bitlen >= 32 ? 32 : bitlen); - /* Shift data so it's msb-justified */ - tmpdout = *(u32 *)dout >> (32 - xfer_bitlen); - clrbits_be32(&spi->mode, SPI_MODE_EN); /* Set up length for this transfer */ @@ -130,14 +127,17 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, else /* more than 16 bits -> full 32 bit transfer */ set_char_len(spi, 0); + setbits_be32(&spi->mode, SPI_MODE_EN); + + /* Shift data so it's msb-justified */ + tmpdout = *(u32 *)dout >> (32 - xfer_bitlen); + if (bitlen > 16) { /* Set up the next iteration if sending > 32 bits */ bitlen -= 32; dout += 4; } - setbits_be32(&spi->mode, SPI_MODE_EN); - /* Write the data out */ out_be32(&spi->tx, tmpdout); From patchwork Tue Nov 20 12:48:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000467 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="SXJ0Yplh"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zm9G4gn5z9s3q for ; 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Tue, 20 Nov 2018 04:49:31 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:25 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:01 +0530 Message-Id: <20181120124814.23293-22-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 21/34] spi: mpc8xxx: Fix if check X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six Decreasing the bit length and increasing the write data pointer should be done when there are more than 32 bit of data, not 16 bit. This did not produce incorrect behavior, because the only time where the two checks produce different outcomes is the case of 16 < bitlen < 32, and in this case the subsequent transmission is the last one regardless, hence the additional bit length decrease and write data pointer increase has no effect anyway. Still, the correct check is the check for "bitlen > 32", so correct this behavior. Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 1e7c0144c2..e09e91c8e9 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -132,7 +132,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, /* Shift data so it's msb-justified */ tmpdout = *(u32 *)dout >> (32 - xfer_bitlen); - if (bitlen > 16) { + if (bitlen > 32) { /* Set up the next iteration if sending > 32 bits */ bitlen -= 32; dout += 4; From patchwork Tue Nov 20 12:48:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000461 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="W4j77A0K"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zm6w0nkrz9s7T for ; Wed, 21 Nov 2018 00:01:28 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id AE4A8C22087; Tue, 20 Nov 2018 12:58:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 7A8CCC22096; Tue, 20 Nov 2018 12:50:21 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id BE1E9C220FB; Tue, 20 Nov 2018 12:49:46 +0000 (UTC) Received: from mail-pl1-f196.google.com (mail-pl1-f196.google.com [209.85.214.196]) by lists.denx.de (Postfix) with ESMTPS id 4F62CC220B8 for ; Tue, 20 Nov 2018 12:49:36 +0000 (UTC) Received: by mail-pl1-f196.google.com with SMTP id z23so974493plo.0 for ; Tue, 20 Nov 2018 04:49:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IgaR4FUCQnO0Df8jzFpeiy0ayqG5b2rwTivOAhw7crw=; b=W4j77A0KOx4tWBgWky/P5xFUB88YEhdufPs0eYMC3R8Ohb2LrlV6Q/KAqhGtKmq7Tg 4XA10peDzDtwqcaJaVzd3GD3QMn6SYT562Tu2JKhl9Zo8DmT5AORMB5juPHp1TiyIduG dmYfRc0sBv5YS0UJcuCR7V9fQY1MKjSIK9iWc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IgaR4FUCQnO0Df8jzFpeiy0ayqG5b2rwTivOAhw7crw=; b=sypFN1pejfkEv5UTHM66IJXt7fWxg1yDSPosAviBeec8EFu5j8wIWfS1EGzg5cNPWn A0QX60gQL+mL8l0zTmbEP+HCtQhY85bTWDFFZQZ7JzjQ9ic1c6U7OHQcGEq/FnSaqL4q Bdzh8ej3h3pGT9Qoq4wa1ipFZ7WcsEJU9q8OKahtsCNldglJQMSO+8yB+knsW+PfShA5 woFxLGeNdTG2QYEeVdiMXtmhr8bR9DtRrNJK0WgK5eX8JikH+TTIBtjzqrro8uR1lGHx erP9zf8lK/z7aHbAdix53S+QcH+0wbovMKqgkmlZ4qiFeWhuV/cectKJ8lrQNjTxSHjX uidA== X-Gm-Message-State: AA+aEWZPLNczBbK8LcGGMbyyHs+/XmhOjet1z3TCHSUgmDZW0kwA1vxn nmRhhfHws0JyxGhgN5HwDkEqOBmhKUs= X-Google-Smtp-Source: AFSGD/VM7aQBVVh96gHfMr0GjTM5mkxJJ+2GOGWCERc/6erOG6iPQ20x0kH7AzXU7bS5Fw9Z6VcWUQ== X-Received: by 2002:a17:902:8d8f:: with SMTP id v15-v6mr2096299plo.98.1542718174770; Tue, 20 Nov 2018 04:49:34 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:34 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:02 +0530 Message-Id: <20181120124814.23293-23-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 22/34] spi: mpc8xxx: Use get_timer X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six The comment before the transmission loop in conjunction with the definition of SPI_TIMEOUT as 1000 implies that the loop is supposed to have a timeout value of 1000 ms. But since there is no mdelay(1) or similar in the loop body, the loop just runs 1000 times, without regard for the time elapsed. To correct this, use the standard get_timer functionality to properly time out the loop after 1000 ms. Signed-off-by: Mario Six --- drivers/spi/mpc8xxx_spi.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index e09e91c8e9..63e1a150f8 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -112,9 +112,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, /* Handle data in 32-bit chunks */ while (num_blks--) { - int tm; u32 tmpdout = 0; uchar xfer_bitlen = (bitlen >= 32 ? 32 : bitlen); + ulong start; clrbits_be32(&spi->mode, SPI_MODE_EN); @@ -148,7 +148,8 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * or time out (1 second = 1000 ms) * The NE event must be read and cleared first */ - for (tm = 0; tm < SPI_TIMEOUT; ++tm) { + start = get_timer(0); + do { u32 event = in_be32(&spi->event); bool have_ne = event & SPI_EV_NE; bool have_nf = event & SPI_EV_NF; @@ -173,9 +174,11 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, */ if (have_nf) break; - } - if (tm >= SPI_TIMEOUT) + mdelay(1); + } while (get_timer(start) < SPI_TIMEOUT); + + if (get_timer(start) >= SPI_TIMEOUT) debug("*** %s: Time out during SPI transfer\n", __func__); From patchwork Tue Nov 20 12:48:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000476 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="VTi9xhQV"; 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Tue, 20 Nov 2018 04:49:37 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:37 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:03 +0530 Message-Id: <20181120124814.23293-24-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 23/34] spi: mpc8xxx: Convert to DM X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mario Six Support DM in the MPC8xxx SPI driver, and remove the legacy SPI interface. Signed-off-by: Mario Six [jagan: build for board which doesn't enable DM_SPI] Signed-off-by: Jagan Teki --- Makefile | 3 +- drivers/spi/Makefile | 2 +- drivers/spi/mpc8xxx_spi.c | 144 ++++++++++++++++++++++++++++---------- drivers/spi/spi.c | 1 + 4 files changed, 111 insertions(+), 39 deletions(-) diff --git a/Makefile b/Makefile index efa68e7343..7c1d934493 100644 --- a/Makefile +++ b/Makefile @@ -919,7 +919,8 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) @echo "====================================================" endif ifeq ($(CONFIG_DM_SPI),) -ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) $(CONFIG_TI_QSPI),y),y) +ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) $(CONFIG_MPC8XXX_SPI) \ + $(CONFIG_TI_QSPI),y),y) @echo "===================== WARNING ======================" @echo "This board uses SPI driver from drivers/spi/ without" @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 748d9a90ab..19aa95b2ca 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -8,6 +8,7 @@ ifdef CONFIG_DM_SPI obj-y += spi-uclass.o obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o +obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o @@ -33,7 +34,6 @@ obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o obj-$(CONFIG_ICH_SPI) += ich.o obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o -obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o obj-$(CONFIG_MT7621_SPI) += mt7621_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o obj-$(CONFIG_MXC_SPI) += mxc_spi.o diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 63e1a150f8..1c7bf10f91 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -5,10 +5,12 @@ */ #include - +#include +#include #include #include #include +#include enum { SPI_EV_NE = BIT(31 - 22), /* Receiver Not Empty */ @@ -30,6 +32,12 @@ enum { SPI_COM_LST = BIT(31 - 9), }; +struct mpc8xxx_priv { + spi8xxx_t *spi; + struct gpio_desc gpios[16]; + int max_cs; +}; + static inline u32 to_prescale_mod(u32 val) { return (min(val, (u32)15) << 16); @@ -42,70 +50,90 @@ static void set_char_len(spi8xxx_t *spi, u32 val) #define SPI_TIMEOUT 1000 -struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode) +static int __spi_set_speed(spi8xxx_t *spi, uint speed) { - struct spi_slave *slave; + /* TODO(mario.six@gdsys.cc): This only ever sets one fixed speed */ - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - slave = spi_alloc_slave_base(bus, cs); - if (!slave) - return NULL; - - /* - * TODO: Some of the code in spi_init() should probably move - * here, or into spi_claim_bus() below. - */ + /* Use SYSCLK / 8 (16.67MHz typ.) */ + clrsetbits_be32(&spi->mode, SPI_MODE_PM_MASK, to_prescale_mod(1)); - return slave; + return 0; } -void spi_free_slave(struct spi_slave *slave) +static int mpc8xxx_spi_ofdata_to_platdata(struct udevice *dev) { - free(slave); + struct mpc8xxx_priv *priv = dev_get_priv(dev); + int ret; + + priv->spi = (spi8xxx_t *)dev_read_addr(dev); + + /* TODO(mario.six@gdsys.cc): Read clock and save the value */ + + ret = gpio_request_list_by_name(dev, "gpios", priv->gpios, + ARRAY_SIZE(priv->gpios), GPIOD_IS_OUT | GPIOD_ACTIVE_LOW); + if (ret < 0) + return -EINVAL; + + priv->max_cs = ret; + + return 0; } -void spi_init(void) +static int mpc8xxx_spi_probe(struct udevice *dev) { - spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi; + struct mpc8xxx_priv *priv = dev_get_priv(dev); /* * SPI pins on the MPC83xx are not muxed, so all we do is initialize * some registers */ - out_be32(&spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN); - /* Use SYSCLK / 8 (16.67MHz typ.) */ - clrsetbits_be32(&spi->mode, SPI_MODE_PM_MASK, to_prescale_mod(1)); + out_be32(&priv->spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN); + + __spi_set_speed(priv->spi, 16666667); + /* Clear all SPI events */ - setbits_be32(&spi->event, 0xffffffff); + setbits_be32(&priv->spi->event, 0xffffffff); /* Mask all SPI interrupts */ - clrbits_be32(&spi->mask, 0xffffffff); + clrbits_be32(&priv->spi->mask, 0xffffffff); /* LST bit doesn't do anything, so disregard */ - out_be32(&spi->com, 0); + out_be32(&priv->spi->com, 0); + + return 0; } -int spi_claim_bus(struct spi_slave *slave) +static void mpc8xxx_spi_cs_activate(struct udevice *dev) { - return 0; + struct mpc8xxx_priv *priv = dev_get_priv(dev->parent); + struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev); + + dm_gpio_set_dir_flags(&priv->gpios[platdata->cs], GPIOD_IS_OUT); + dm_gpio_set_value(&priv->gpios[platdata->cs], 0); } -void spi_release_bus(struct spi_slave *slave) +static void mpc8xxx_spi_cs_deactivate(struct udevice *dev) { + struct mpc8xxx_priv *priv = dev_get_priv(dev->parent); + struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev); + + dm_gpio_set_dir_flags(&priv->gpios[platdata->cs], GPIOD_IS_OUT); + dm_gpio_set_value(&priv->gpios[platdata->cs], 1); } -int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, - ulong flags) +static int mpc8xxx_spi_xfer(struct udevice *dev, uint bitlen, + const void *dout, void *din, ulong flags) { - spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi; - u32 tmpdin; + struct udevice *bus = dev->parent; + struct mpc8xxx_priv *priv = dev_get_priv(bus); + spi8xxx_t *spi = priv->spi; + struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev); + u32 tmpdin = 0; int num_blks = DIV_ROUND_UP(bitlen, 32); - debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__, - slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen); + debug("%s: slave %s:%u dout %08X din %08X bitlen %u\n", __func__, + bus->name, platdata->cs, *(uint *)dout, *(uint *)din, bitlen); if (flags & SPI_XFER_BEGIN) - spi_cs_activate(slave); + mpc8xxx_spi_cs_activate(dev); /* Clear all SPI events */ setbits_be32(&spi->event, 0xffffffff); @@ -178,15 +206,57 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, mdelay(1); } while (get_timer(start) < SPI_TIMEOUT); - if (get_timer(start) >= SPI_TIMEOUT) + if (get_timer(start) >= SPI_TIMEOUT) { debug("*** %s: Time out during SPI transfer\n", __func__); + return -ETIMEDOUT; + } debug("*** %s: transfer ended. Value=%08x\n", __func__, tmpdin); } if (flags & SPI_XFER_END) - spi_cs_deactivate(slave); + mpc8xxx_spi_cs_deactivate(dev); + + return 0; +} + +static int mpc8xxx_spi_set_speed(struct udevice *dev, uint speed) +{ + struct mpc8xxx_priv *priv = dev_get_priv(dev); + + return __spi_set_speed(priv->spi, speed); +} +static int mpc8xxx_spi_set_mode(struct udevice *dev, uint mode) +{ + /* TODO(mario.six@gdsys.cc): Using SPI_CPHA (for clock phase) and + * SPI_CPOL (for clock polarity) should work + */ return 0; } + +static const struct dm_spi_ops mpc8xxx_spi_ops = { + .xfer = mpc8xxx_spi_xfer, + .set_speed = mpc8xxx_spi_set_speed, + .set_mode = mpc8xxx_spi_set_mode, + /* + * cs_info is not needed, since we require all chip selects to be + * in the device tree explicitly + */ +}; + +static const struct udevice_id mpc8xxx_spi_ids[] = { + { .compatible = "fsl,spi" }, + { } +}; + +U_BOOT_DRIVER(mpc8xxx_spi) = { + .name = "mpc8xxx_spi", + .id = UCLASS_SPI, + .of_match = mpc8xxx_spi_ids, + .ops = &mpc8xxx_spi_ops, + .ofdata_to_platdata = mpc8xxx_spi_ofdata_to_platdata, + .probe = mpc8xxx_spi_probe, + .priv_auto_alloc_size = sizeof(struct mpc8xxx_priv), +}; diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 500853fc95..8116193d27 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -42,6 +42,7 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus, #if !defined(CONFIG_DM_SPI) && \ defined(CONFIG_DAVINCI_SPI) || \ defined(CONFIG_KIRKWOOD_SPI) || \ + defined(CONFIG_MPC8XXX_SPI) || \ defined(CONFIG_TI_QSPI) void spi_cs_activate(struct spi_slave *slave) { From patchwork Tue Nov 20 12:48:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000482 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) 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(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:39 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:04 +0530 Message-Id: <20181120124814.23293-25-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 24/34] spi: Zap cf_spi driver-related code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Dropped - cf_espi driver - SPI, SPI flash CONFIG-items - CMD_SPI, CMD_SF..etc Dropped becuase - no active usage - no dm conversion - driver-model migration expiry Signed-off-by: Jagan Teki --- configs/M52277EVB_defconfig | 6 - configs/M52277EVB_stmicro_defconfig | 7 - configs/M54418TWR_defconfig | 7 - configs/M54418TWR_nand_mii_defconfig | 6 - configs/M54418TWR_nand_rmii_defconfig | 6 - configs/M54418TWR_nand_rmii_lowfreq_defconfig | 6 - configs/M54418TWR_serial_mii_defconfig | 7 - configs/M54418TWR_serial_rmii_defconfig | 7 - configs/M54451EVB_defconfig | 6 - configs/M54451EVB_stmicro_defconfig | 7 - configs/M54455EVB_a66_defconfig | 6 - configs/M54455EVB_defconfig | 6 - configs/M54455EVB_i66_defconfig | 6 - configs/M54455EVB_intel_defconfig | 6 - configs/M54455EVB_stm33_defconfig | 7 - configs/stmark2_defconfig | 8 - drivers/spi/Kconfig | 6 - drivers/spi/Makefile | 1 - drivers/spi/cf_spi.c | 335 ------------------ 19 files changed, 446 deletions(-) delete mode 100644 drivers/spi/cf_spi.c diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig index efa5e7102b..4cfde17e50 100644 --- a/configs/M52277EVB_defconfig +++ b/configs/M52277EVB_defconfig @@ -9,8 +9,6 @@ CONFIG_BOOTDELAY=3 CONFIG_SYS_PROMPT="-> " CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y @@ -22,7 +20,3 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig index 3628729a48..362ede7458 100644 --- a/configs/M52277EVB_stmicro_defconfig +++ b/configs/M52277EVB_stmicro_defconfig @@ -8,20 +8,13 @@ CONFIG_BOOTDELAY=3 # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_CMD_JFFS2=y -CONFIG_ENV_IS_IN_SPI_FLASH=y # CONFIG_NET is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig index f69f405d5a..6632d03736 100644 --- a/configs/M54418TWR_defconfig +++ b/configs/M54418TWR_defconfig @@ -12,16 +12,9 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_ATMEL=y CONFIG_MII=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_nand_mii_defconfig b/configs/M54418TWR_nand_mii_defconfig index 04ca3a8114..b15fe3093a 100644 --- a/configs/M54418TWR_nand_mii_defconfig +++ b/configs/M54418TWR_nand_mii_defconfig @@ -12,15 +12,9 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_ATMEL=y CONFIG_MII=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_nand_rmii_defconfig b/configs/M54418TWR_nand_rmii_defconfig index f6acf6019d..59a37c7c22 100644 --- a/configs/M54418TWR_nand_rmii_defconfig +++ b/configs/M54418TWR_nand_rmii_defconfig @@ -12,15 +12,9 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_ATMEL=y CONFIG_MII=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig b/configs/M54418TWR_nand_rmii_lowfreq_defconfig index 6b631d6d4b..5dce1ddfac 100644 --- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig +++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig @@ -12,15 +12,9 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_ATMEL=y CONFIG_MII=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig index b2266a0577..42389a7151 100644 --- a/configs/M54418TWR_serial_mii_defconfig +++ b/configs/M54418TWR_serial_mii_defconfig @@ -12,16 +12,9 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_ATMEL=y CONFIG_MII=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig index f69f405d5a..6632d03736 100644 --- a/configs/M54418TWR_serial_rmii_defconfig +++ b/configs/M54418TWR_serial_rmii_defconfig @@ -12,16 +12,9 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_ATMEL=y CONFIG_MII=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig index 8448b6cfbf..e19174583f 100644 --- a/configs/M54451EVB_defconfig +++ b/configs/M54451EVB_defconfig @@ -12,8 +12,6 @@ CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y @@ -26,8 +24,4 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig index ce5f65666c..af1c356697 100644 --- a/configs/M54451EVB_stmicro_defconfig +++ b/configs/M54451EVB_stmicro_defconfig @@ -11,22 +11,15 @@ CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y -CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig index f9be1c3773..fa3971b798 100644 --- a/configs/M54455EVB_a66_defconfig +++ b/configs/M54455EVB_a66_defconfig @@ -12,8 +12,6 @@ CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y @@ -30,8 +28,4 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig index abb69a966a..ea715f33f6 100644 --- a/configs/M54455EVB_defconfig +++ b/configs/M54455EVB_defconfig @@ -13,8 +13,6 @@ CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y @@ -31,8 +29,4 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig index 6050df5d51..0aecf69e74 100644 --- a/configs/M54455EVB_i66_defconfig +++ b/configs/M54455EVB_i66_defconfig @@ -12,8 +12,6 @@ CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y @@ -30,8 +28,4 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig index 686c00e318..2f2b793c22 100644 --- a/configs/M54455EVB_intel_defconfig +++ b/configs/M54455EVB_intel_defconfig @@ -12,8 +12,6 @@ CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y @@ -30,8 +28,4 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig index fc19de50d1..f8d8c79e2a 100644 --- a/configs/M54455EVB_stm33_defconfig +++ b/configs/M54455EVB_stm33_defconfig @@ -12,8 +12,6 @@ CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y @@ -24,14 +22,9 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_JFFS2=y CONFIG_ISO_PARTITION=y -CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y -CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig index 48e851d4a4..53997bb58f 100644 --- a/configs/stmark2_defconfig +++ b/configs/stmark2_defconfig @@ -12,19 +12,11 @@ CONFIG_SYS_PROMPT="stmark2 $ " # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=spi-flash.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:1m(u-boot),7m(kernel),-(rootfs)" -CONFIG_ENV_IS_IN_SPI_FLASH=y # CONFIG_NET is not set CONFIG_MTD_DEVICE=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_ISSI=y -CONFIG_SPI_FLASH_MTD=y -CONFIG_SPI=y -CONFIG_CF_SPI=y CONFIG_REGEX=y diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 516188ea88..1f37f1083d 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -273,12 +273,6 @@ config SOFT_SPI Enable Soft SPI driver. This driver is to use GPIO simulate the SPI protocol. -config CF_SPI - bool "ColdFire SPI driver" - help - Enable the ColdFire SPI driver. This driver can be used on - some m68k SoCs. - config FSL_ESPI bool "Freescale eSPI driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 19aa95b2ca..890e919f49 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -25,7 +25,6 @@ obj-$(CONFIG_BCM63XX_HSSPI) += bcm63xx_hsspi.o obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o -obj-$(CONFIG_CF_SPI) += cf_spi.o obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o diff --git a/drivers/spi/cf_spi.c b/drivers/spi/cf_spi.c deleted file mode 100644 index 522631cbbf..0000000000 --- a/drivers/spi/cf_spi.c +++ /dev/null @@ -1,335 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Copyright (C) 2004-2009 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -#include -#include -#include -#include - -struct cf_spi_slave { - struct spi_slave slave; - uint baudrate; - int charbit; -}; - -extern void cfspi_port_conf(void); -extern int cfspi_claim_bus(uint bus, uint cs); -extern void cfspi_release_bus(uint bus, uint cs); - -DECLARE_GLOBAL_DATA_PTR; - -#ifndef CONFIG_SPI_IDLE_VAL -#if defined(CONFIG_SPI_MMC) -#define CONFIG_SPI_IDLE_VAL 0xFFFF -#else -#define CONFIG_SPI_IDLE_VAL 0x0 -#endif -#endif - -#if defined(CONFIG_CF_DSPI) -/* DSPI specific mode */ -#define SPI_MODE_MOD 0x00200000 -#define SPI_DBLRATE 0x00100000 - -static inline struct cf_spi_slave *to_cf_spi_slave(struct spi_slave *slave) -{ - return container_of(slave, struct cf_spi_slave, slave); -} - -static void cfspi_init(void) -{ - volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI; - - cfspi_port_conf(); /* port configuration */ - - dspi->mcr = DSPI_MCR_MSTR | DSPI_MCR_CSIS7 | DSPI_MCR_CSIS6 | - DSPI_MCR_CSIS5 | DSPI_MCR_CSIS4 | DSPI_MCR_CSIS3 | - DSPI_MCR_CSIS2 | DSPI_MCR_CSIS1 | DSPI_MCR_CSIS0 | - DSPI_MCR_CRXF | DSPI_MCR_CTXF; - - /* Default setting in platform configuration */ -#ifdef CONFIG_SYS_DSPI_CTAR0 - dspi->ctar[0] = CONFIG_SYS_DSPI_CTAR0; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR1 - dspi->ctar[1] = CONFIG_SYS_DSPI_CTAR1; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR2 - dspi->ctar[2] = CONFIG_SYS_DSPI_CTAR2; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR3 - dspi->ctar[3] = CONFIG_SYS_DSPI_CTAR3; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR4 - dspi->ctar[4] = CONFIG_SYS_DSPI_CTAR4; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR5 - dspi->ctar[5] = CONFIG_SYS_DSPI_CTAR5; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR6 - dspi->ctar[6] = CONFIG_SYS_DSPI_CTAR6; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR7 - dspi->ctar[7] = CONFIG_SYS_DSPI_CTAR7; -#endif -} - -static void cfspi_tx(u32 ctrl, u16 data) -{ - volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI; - - while ((dspi->sr & 0x0000F000) >= 4) ; - - dspi->tfr = (ctrl | data); -} - -static u16 cfspi_rx(void) -{ - volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI; - - while ((dspi->sr & 0x000000F0) == 0) ; - - return (dspi->rfr & 0xFFFF); -} - -static int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, - void *din, ulong flags) -{ - struct cf_spi_slave *cfslave = to_cf_spi_slave(slave); - u16 *spi_rd16 = NULL, *spi_wr16 = NULL; - u8 *spi_rd = NULL, *spi_wr = NULL; - static u32 ctrl = 0; - uint len = bitlen >> 3; - - if (cfslave->charbit == 16) { - bitlen >>= 1; - spi_wr16 = (u16 *) dout; - spi_rd16 = (u16 *) din; - } else { - spi_wr = (u8 *) dout; - spi_rd = (u8 *) din; - } - - if ((flags & SPI_XFER_BEGIN) == SPI_XFER_BEGIN) - ctrl |= DSPI_TFR_CONT; - - ctrl = (ctrl & 0xFF000000) | ((1 << slave->cs) << 16); - - if (len > 1) { - int tmp_len = len - 1; - while (tmp_len--) { - if (dout != NULL) { - if (cfslave->charbit == 16) - cfspi_tx(ctrl, *spi_wr16++); - else - cfspi_tx(ctrl, *spi_wr++); - cfspi_rx(); - } - - if (din != NULL) { - cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL); - if (cfslave->charbit == 16) - *spi_rd16++ = cfspi_rx(); - else - *spi_rd++ = cfspi_rx(); - } - } - - len = 1; /* remaining byte */ - } - - if ((flags & SPI_XFER_END) == SPI_XFER_END) - ctrl &= ~DSPI_TFR_CONT; - - if (len) { - if (dout != NULL) { - if (cfslave->charbit == 16) - cfspi_tx(ctrl, *spi_wr16); - else - cfspi_tx(ctrl, *spi_wr); - cfspi_rx(); - } - - if (din != NULL) { - cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL); - if (cfslave->charbit == 16) - *spi_rd16 = cfspi_rx(); - else - *spi_rd = cfspi_rx(); - } - } else { - /* dummy read */ - cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL); - cfspi_rx(); - } - - return 0; -} - -static struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, - uint mode) -{ - /* - * bit definition for mode: - * bit 31 - 28: Transfer size 3 to 16 bits - * 27 - 26: PCS to SCK delay prescaler - * 25 - 24: After SCK delay prescaler - * 23 - 22: Delay after transfer prescaler - * 21 : Allow overwrite for bit 31-22 and bit 20-8 - * 20 : Double baud rate - * 19 - 16: PCS to SCK delay scaler - * 15 - 12: After SCK delay scaler - * 11 - 8: Delay after transfer scaler - * 7 - 0: SPI_CPHA, SPI_CPOL, SPI_LSB_FIRST - */ - volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI; - int prescaler[] = { 2, 3, 5, 7 }; - int scaler[] = { - 2, 4, 6, 8, - 16, 32, 64, 128, - 256, 512, 1024, 2048, - 4096, 8192, 16384, 32768 - }; - int i, j, pbrcnt, brcnt, diff, tmp, dbr = 0; - int best_i, best_j, bestmatch = 0x7FFFFFFF, baud_speed; - u32 bus_setup = 0; - - tmp = (prescaler[3] * scaler[15]); - /* Maximum and minimum baudrate it can handle */ - if ((cfslave->baudrate > (gd->bus_clk >> 1)) || - (cfslave->baudrate < (gd->bus_clk / tmp))) { - printf("Exceed baudrate limitation: Max %d - Min %d\n", - (int)(gd->bus_clk >> 1), (int)(gd->bus_clk / tmp)); - return NULL; - } - - /* Activate Double Baud when it exceed 1/4 the bus clk */ - if ((CONFIG_SYS_DSPI_CTAR0 & DSPI_CTAR_DBR) || - (cfslave->baudrate > (gd->bus_clk / (prescaler[0] * scaler[0])))) { - bus_setup |= DSPI_CTAR_DBR; - dbr = 1; - } - - if (mode & SPI_CPOL) - bus_setup |= DSPI_CTAR_CPOL; - if (mode & SPI_CPHA) - bus_setup |= DSPI_CTAR_CPHA; - if (mode & SPI_LSB_FIRST) - bus_setup |= DSPI_CTAR_LSBFE; - - /* Overwrite default value set in platform configuration file */ - if (mode & SPI_MODE_MOD) { - - if ((mode & 0xF0000000) == 0) - bus_setup |= - dspi->ctar[cfslave->slave.bus] & 0x78000000; - else - bus_setup |= ((mode & 0xF0000000) >> 1); - - /* - * Check to see if it is enabled by default in platform - * config, or manual setting passed by mode parameter - */ - if (mode & SPI_DBLRATE) { - bus_setup |= DSPI_CTAR_DBR; - dbr = 1; - } - bus_setup |= (mode & 0x0FC00000) >> 4; /* PSCSCK, PASC, PDT */ - bus_setup |= (mode & 0x000FFF00) >> 4; /* CSSCK, ASC, DT */ - } else - bus_setup |= (dspi->ctar[cfslave->slave.bus] & 0x78FCFFF0); - - cfslave->charbit = - ((dspi->ctar[cfslave->slave.bus] & 0x78000000) == - 0x78000000) ? 16 : 8; - - pbrcnt = sizeof(prescaler) / sizeof(int); - brcnt = sizeof(scaler) / sizeof(int); - - /* baudrate calculation - to closer value, may not be exact match */ - for (best_i = 0, best_j = 0, i = 0; i < pbrcnt; i++) { - baud_speed = gd->bus_clk / prescaler[i]; - for (j = 0; j < brcnt; j++) { - tmp = (baud_speed / scaler[j]) * (1 + dbr); - - if (tmp > cfslave->baudrate) - diff = tmp - cfslave->baudrate; - else - diff = cfslave->baudrate - tmp; - - if (diff < bestmatch) { - bestmatch = diff; - best_i = i; - best_j = j; - } - } - } - bus_setup |= (DSPI_CTAR_PBR(best_i) | DSPI_CTAR_BR(best_j)); - dspi->ctar[cfslave->slave.bus] = bus_setup; - - return &cfslave->slave; -} -#endif /* CONFIG_CF_DSPI */ - -#ifdef CONFIG_CMD_SPI -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - if (((cs >= 0) && (cs < 8)) && ((bus >= 0) && (bus < 8))) - return 1; - else - return 0; -} - -void spi_init(void) -{ - cfspi_init(); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct cf_spi_slave *cfslave; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - cfslave = spi_alloc_slave(struct cf_spi_slave, bus, cs); - if (!cfslave) - return NULL; - - cfslave->baudrate = max_hz; - - /* specific setup */ - return cfspi_setup_slave(cfslave, mode); -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct cf_spi_slave *cfslave = to_cf_spi_slave(slave); - - free(cfslave); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - return cfspi_claim_bus(slave->bus, slave->cs); -} - -void spi_release_bus(struct spi_slave *slave) -{ - cfspi_release_bus(slave->bus, slave->cs); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - return cfspi_xfer(slave, bitlen, dout, din, flags); -} -#endif /* CONFIG_CMD_SPI */ From patchwork Tue Nov 20 12:48:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000463 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="g1DKTTFJ"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zm841MJ8z9s3x for ; Wed, 21 Nov 2018 00:02:27 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 640C0C220AA; Tue, 20 Nov 2018 12:58:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9ADF7C2209F; Tue, 20 Nov 2018 12:50:24 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 87832C22088; Tue, 20 Nov 2018 12:49:51 +0000 (UTC) Received: from mail-pg1-f196.google.com (mail-pg1-f196.google.com [209.85.215.196]) by lists.denx.de (Postfix) with ESMTPS id 7B0D8C220D0 for ; Tue, 20 Nov 2018 12:49:44 +0000 (UTC) Received: by mail-pg1-f196.google.com with SMTP id 17so877701pgg.1 for ; Tue, 20 Nov 2018 04:49:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=eHxLzJxZduW00o7x0D9AqBIqZzNe+/keLyKyuZKxoQM=; b=g1DKTTFJ4/QbZK3G8iUYH9UaABhVRADEx+XaBJvss/f0sbuUAEv2gBzeo4qGvr+E19 mFmU58fjnpIxKonjgg6Tm0eztCOMBr/0Dgqko4GwHvtbEFAW8WYngg0F0lp71BPwC8Wp Ob5/9RsV1z3TZ9jmOR7nKVAMOc56LVqs4KWdE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eHxLzJxZduW00o7x0D9AqBIqZzNe+/keLyKyuZKxoQM=; b=dFooKZ+c9hzO4ze7tMjE8kppXLn8Xae49Fl09fI0v40Z47trX7lazjMs9MXqsei8My zy2gb+yIpzSx/RLX3mxjLW1J6eeq/P9gOr60fPvamBWmsl+6b+oAciD9HvaKBc1ZRruK OY6vDk9cKeKOJA4k4jWM1e6eGyDhHMY7ZPNF9BaFkw8267W+d23oy9SRNuw0FC3xfrDA 6I2U00Gd2b0Cymm74nC2hbJUd2zBkng9K4c/lm9DxlBaWDq8Sv4hKiAtVwOUsOj7pMAy SKhDSV+TdztSCR4xEA576qsVmma5GXz47G8FqSh2hYoISKbS4E7CvVVARVCh/bmKF1M4 l2yw== X-Gm-Message-State: AA+aEWaW5d81zInWuiePZWWbHlEB19hd221Z+3Y66F36fBTg9eWgvvvb eTJzOVxUZoJlfCJiLQcM7QMleTYEEmI= X-Google-Smtp-Source: AFSGD/WqtezTIsDdzon3YR88zAU/kvlZzaqbrjFVds/47EAq0LMDpLuChng8PhgWjsOjhRrODoLbtw== X-Received: by 2002:a62:4b4d:: with SMTP id y74mr763842pfa.186.1542718182863; Tue, 20 Nov 2018 04:49:42 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:42 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:05 +0530 Message-Id: <20181120124814.23293-26-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 25/34] spi: Zap lpc32xx_ssp driver-related code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Dropped - lpc32xx_ssp driver - SPI, SPI flash CONFIG-items - CMD_SPI, CMD_SF..etc Dropped becuase - no active updates - no dm conversion - multiple pings for asking dm-conversion - no reponse for dm converted patch - driver-model migration expiry Signed-off-by: Jagan Teki --- configs/devkit3250_defconfig | 3 - configs/work_92105_defconfig | 3 - drivers/spi/Kconfig | 5 -- drivers/spi/Makefile | 1 - drivers/spi/lpc32xx_ssp.c | 134 ----------------------------------- include/configs/devkit3250.h | 5 -- include/configs/work_92105.h | 5 -- scripts/config_whitelist.txt | 1 - 8 files changed, 157 deletions(-) delete mode 100644 drivers/spi/lpc32xx_ssp.c diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index b739f27803..7473f9c202 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -19,7 +19,6 @@ CONFIG_CMD_IMLS=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y -CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y @@ -41,8 +40,6 @@ CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR=31 CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_LPC32XX_SSP=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 105e51a400..988e7999cc 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -25,7 +25,6 @@ CONFIG_CMD_EEPROM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y -CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y @@ -37,5 +36,3 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_LPC32XX_SSP=y diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 1f37f1083d..bf134ef437 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -317,11 +317,6 @@ config KIRKWOOD_SPI Enable support for SPI on various Marvell SoCs, such as Kirkwood and Armada 375. -config LPC32XX_SSP - bool "LPC32XX SPI Driver" - help - Enable support for SPI on LPC32xx - config MPC8XX_SPI bool "MPC8XX SPI Driver" depends on MPC8xx diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 890e919f49..7d676988fd 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -31,7 +31,6 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o obj-$(CONFIG_ICH_SPI) += ich.o -obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o obj-$(CONFIG_MT7621_SPI) += mt7621_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o diff --git a/drivers/spi/lpc32xx_ssp.c b/drivers/spi/lpc32xx_ssp.c deleted file mode 100644 index 4b09366317..0000000000 --- a/drivers/spi/lpc32xx_ssp.c +++ /dev/null @@ -1,134 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * LPC32xx SSP interface (SPI mode) - * - * (C) Copyright 2014 DENX Software Engineering GmbH - * Written-by: Albert ARIBAUD - */ - -#include -#include -#include -#include -#include -#include - -/* SSP chip registers */ -struct ssp_regs { - u32 cr0; - u32 cr1; - u32 data; - u32 sr; - u32 cpsr; - u32 imsc; - u32 ris; - u32 mis; - u32 icr; - u32 dmacr; -}; - -/* CR1 register defines */ -#define SSP_CR1_SSP_ENABLE 0x0002 - -/* SR register defines */ -#define SSP_SR_TNF 0x0002 -/* SSP status RX FIFO not empty bit */ -#define SSP_SR_RNE 0x0004 - -/* lpc32xx spi slave */ -struct lpc32xx_spi_slave { - struct spi_slave slave; - struct ssp_regs *regs; -}; - -static inline struct lpc32xx_spi_slave *to_lpc32xx_spi_slave( - struct spi_slave *slave) -{ - return container_of(slave, struct lpc32xx_spi_slave, slave); -} - -/* the following is called in sequence by do_spi_xfer() */ - -struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode) -{ - struct lpc32xx_spi_slave *lslave; - - /* we only set up SSP0 for now, so ignore bus */ - - if (mode & SPI_3WIRE) { - pr_err("3-wire mode not supported"); - return NULL; - } - - if (mode & SPI_SLAVE) { - pr_err("slave mode not supported\n"); - return NULL; - } - - if (mode & SPI_PREAMBLE) { - pr_err("preamble byte skipping not supported\n"); - return NULL; - } - - lslave = spi_alloc_slave(struct lpc32xx_spi_slave, bus, cs); - if (!lslave) { - printf("SPI_error: Fail to allocate lpc32xx_spi_slave\n"); - return NULL; - } - - lslave->regs = (struct ssp_regs *)SSP0_BASE; - - /* - * 8 bit frame, SPI fmt, 500kbps -> clock divider is 26. - * Set SCR to 0 and CPSDVSR to 26. - */ - - writel(0x7, &lslave->regs->cr0); /* 8-bit chunks, SPI, 1 clk/bit */ - writel(26, &lslave->regs->cpsr); /* SSP clock = HCLK/26 = 500kbps */ - writel(0, &lslave->regs->imsc); /* do not raise any interrupts */ - writel(0, &lslave->regs->icr); /* clear any pending interrupt */ - writel(0, &lslave->regs->dmacr); /* do not do DMAs */ - writel(SSP_CR1_SSP_ENABLE, &lslave->regs->cr1); /* enable SSP0 */ - return &lslave->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct lpc32xx_spi_slave *lslave = to_lpc32xx_spi_slave(slave); - - debug("(lpc32xx) spi_free_slave: 0x%08x\n", (u32)lslave); - free(lslave); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - /* only one bus and slave so far, always available */ - return 0; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct lpc32xx_spi_slave *lslave = to_lpc32xx_spi_slave(slave); - int bytelen = bitlen >> 3; - int idx_out = 0; - int idx_in = 0; - int start_time; - - start_time = get_timer(0); - while ((idx_out < bytelen) || (idx_in < bytelen)) { - int status = readl(&lslave->regs->sr); - if ((idx_out < bytelen) && (status & SSP_SR_TNF)) - writel(((u8 *)dout)[idx_out++], &lslave->regs->data); - if ((idx_in < bytelen) && (status & SSP_SR_RNE)) - ((u8 *)din)[idx_in++] = readl(&lslave->regs->data); - if (get_timer(start_time) >= CONFIG_LPC32XX_SSP_TIMEOUT) - return -1; - } - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - /* do nothing */ -} diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 2f8c655b2c..e1f729a854 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -58,11 +58,6 @@ */ #define CONFIG_LPC32XX_GPIO -/* - * SSP/SPI - */ -#define CONFIG_LPC32XX_SSP_TIMEOUT 100000 - /* * Ethernet */ diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 67b5e9aa11..9d9a53ef09 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -109,11 +109,6 @@ #define CONFIG_LPC32XX_GPIO -/* - * SSP/SPI/DISPLAY - */ - -#define CONFIG_LPC32XX_SSP_TIMEOUT 100000 /* * Environment */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index abfb0ff89f..ff25315363 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1172,7 +1172,6 @@ CONFIG_LPC32XX_NAND_SLC_WDR_CLKS CONFIG_LPC32XX_NAND_SLC_WHOLD CONFIG_LPC32XX_NAND_SLC_WSETUP CONFIG_LPC32XX_NAND_SLC_WWIDTH -CONFIG_LPC32XX_SSP_TIMEOUT CONFIG_LPC_BASE CONFIG_LPC_IO_BASE CONFIG_LPUART From patchwork Tue Nov 20 12:48:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000465 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="A6NVhxo2"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zm8W3x3tz9s3q for ; Wed, 21 Nov 2018 00:02:51 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id C82E2C220AA; Tue, 20 Nov 2018 12:56:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 8DC81C2208B; Tue, 20 Nov 2018 12:50:03 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 775F9C220E6; Tue, 20 Nov 2018 12:49:52 +0000 (UTC) Received: from mail-pl1-f193.google.com (mail-pl1-f193.google.com [209.85.214.193]) by lists.denx.de (Postfix) with ESMTPS id 471A7C220F8 for ; Tue, 20 Nov 2018 12:49:47 +0000 (UTC) Received: by mail-pl1-f193.google.com with SMTP id b5-v6so960539pla.6 for ; Tue, 20 Nov 2018 04:49:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pTYtvjxmbkcVqQYWHO0ffOgamrPflkYC8MDqXSLqhng=; b=A6NVhxo28F+jYsfN3Xazzr8N1+yLdwItd+P61BB8wmg5OGYxqN2NvcwIV67O8EgfWc I+QdNA6vizfJU+DE54k5HpPImXt0NOXEIBMRFhYbAGYKJtz6bEYhsFIG1QxOH8qXltVf LAefAq8GPT0+bil6S3HYPon0gAsCtwg3LY1og= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pTYtvjxmbkcVqQYWHO0ffOgamrPflkYC8MDqXSLqhng=; b=OduVjZtuQgzs8Evanh7v+6Kk/GbN/4pXmDeagxDA/kYO9nAy57HRULH8v8k2VO+mP7 YqLCk48mOguTtgQHBuLbxrJ3W02GBhU0+AUGCoZeHvF8TnC/hlWVJHbt2iA4UodVZbOX ZtTsKIc/LdL8SI4MbfpSf73XaYANndmJ0BjCKTc8QdDZvVd7QQcUNKxoYg/4eIEv3mnV CWy/K/AhHhCwjXUo9jMhg9PQz7W623BWUoQa2ofBGTWOFlxjqthg47A93XauAzH0Guv5 Qo/MRWQNIOnGbDtivbFK5PiRJpU9OsvoCXUxGPZjfYPZzavx3NxUiMAHmd7JdewlqK0t JYRw== X-Gm-Message-State: AA+aEWZEbE1LVaIU4ekJ5OmAf9hCo6olxu6yM/hFP23iu+I4jC1+E5In X1q8YFaVplSRaVUzCyZVsbhKQ8u2DHw= X-Google-Smtp-Source: AFSGD/X3v7ZivzFJr7ZK+PuZf//9RvIqA8hJvZnmpGL6iIFEsu6g3NI/mEaDYxO90OsGaY21GTCJsA== X-Received: by 2002:a17:902:b181:: with SMTP id s1-v6mr2133067plr.51.1542718185596; Tue, 20 Nov 2018 04:49:45 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:45 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:06 +0530 Message-Id: <20181120124814.23293-27-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 26/34] spi: Zap mxs_spi driver-related code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Dropped - mxs_spi driver - SPI, SPI flash CONFIG-items - CMD_SPI, CMD_SF..etc Dropped becuase - no active updates - no dm conversion - no reponse for dm converted patch - driver-model migration expiry Signed-off-by: Jagan Teki --- configs/bg0900_defconfig | 7 - configs/mx28evk_auart_console_defconfig | 6 - configs/mx28evk_defconfig | 6 - configs/mx28evk_nand_defconfig | 6 - configs/mx28evk_spi_defconfig | 7 - drivers/spi/Kconfig | 6 - drivers/spi/Makefile | 1 - drivers/spi/mxs_spi.c | 358 ------------------------ 8 files changed, 397 deletions(-) delete mode 100644 drivers/spi/mxs_spi.c diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig index 6de81621cd..67f4c772ee 100644 --- a/configs/bg0900_defconfig +++ b/configs/bg0900_defconfig @@ -21,8 +21,6 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_NAND_TRIMFFS=y -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -31,11 +29,6 @@ CONFIG_DOS_PARTITION=y # CONFIG_MMC is not set CONFIG_NAND=y CONFIG_NAND_MXS=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_BAR=y -CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y CONFIG_CONS_INDEX=0 -CONFIG_SPI=y -CONFIG_MXS_SPI=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig index d0572212f1..65988ac46d 100644 --- a/configs/mx28evk_auart_console_defconfig +++ b/configs/mx28evk_auart_console_defconfig @@ -21,8 +21,6 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND_TRIMFFS=y -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y @@ -42,12 +40,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_MMC_MXS=y CONFIG_NAND=y CONFIG_NAND_MXS=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_SST=y CONFIG_MII=y CONFIG_CONS_INDEX=0 -CONFIG_SPI=y -CONFIG_MXS_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index ab59d7599b..4e0889288d 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -21,8 +21,6 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND_TRIMFFS=y -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y @@ -42,12 +40,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_MMC_MXS=y CONFIG_NAND=y CONFIG_NAND_MXS=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_SST=y CONFIG_MII=y CONFIG_CONS_INDEX=0 -CONFIG_SPI=y -CONFIG_MXS_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index 6b774cf248..e92ddecd03 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -20,8 +20,6 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND_TRIMFFS=y -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y @@ -41,12 +39,8 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_MMC_MXS=y CONFIG_NAND=y CONFIG_NAND_MXS=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_SST=y CONFIG_MII=y CONFIG_CONS_INDEX=0 -CONFIG_SPI=y -CONFIG_MXS_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig index 0a77e6e9f7..479f90837b 100644 --- a/configs/mx28evk_spi_defconfig +++ b/configs/mx28evk_spi_defconfig @@ -20,8 +20,6 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND_TRIMFFS=y -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y @@ -37,16 +35,11 @@ CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:3m(bootloader)ro,512k(environment),512k(redundant-environment),4m(kernel),512k(fdt),8m(ramdisk),-(filesystem)" CONFIG_CMD_UBI=y -CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MMC_MXS=y CONFIG_NAND=y CONFIG_NAND_MXS=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_SST=y CONFIG_MII=y CONFIG_CONS_INDEX=0 -CONFIG_SPI=y -CONFIG_MXS_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index bf134ef437..30a19fc510 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -334,12 +334,6 @@ config MXC_SPI Enable the MXC SPI controller driver. This driver can be used on various i.MX SoCs such as i.MX31/35/51/6/7. -config MXS_SPI - bool "MXS SPI Driver" - help - Enable the MXS SPI controller driver. This driver can be used - on the i.MX23 and i.MX28 SoCs. - config OMAP3_SPI bool "McSPI driver for OMAP" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 7d676988fd..c4c9d2f393 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -35,7 +35,6 @@ obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o obj-$(CONFIG_MT7621_SPI) += mt7621_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o obj-$(CONFIG_MXC_SPI) += mxc_spi.o -obj-$(CONFIG_MXS_SPI) += mxs_spi.o obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_PIC32_SPI) += pic32_spi.o diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c deleted file mode 100644 index 5065e407f8..0000000000 --- a/drivers/spi/mxs_spi.c +++ /dev/null @@ -1,358 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Freescale i.MX28 SPI driver - * - * Copyright (C) 2011 Marek Vasut - * on behalf of DENX Software Engineering GmbH - * - * NOTE: This driver only supports the SPI-controller chipselects, - * GPIO driven chipselects are not supported. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define MXS_SPI_MAX_TIMEOUT 1000000 -#define MXS_SPI_PORT_OFFSET 0x2000 -#define MXS_SSP_CHIPSELECT_MASK 0x00300000 -#define MXS_SSP_CHIPSELECT_SHIFT 20 - -#define MXSSSP_SMALL_TRANSFER 512 - -struct mxs_spi_slave { - struct spi_slave slave; - uint32_t max_khz; - uint32_t mode; - struct mxs_ssp_regs *regs; -}; - -static inline struct mxs_spi_slave *to_mxs_slave(struct spi_slave *slave) -{ - return container_of(slave, struct mxs_spi_slave, slave); -} - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - /* MXS SPI: 4 ports and 3 chip selects maximum */ - if (!mxs_ssp_bus_id_valid(bus) || cs > 2) - return 0; - else - return 1; -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct mxs_spi_slave *mxs_slave; - - if (!spi_cs_is_valid(bus, cs)) { - printf("mxs_spi: invalid bus %d / chip select %d\n", bus, cs); - return NULL; - } - - mxs_slave = spi_alloc_slave(struct mxs_spi_slave, bus, cs); - if (!mxs_slave) - return NULL; - - if (mxs_dma_init_channel(MXS_DMA_CHANNEL_AHB_APBH_SSP0 + bus)) - goto err_init; - - mxs_slave->max_khz = max_hz / 1000; - mxs_slave->mode = mode; - mxs_slave->regs = mxs_ssp_regs_by_bus(bus); - - return &mxs_slave->slave; - -err_init: - free(mxs_slave); - return NULL; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave); - free(mxs_slave); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave); - struct mxs_ssp_regs *ssp_regs = mxs_slave->regs; - uint32_t reg = 0; - - mxs_reset_block(&ssp_regs->hw_ssp_ctrl0_reg); - - writel((slave->cs << MXS_SSP_CHIPSELECT_SHIFT) | - SSP_CTRL0_BUS_WIDTH_ONE_BIT, - &ssp_regs->hw_ssp_ctrl0); - - reg = SSP_CTRL1_SSP_MODE_SPI | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS; - reg |= (mxs_slave->mode & SPI_CPOL) ? SSP_CTRL1_POLARITY : 0; - reg |= (mxs_slave->mode & SPI_CPHA) ? SSP_CTRL1_PHASE : 0; - writel(reg, &ssp_regs->hw_ssp_ctrl1); - - writel(0, &ssp_regs->hw_ssp_cmd0); - - mxs_set_ssp_busclock(slave->bus, mxs_slave->max_khz); - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ -} - -static void mxs_spi_start_xfer(struct mxs_ssp_regs *ssp_regs) -{ - writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_set); - writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_clr); -} - -static void mxs_spi_end_xfer(struct mxs_ssp_regs *ssp_regs) -{ - writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_clr); - writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_set); -} - -static int mxs_spi_xfer_pio(struct mxs_spi_slave *slave, - char *data, int length, int write, unsigned long flags) -{ - struct mxs_ssp_regs *ssp_regs = slave->regs; - - if (flags & SPI_XFER_BEGIN) - mxs_spi_start_xfer(ssp_regs); - - while (length--) { - /* We transfer 1 byte */ -#if defined(CONFIG_MX23) - writel(SSP_CTRL0_XFER_COUNT_MASK, &ssp_regs->hw_ssp_ctrl0_clr); - writel(1, &ssp_regs->hw_ssp_ctrl0_set); -#elif defined(CONFIG_MX28) - writel(1, &ssp_regs->hw_ssp_xfer_size); -#endif - - if ((flags & SPI_XFER_END) && !length) - mxs_spi_end_xfer(ssp_regs); - - if (write) - writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_clr); - else - writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_set); - - writel(SSP_CTRL0_RUN, &ssp_regs->hw_ssp_ctrl0_set); - - if (mxs_wait_mask_set(&ssp_regs->hw_ssp_ctrl0_reg, - SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) { - printf("MXS SPI: Timeout waiting for start\n"); - return -ETIMEDOUT; - } - - if (write) - writel(*data++, &ssp_regs->hw_ssp_data); - - writel(SSP_CTRL0_DATA_XFER, &ssp_regs->hw_ssp_ctrl0_set); - - if (!write) { - if (mxs_wait_mask_clr(&ssp_regs->hw_ssp_status_reg, - SSP_STATUS_FIFO_EMPTY, MXS_SPI_MAX_TIMEOUT)) { - printf("MXS SPI: Timeout waiting for data\n"); - return -ETIMEDOUT; - } - - *data = readl(&ssp_regs->hw_ssp_data); - data++; - } - - if (mxs_wait_mask_clr(&ssp_regs->hw_ssp_ctrl0_reg, - SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) { - printf("MXS SPI: Timeout waiting for finish\n"); - return -ETIMEDOUT; - } - } - - return 0; -} - -static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave, - char *data, int length, int write, unsigned long flags) -{ - const int xfer_max_sz = 0xff00; - const int desc_count = DIV_ROUND_UP(length, xfer_max_sz) + 1; - struct mxs_ssp_regs *ssp_regs = slave->regs; - struct mxs_dma_desc *dp; - uint32_t ctrl0; - uint32_t cache_data_count; - const uint32_t dstart = (uint32_t)data; - int dmach; - int tl; - int ret = 0; - -#if defined(CONFIG_MX23) - const int mxs_spi_pio_words = 1; -#elif defined(CONFIG_MX28) - const int mxs_spi_pio_words = 4; -#endif - - ALLOC_CACHE_ALIGN_BUFFER(struct mxs_dma_desc, desc, desc_count); - - memset(desc, 0, sizeof(struct mxs_dma_desc) * desc_count); - - ctrl0 = readl(&ssp_regs->hw_ssp_ctrl0); - ctrl0 |= SSP_CTRL0_DATA_XFER; - - if (flags & SPI_XFER_BEGIN) - ctrl0 |= SSP_CTRL0_LOCK_CS; - if (!write) - ctrl0 |= SSP_CTRL0_READ; - - if (length % ARCH_DMA_MINALIGN) - cache_data_count = roundup(length, ARCH_DMA_MINALIGN); - else - cache_data_count = length; - - /* Flush data to DRAM so DMA can pick them up */ - if (write) - flush_dcache_range(dstart, dstart + cache_data_count); - - /* Invalidate the area, so no writeback into the RAM races with DMA */ - invalidate_dcache_range(dstart, dstart + cache_data_count); - - dmach = MXS_DMA_CHANNEL_AHB_APBH_SSP0 + slave->slave.bus; - - dp = desc; - while (length) { - dp->address = (dma_addr_t)dp; - dp->cmd.address = (dma_addr_t)data; - - /* - * This is correct, even though it does indeed look insane. - * I hereby have to, wholeheartedly, thank Freescale Inc., - * for always inventing insane hardware and keeping me busy - * and employed ;-) - */ - if (write) - dp->cmd.data = MXS_DMA_DESC_COMMAND_DMA_READ; - else - dp->cmd.data = MXS_DMA_DESC_COMMAND_DMA_WRITE; - - /* - * The DMA controller can transfer large chunks (64kB) at - * time by setting the transfer length to 0. Setting tl to - * 0x10000 will overflow below and make .data contain 0. - * Otherwise, 0xff00 is the transfer maximum. - */ - if (length >= 0x10000) - tl = 0x10000; - else - tl = min(length, xfer_max_sz); - - dp->cmd.data |= - ((tl & 0xffff) << MXS_DMA_DESC_BYTES_OFFSET) | - (mxs_spi_pio_words << MXS_DMA_DESC_PIO_WORDS_OFFSET) | - MXS_DMA_DESC_HALT_ON_TERMINATE | - MXS_DMA_DESC_TERMINATE_FLUSH; - - data += tl; - length -= tl; - - if (!length) { - dp->cmd.data |= MXS_DMA_DESC_IRQ | MXS_DMA_DESC_DEC_SEM; - - if (flags & SPI_XFER_END) { - ctrl0 &= ~SSP_CTRL0_LOCK_CS; - ctrl0 |= SSP_CTRL0_IGNORE_CRC; - } - } - - /* - * Write CTRL0, CMD0, CMD1 and XFER_SIZE registers in - * case of MX28, write only CTRL0 in case of MX23 due - * to the difference in register layout. It is utterly - * essential that the XFER_SIZE register is written on - * a per-descriptor basis with the same size as is the - * descriptor! - */ - dp->cmd.pio_words[0] = ctrl0; -#ifdef CONFIG_MX28 - dp->cmd.pio_words[1] = 0; - dp->cmd.pio_words[2] = 0; - dp->cmd.pio_words[3] = tl; -#endif - - mxs_dma_desc_append(dmach, dp); - - dp++; - } - - if (mxs_dma_go(dmach)) - ret = -EINVAL; - - /* The data arrived into DRAM, invalidate cache over them */ - if (!write) - invalidate_dcache_range(dstart, dstart + cache_data_count); - - return ret; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave); - struct mxs_ssp_regs *ssp_regs = mxs_slave->regs; - int len = bitlen / 8; - char dummy; - int write = 0; - char *data = NULL; - int dma = 1; - - if (bitlen == 0) { - if (flags & SPI_XFER_END) { - din = (void *)&dummy; - len = 1; - } else - return 0; - } - - /* Half-duplex only */ - if (din && dout) - return -EINVAL; - /* No data */ - if (!din && !dout) - return 0; - - if (dout) { - data = (char *)dout; - write = 1; - } else if (din) { - data = (char *)din; - write = 0; - } - - /* - * Check for alignment, if the buffer is aligned, do DMA transfer, - * PIO otherwise. This is a temporary workaround until proper bounce - * buffer is in place. - */ - if (dma) { - if (((uint32_t)data) & (ARCH_DMA_MINALIGN - 1)) - dma = 0; - if (((uint32_t)len) & (ARCH_DMA_MINALIGN - 1)) - dma = 0; - } - - if (!dma || (len < MXSSSP_SMALL_TRANSFER)) { - writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_clr); - return mxs_spi_xfer_pio(mxs_slave, data, len, write, flags); - } else { - writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_set); - return mxs_spi_xfer_dma(mxs_slave, data, len, write, flags); - } -} From patchwork Tue Nov 20 12:48:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000473 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; 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b=rWs/hJT5s+6be/MK0UMJTULq/Bvt5BXrM+f3H5gadgbyGcWldz/JKAgbLa16p93mda maHFtgJNWvOauAqcQI1qmqOz8RRDfkvk2FvW19LnMpmAOHXZYUeQ6CwXJAC/OzsD3ki9 a8mYQoSFmj11Qag17T3PN7y8lKpVbXaozREraln9TvTA+ZXSTUMB26aBe9pOb0NWbxb4 ACnE0IKLBSXDaES24687c2DlMVe33sTmPbCDn4VJolj5JHk2+p2jHQFEjZeASF2Jc6mr MnsF6iBlx+Pf27fpkdaaqHkFLVYOiUse4VtgzPvX/3Jd4wKFcuVgT0oRT40TFWSwQbEn fy7g== X-Gm-Message-State: AA+aEWYHtcLXOr9eNiYfBs28XReT3MH3PdZpmv1meuBAN2rJ+HaBeozn WzczlHxunDcfISv+SvA7pxofnNAivXI= X-Google-Smtp-Source: AFSGD/XqK2k7aGLq6mWEDWYihyL2zMhInvej5rv5Ci6obDqw5tahQnzwufdDY9nJK5P/KCuvKaBEdQ== X-Received: by 2002:a17:902:a50a:: with SMTP id s10mr2005180plq.278.1542718187905; Tue, 20 Nov 2018 04:49:47 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:47 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:07 +0530 Message-Id: <20181120124814.23293-28-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 27/34] spi: Zap sh_spi driver-related code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Dropped - sh_spi driver - SPI, SPI flash CONFIG-items - CMD_SPI, CMD_SF..etc Dropped becuase - no active updates - no dm conversion - no reponse for dm converted patch - driver-model migration expiry Signed-off-by: Jagan Teki --- configs/sh7752evb_defconfig | 7 - configs/sh7753evb_defconfig | 7 - configs/sh7757lcr_defconfig | 6 - drivers/spi/Kconfig | 6 - drivers/spi/Makefile | 1 - drivers/spi/sh_spi.c | 249 ----------------------------------- drivers/spi/sh_spi.h | 67 ---------- include/configs/sh7752evb.h | 5 - include/configs/sh7753evb.h | 5 - include/configs/sh7757lcr.h | 5 - scripts/config_whitelist.txt | 1 - 11 files changed, 359 deletions(-) delete mode 100644 drivers/spi/sh_spi.c delete mode 100644 drivers/spi/sh_spi.h diff --git a/configs/sh7752evb_defconfig b/configs/sh7752evb_defconfig index b34709d1ea..fecaf04172 100644 --- a/configs/sh7752evb_defconfig +++ b/configs/sh7752evb_defconfig @@ -18,7 +18,6 @@ CONFIG_CMD_MD5SUM=y # CONFIG_CMD_LOADB is not set CONFIG_CMD_MMC=y CONFIG_CMD_SDRAM=y -CONFIG_CMD_SF=y # CONFIG_CMD_ECHO is not set # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SOURCE is not set @@ -29,14 +28,8 @@ CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_MAC_PARTITION=y CONFIG_DOS_PARTITION=y -CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MMC=y CONFIG_SH_MMCIF=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y -CONFIG_SPI=y -CONFIG_SH_SPI=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sh7753evb_defconfig b/configs/sh7753evb_defconfig index 857e90b86a..58df710c70 100644 --- a/configs/sh7753evb_defconfig +++ b/configs/sh7753evb_defconfig @@ -17,7 +17,6 @@ CONFIG_CMD_MD5SUM=y # CONFIG_CMD_LOADB is not set CONFIG_CMD_MMC=y CONFIG_CMD_SDRAM=y -CONFIG_CMD_SF=y # CONFIG_CMD_ECHO is not set # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SOURCE is not set @@ -28,14 +27,8 @@ CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_MAC_PARTITION=y CONFIG_DOS_PARTITION=y -CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MMC=y CONFIG_SH_MMCIF=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y -CONFIG_SPI=y -CONFIG_SH_SPI=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sh7757lcr_defconfig b/configs/sh7757lcr_defconfig index 8314435b93..9939e3b150 100644 --- a/configs/sh7757lcr_defconfig +++ b/configs/sh7757lcr_defconfig @@ -20,7 +20,6 @@ CONFIG_CMD_MD5SUM=y # CONFIG_CMD_LOADB is not set CONFIG_CMD_MMC=y CONFIG_CMD_SDRAM=y -CONFIG_CMD_SF=y # CONFIG_CMD_ECHO is not set # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SOURCE is not set @@ -31,13 +30,8 @@ CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_MAC_PARTITION=y CONFIG_DOS_PARTITION=y -CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MMC=y CONFIG_SH_MMCIF=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y -CONFIG_SPI=y -CONFIG_SH_SPI=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 30a19fc510..93c45aa481 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -293,12 +293,6 @@ config DAVINCI_SPI help Enable the Davinci SPI driver -config SH_SPI - bool "SuperH SPI driver" - help - Enable the SuperH SPI controller driver. This driver can be used - on various SuperH SoCs, such as SH7757. - config SH_QSPI bool "Renesas Quad SPI driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index c4c9d2f393..b531ebbf83 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -42,7 +42,6 @@ obj-$(CONFIG_PL022_SPI) += pl022_spi.o obj-$(CONFIG_RENESAS_RPC_SPI) += renesas_rpc_spi.o obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o -obj-$(CONFIG_SH_SPI) += sh_spi.o obj-$(CONFIG_SH_QSPI) += sh_qspi.o obj-$(CONFIG_STM32_QSPI) += stm32_qspi.o obj-$(CONFIG_SUN4I_SPI) += sun4i_spi.o diff --git a/drivers/spi/sh_spi.c b/drivers/spi/sh_spi.c deleted file mode 100644 index c58fd0ebc4..0000000000 --- a/drivers/spi/sh_spi.c +++ /dev/null @@ -1,249 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * SH SPI driver - * - * Copyright (C) 2011-2012 Renesas Solutions Corp. - */ - -#include -#include -#include -#include -#include -#include "sh_spi.h" - -static void sh_spi_write(unsigned long data, unsigned long *reg) -{ - writel(data, reg); -} - -static unsigned long sh_spi_read(unsigned long *reg) -{ - return readl(reg); -} - -static void sh_spi_set_bit(unsigned long val, unsigned long *reg) -{ - unsigned long tmp; - - tmp = sh_spi_read(reg); - tmp |= val; - sh_spi_write(tmp, reg); -} - -static void sh_spi_clear_bit(unsigned long val, unsigned long *reg) -{ - unsigned long tmp; - - tmp = sh_spi_read(reg); - tmp &= ~val; - sh_spi_write(tmp, reg); -} - -static void clear_fifo(struct sh_spi *ss) -{ - sh_spi_set_bit(SH_SPI_RSTF, &ss->regs->cr2); - sh_spi_clear_bit(SH_SPI_RSTF, &ss->regs->cr2); -} - -static int recvbuf_wait(struct sh_spi *ss) -{ - while (sh_spi_read(&ss->regs->cr1) & SH_SPI_RBE) { - if (ctrlc()) - return 1; - udelay(10); - } - return 0; -} - -static int write_fifo_empty_wait(struct sh_spi *ss) -{ - while (!(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBE)) { - if (ctrlc()) - return 1; - udelay(10); - } - return 0; -} - -static void sh_spi_set_cs(struct sh_spi *ss, unsigned int cs) -{ - unsigned long val = 0; - - if (cs & 0x01) - val |= SH_SPI_SSS0; - if (cs & 0x02) - val |= SH_SPI_SSS1; - - sh_spi_clear_bit(SH_SPI_SSS0 | SH_SPI_SSS1, &ss->regs->cr4); - sh_spi_set_bit(val, &ss->regs->cr4); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct sh_spi *ss; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - ss = spi_alloc_slave(struct sh_spi, bus, cs); - if (!ss) - return NULL; - - ss->regs = (struct sh_spi_regs *)CONFIG_SH_SPI_BASE; - - /* SPI sycle stop */ - sh_spi_write(0xfe, &ss->regs->cr1); - /* CR1 init */ - sh_spi_write(0x00, &ss->regs->cr1); - /* CR3 init */ - sh_spi_write(0x00, &ss->regs->cr3); - sh_spi_set_cs(ss, cs); - - clear_fifo(ss); - - /* 1/8 clock */ - sh_spi_write(sh_spi_read(&ss->regs->cr2) | 0x07, &ss->regs->cr2); - udelay(10); - - return &ss->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct sh_spi *spi = to_sh_spi(slave); - - free(spi); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct sh_spi *ss = to_sh_spi(slave); - - sh_spi_write(sh_spi_read(&ss->regs->cr1) & - ~(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD), &ss->regs->cr1); -} - -static int sh_spi_send(struct sh_spi *ss, const unsigned char *tx_data, - unsigned int len, unsigned long flags) -{ - int i, cur_len, ret = 0; - int remain = (int)len; - - if (len >= SH_SPI_FIFO_SIZE) - sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1); - - while (remain > 0) { - cur_len = (remain < SH_SPI_FIFO_SIZE) ? - remain : SH_SPI_FIFO_SIZE; - for (i = 0; i < cur_len && - !(sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) && - !(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBF); - i++) - sh_spi_write(tx_data[i], &ss->regs->tbr_rbr); - - cur_len = i; - - if (sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) { - /* Abort the transaction */ - flags |= SPI_XFER_END; - sh_spi_set_bit(SH_SPI_WPABRT, &ss->regs->cr4); - ret = 1; - break; - } - - remain -= cur_len; - tx_data += cur_len; - - if (remain > 0) - write_fifo_empty_wait(ss); - } - - if (flags & SPI_XFER_END) { - sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1); - sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1); - udelay(100); - write_fifo_empty_wait(ss); - } - - return ret; -} - -static int sh_spi_receive(struct sh_spi *ss, unsigned char *rx_data, - unsigned int len, unsigned long flags) -{ - int i; - - if (len > SH_SPI_MAX_BYTE) - sh_spi_write(SH_SPI_MAX_BYTE, &ss->regs->cr3); - else - sh_spi_write(len, &ss->regs->cr3); - - sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1); - sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1); - - for (i = 0; i < len; i++) { - if (recvbuf_wait(ss)) - return 0; - - rx_data[i] = (unsigned char)sh_spi_read(&ss->regs->tbr_rbr); - } - sh_spi_write(0, &ss->regs->cr3); - - return 0; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - struct sh_spi *ss = to_sh_spi(slave); - const unsigned char *tx_data = dout; - unsigned char *rx_data = din; - unsigned int len = bitlen / 8; - int ret = 0; - - if (flags & SPI_XFER_BEGIN) - sh_spi_write(sh_spi_read(&ss->regs->cr1) & ~SH_SPI_SSA, - &ss->regs->cr1); - - if (tx_data) - ret = sh_spi_send(ss, tx_data, len, flags); - - if (ret == 0 && rx_data) - ret = sh_spi_receive(ss, rx_data, len, flags); - - if (flags & SPI_XFER_END) { - sh_spi_set_bit(SH_SPI_SSD, &ss->regs->cr1); - udelay(100); - - sh_spi_clear_bit(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD, - &ss->regs->cr1); - clear_fifo(ss); - } - - return ret; -} - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - if (!bus && cs < SH_SPI_NUM_CS) - return 1; - else - return 0; -} - -void spi_cs_activate(struct spi_slave *slave) -{ - -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - -} diff --git a/drivers/spi/sh_spi.h b/drivers/spi/sh_spi.h deleted file mode 100644 index 33a4630c8d..0000000000 --- a/drivers/spi/sh_spi.h +++ /dev/null @@ -1,67 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * SH SPI driver - * - * Copyright (C) 2011 Renesas Solutions Corp. - */ - -#ifndef __SH_SPI_H__ -#define __SH_SPI_H__ - -#include - -struct sh_spi_regs { - unsigned long tbr_rbr; - unsigned long resv1; - unsigned long cr1; - unsigned long resv2; - unsigned long cr2; - unsigned long resv3; - unsigned long cr3; - unsigned long resv4; - unsigned long cr4; -}; - -/* CR1 */ -#define SH_SPI_TBE 0x80 -#define SH_SPI_TBF 0x40 -#define SH_SPI_RBE 0x20 -#define SH_SPI_RBF 0x10 -#define SH_SPI_PFONRD 0x08 -#define SH_SPI_SSDB 0x04 -#define SH_SPI_SSD 0x02 -#define SH_SPI_SSA 0x01 - -/* CR2 */ -#define SH_SPI_RSTF 0x80 -#define SH_SPI_LOOPBK 0x40 -#define SH_SPI_CPOL 0x20 -#define SH_SPI_CPHA 0x10 -#define SH_SPI_L1M0 0x08 - -/* CR3 */ -#define SH_SPI_MAX_BYTE 0xFF - -/* CR4 */ -#define SH_SPI_TBEI 0x80 -#define SH_SPI_TBFI 0x40 -#define SH_SPI_RBEI 0x20 -#define SH_SPI_RBFI 0x10 -#define SH_SPI_SSS1 0x08 -#define SH_SPI_WPABRT 0x04 -#define SH_SPI_SSS0 0x01 - -#define SH_SPI_FIFO_SIZE 32 -#define SH_SPI_NUM_CS 4 - -struct sh_spi { - struct spi_slave slave; - struct sh_spi_regs *regs; -}; - -static inline struct sh_spi *to_sh_spi(struct spi_slave *slave) -{ - return container_of(slave, struct sh_spi, slave); -} - -#endif diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h index 1f29e3d221..a93ee16a77 100644 --- a/include/configs/sh7752evb.h +++ b/include/configs/sh7752evb.h @@ -49,14 +49,9 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII #define CONFIG_PHY_VITESSE -#define SH7752EVB_ETHERNET_MAC_BASE_SPI 0x00090000 -#define SH7752EVB_SPI_SECTOR_SIZE (64 * 1024) -#define SH7752EVB_ETHERNET_MAC_BASE SH7752EVB_ETHERNET_MAC_BASE_SPI #define SH7752EVB_ETHERNET_MAC_SIZE 17 #define SH7752EVB_ETHERNET_NUM_CH 2 -/* SPI */ -#define CONFIG_SH_SPI_BASE 0xfe002000 /* MMCIF */ #define CONFIG_SH_MMCIF_ADDR 0xffcb0000 diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h index 0693fb5a3c..b86e781b95 100644 --- a/include/configs/sh7753evb.h +++ b/include/configs/sh7753evb.h @@ -49,14 +49,9 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII #define CONFIG_PHY_VITESSE -#define SH7753EVB_ETHERNET_MAC_BASE_SPI 0x00090000 -#define SH7753EVB_SPI_SECTOR_SIZE (64 * 1024) -#define SH7753EVB_ETHERNET_MAC_BASE SH7753EVB_ETHERNET_MAC_BASE_SPI #define SH7753EVB_ETHERNET_MAC_SIZE 17 #define SH7753EVB_ETHERNET_NUM_CH 2 -/* SPI */ -#define CONFIG_SH_SPI_BASE 0xfe002000 /* MMCIF */ #define CONFIG_SH_MMCIF_ADDR 0xffcb0000 diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index 05b2f01c15..8886a4a005 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -50,17 +50,12 @@ #define CONFIG_BITBANGMII_MULTI #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII -#define SH7757LCR_ETHERNET_MAC_BASE_SPI 0x000b0000 -#define SH7757LCR_SPI_SECTOR_SIZE (64 * 1024) -#define SH7757LCR_ETHERNET_MAC_BASE SH7757LCR_ETHERNET_MAC_BASE_SPI #define SH7757LCR_ETHERNET_MAC_SIZE 17 #define SH7757LCR_ETHERNET_NUM_CH 2 /* Gigabit Ether */ #define SH7757LCR_GIGA_ETHERNET_NUM_CH 2 -/* SPI */ -#define CONFIG_SH_SPI_BASE 0xfe002000 /* MMCIF */ #define CONFIG_SH_MMCIF_ADDR 0xffcb0000 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index ff25315363..89fa5593c6 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1769,7 +1769,6 @@ CONFIG_SH_QSPI_BASE CONFIG_SH_SCIF_CLK_FREQ CONFIG_SH_SDHI_FREQ CONFIG_SH_SDRAM_OFFSET -CONFIG_SH_SPI_BASE CONFIG_SIEMENS_MACH_TYPE CONFIG_SIMU CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION From patchwork Tue Nov 20 12:48:08 2018 Content-Type: text/plain; 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Tue, 20 Nov 2018 04:49:50 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:49 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:08 +0530 Message-Id: <20181120124814.23293-29-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 28/34] spi: Zap soft_spi_legacy driver-related code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Dropped - soft_spi_legacy driver - SPI, SPI flash CONFIG-items - CMD_SPI, CMD_SF..etc Dropped becuase - no active updates - no dm conversion - driver-model migration expiry Signed-off-by: Jagan Teki --- configs/zipitz2_defconfig | 1 - drivers/spi/Kconfig | 12 +-- drivers/spi/Makefile | 1 - drivers/spi/soft_spi_legacy.c | 168 ---------------------------------- include/configs/MPC8349EMDS.h | 3 - include/configs/zipitz2.h | 7 -- 6 files changed, 6 insertions(+), 186 deletions(-) delete mode 100644 drivers/spi/soft_spi_legacy.c diff --git a/configs/zipitz2_defconfig b/configs/zipitz2_defconfig index 509adcffd9..edfa94eb0d 100644 --- a/configs/zipitz2_defconfig +++ b/configs/zipitz2_defconfig @@ -11,7 +11,6 @@ CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="$ " CONFIG_CMD_MMC=y -CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 93c45aa481..dab48ccbfc 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -189,6 +189,12 @@ config SANDBOX_SPI }; }; +config SOFT_SPI + bool "Soft SPI driver" + help + Enable Soft SPI driver. This driver is to use GPIO simulate + the SPI protocol. + config STM32_QSPI bool "STM32F7 QSPI driver" depends on STM32F7 @@ -267,12 +273,6 @@ config ZYNQMP_GQSPI endif # if DM_SPI -config SOFT_SPI - bool "Soft SPI driver" - help - Enable Soft SPI driver. This driver is to use GPIO simulate - the SPI protocol. - config FSL_ESPI bool "Freescale eSPI driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index b531ebbf83..49e614e124 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -15,7 +15,6 @@ obj-$(CONFIG_SPI_MEM) += spi-mem.o obj-$(CONFIG_TI_QSPI) += ti_qspi.o else obj-y += spi.o -obj-$(CONFIG_SOFT_SPI) += soft_spi_legacy.o endif obj-$(CONFIG_ALTERA_SPI) += altera_spi.o diff --git a/drivers/spi/soft_spi_legacy.c b/drivers/spi/soft_spi_legacy.c deleted file mode 100644 index cc5ab5f991..0000000000 --- a/drivers/spi/soft_spi_legacy.c +++ /dev/null @@ -1,168 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2002 - * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. - * - * Influenced by code from: - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - */ - -#include -#include - -#include - -/*----------------------------------------------------------------------- - * Definitions - */ - -#ifdef DEBUG_SPI -#define PRINTD(fmt,args...) printf (fmt ,##args) -#else -#define PRINTD(fmt,args...) -#endif - -struct soft_spi_slave { - struct spi_slave slave; - unsigned int mode; -}; - -static inline struct soft_spi_slave *to_soft_spi(struct spi_slave *slave) -{ - return container_of(slave, struct soft_spi_slave, slave); -} - -/*=====================================================================*/ -/* Public Functions */ -/*=====================================================================*/ - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct soft_spi_slave *ss; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - ss = spi_alloc_slave(struct soft_spi_slave, bus, cs); - if (!ss) - return NULL; - - ss->mode = mode; - - /* TODO: Use max_hz to limit the SCK rate */ - - return &ss->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct soft_spi_slave *ss = to_soft_spi(slave); - - free(ss); -} - -int spi_claim_bus(struct spi_slave *slave) -{ -#ifdef CONFIG_SYS_IMMR - volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; -#endif - struct soft_spi_slave *ss = to_soft_spi(slave); - - /* - * Make sure the SPI clock is in idle state as defined for - * this slave. - */ - if (ss->mode & SPI_CPOL) - SPI_SCL(1); - else - SPI_SCL(0); - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - /* Nothing to do */ -} - -/*----------------------------------------------------------------------- - * SPI transfer - * - * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks - * "bitlen" bits in the SPI MISO port. That's just the way SPI works. - * - * The source of the outgoing bits is the "dout" parameter and the - * destination of the input bits is the "din" parameter. Note that "dout" - * and "din" can point to the same memory location, in which case the - * input data overwrites the output data (since both are buffered by - * temporary variables, this is OK). - */ -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ -#ifdef CONFIG_SYS_IMMR - volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; -#endif - struct soft_spi_slave *ss = to_soft_spi(slave); - uchar tmpdin = 0; - uchar tmpdout = 0; - const u8 *txd = dout; - u8 *rxd = din; - int cpol = ss->mode & SPI_CPOL; - int cpha = ss->mode & SPI_CPHA; - unsigned int j; - - PRINTD("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", - slave->bus, slave->cs, *(uint *)txd, *(uint *)rxd, bitlen); - - if (flags & SPI_XFER_BEGIN) - spi_cs_activate(slave); - - for(j = 0; j < bitlen; j++) { - /* - * Check if it is time to work on a new byte. - */ - if ((j % 8) == 0) { - if (txd) - tmpdout = *txd++; - else - tmpdout = 0; - if(j != 0) { - if (rxd) - *rxd++ = tmpdin; - } - tmpdin = 0; - } - - if (!cpha) - SPI_SCL(!cpol); - SPI_SDA(tmpdout & 0x80); - SPI_DELAY; - if (cpha) - SPI_SCL(!cpol); - else - SPI_SCL(cpol); - tmpdin <<= 1; - tmpdin |= SPI_READ; - tmpdout <<= 1; - SPI_DELAY; - if (cpha) - SPI_SCL(cpol); - } - /* - * If the number of bits isn't a multiple of 8, shift the last - * bits over to left-justify them. Then store the last byte - * read in. - */ - if (rxd) { - if ((bitlen % 8) != 0) - tmpdin <<= 8 - (bitlen % 8); - *rxd++ = tmpdin; - } - - if (flags & SPI_XFER_END) - spi_cs_deactivate(slave); - - return(0); -} diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index bda477cc16..a54f4ca251 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -320,9 +320,6 @@ #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } -/* SPI */ -#undef CONFIG_SOFT_SPI /* SPI bit-banged */ - /* GPIOs. Used as SPI chip selects */ #define CONFIG_SYS_GPIO1_PRELIM #define CONFIG_SYS_GPIO1_DIR 0xC0000000 /* SPI CS on 0, LED on 1 */ diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 24fea68a11..72717e89bb 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -58,22 +58,15 @@ /* * SPI and LCD */ -#ifdef CONFIG_CMD_SPI -#define CONFIG_SOFT_SPI #define CONFIG_LCD_ROTATION #define CONFIG_PXA_LCD #define CONFIG_LMS283GF05 -#define SPI_DELAY udelay(10) -#define SPI_SDA(val) zipitz2_spi_sda(val) -#define SPI_SCL(val) zipitz2_spi_scl(val) -#define SPI_READ zipitz2_spi_read() #ifndef __ASSEMBLY__ void zipitz2_spi_sda(int); void zipitz2_spi_scl(int); unsigned char zipitz2_spi_read(void); #endif -#endif #define CONFIG_SYS_DEVICE_NULLDEV 1 From patchwork Tue Nov 20 12:48:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000480 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Tue, 20 Nov 2018 12:51:06 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2E634C22051; Tue, 20 Nov 2018 12:49:58 +0000 (UTC) Received: from mail-pf1-f195.google.com (mail-pf1-f195.google.com [209.85.210.195]) by lists.denx.de (Postfix) with ESMTPS id 875B8C220FC for ; Tue, 20 Nov 2018 12:49:54 +0000 (UTC) Received: by mail-pf1-f195.google.com with SMTP id c72so957337pfc.6 for ; Tue, 20 Nov 2018 04:49:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=b6+aNcepPfa3BFrZXODnBLd40kqzt/AujBj3bm5Evc0=; b=RGOQExcjX32EDQCG+c3PCUIYbfCHbRw8/fi23pPjAT2NOfxI8rzRUzTrntcX8qymrU DPNRyFE4r5urav19lfIFA8MYcwkw0+xEPwDXGnCDiJfMKpGCcm2L14iJFCud6B/eObtA f7KlCkAtP0MCMRzgJ8z+xciYkIP0HnSkmxScU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=b6+aNcepPfa3BFrZXODnBLd40kqzt/AujBj3bm5Evc0=; b=iz+wH3TBUL9ehu3EzC+AbHX8QkW3xScIvw7fXQmHQfZxNP7VsyX9uoZzN8UxeNQzH/ eXl5oC6OUhzPfTHp8MOXhdiKbfuSNWZ1yxRyBc/QLEiq0JDqFnkpWVWMMC0TWNhYtQ/b ZSpnXwX1tdq9+FbO5PcAIHpMtPvuCTx5o6PzMjYG6Subh9xDMJU3kPqJfZlXAa5blKUQ zJ8lWsM77xizg1FTCACp+DG1hDHJhCtYr8dpgB74zo5deij6bAj7Sska31G6cUnV5ZuL dx0NgFxnUv9zdLVj5i4y8aDCwJFwXiRrk2VRUrz72nlNIr4wM/t3VQiLeQEs9nuf9si2 13Kg== X-Gm-Message-State: AGRZ1gJOxBqkMdEN72D30xPL0WQR36vpn2Jqu5Am/uSdc/6YHdKK0NNW S/xPSsXRnJeD7UA/7E3X6ne9SeRl59U= X-Google-Smtp-Source: AJdET5eCUAU0fUEr/Chmdwq5e3IEFTZEdNj7mwvXorgSDH5YUNFdNjxw2vmQJ/Fhbc6BwyB5aUQVfw== X-Received: by 2002:a62:8893:: with SMTP id l141mr2005451pfd.1.1542718192647; Tue, 20 Nov 2018 04:49:52 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:52 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:09 +0530 Message-Id: <20181120124814.23293-30-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 29/34] spi: Zap mpc8xx_spi driver-related code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Dropped - mpc8xx_spi driver - SPI, SPI flash CONFIG-items - CMD_SPI, CMD_SF..etc Dropped becuase - no active updates - no dm conversion - no reponse for dm converted patch - driver-model migration expiry Signed-off-by: Jagan Teki --- cmd/eeprom.c | 4 +- common/board_r.c | 7 - drivers/spi/Kconfig | 6 - drivers/spi/Makefile | 1 - drivers/spi/mpc8xx_spi.c | 335 --------------------------------------- include/common.h | 7 - 6 files changed, 2 insertions(+), 358 deletions(-) delete mode 100644 drivers/spi/mpc8xx_spi.c diff --git a/cmd/eeprom.c b/cmd/eeprom.c index 4052cf494a..a5b5d02073 100644 --- a/cmd/eeprom.c +++ b/cmd/eeprom.c @@ -67,7 +67,7 @@ __weak int eeprom_write_enable(unsigned dev_addr, int state) void eeprom_init(int bus) { /* SPI EEPROM */ -#if defined(CONFIG_MPC8XX_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) +#if !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) spi_init_f(); #endif @@ -130,7 +130,7 @@ static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen, int ret = 0; /* SPI */ -#if defined(CONFIG_MPC8XX_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) +#if !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) if (read) spi_read(addr, alen, buffer, len); else diff --git a/common/board_r.c b/common/board_r.c index c55e33eec2..3ccef5467b 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -382,13 +382,6 @@ static int initr_flash(void) #if defined(CONFIG_PPC) && !defined(CONFIG_DM_SPI) static int initr_spi(void) { - /* MPC8xx does this here */ -#ifdef CONFIG_MPC8XX_SPI -#if !defined(CONFIG_ENV_IS_IN_EEPROM) - spi_init_f(); -#endif - spi_init_r(); -#endif return 0; } #endif diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index dab48ccbfc..3aff989a0e 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -311,12 +311,6 @@ config KIRKWOOD_SPI Enable support for SPI on various Marvell SoCs, such as Kirkwood and Armada 375. -config MPC8XX_SPI - bool "MPC8XX SPI Driver" - depends on MPC8xx - help - Enable support for SPI on MPC8XX - config MPC8XXX_SPI bool "MPC8XXX SPI Driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 49e614e124..09e22dc233 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -30,7 +30,6 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o obj-$(CONFIG_ICH_SPI) += ich.o -obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o obj-$(CONFIG_MT7621_SPI) += mt7621_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o obj-$(CONFIG_MXC_SPI) += mxc_spi.o diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c deleted file mode 100644 index 285fd4d2cc..0000000000 --- a/drivers/spi/mpc8xx_spi.c +++ /dev/null @@ -1,335 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2001 Navin Boppuri / Prashant Patel - * , - * - * Copyright (c) 2001 Gerd Mennchen - * Copyright (c) 2001 Wolfgang Denk, DENX Software Engineering, . - */ - -/* - * MPC8xx CPM SPI interface. - * - * Parts of this code are probably not portable and/or specific to - * the board which I used for the tests. Please send fixes/complaints - * to wd@denx.de - * - */ - -#include -#include -#include -#include -#include -#include -#include - -#define SPI_EEPROM_WREN 0x06 -#define SPI_EEPROM_RDSR 0x05 -#define SPI_EEPROM_READ 0x03 -#define SPI_EEPROM_WRITE 0x02 - -/* --------------------------------------------------------------- - * Offset for initial SPI buffers in DPRAM: - * We need a 520 byte scratch DPRAM area to use at an early stage. - * It is used between the two initialization calls (spi_init_f() - * and spi_init_r()). - * The value 0xb00 makes it far enough from the start of the data - * area (as well as from the stack pointer). - * --------------------------------------------------------------- */ -#ifndef CONFIG_SYS_SPI_INIT_OFFSET -#define CONFIG_SYS_SPI_INIT_OFFSET 0xB00 -#endif - -#define CPM_SPI_BASE_RX CPM_SPI_BASE -#define CPM_SPI_BASE_TX (CPM_SPI_BASE + sizeof(cbd_t)) - -/* ------------------- - * Function prototypes - * ------------------- */ -ssize_t spi_xfer(size_t); - -/* ------------------- - * Variables - * ------------------- */ - -#define MAX_BUFFER 0x104 - -/* ---------------------------------------------------------------------- - * Initially we place the RX and TX buffers at a fixed location in DPRAM! - * ---------------------------------------------------------------------- */ -static uchar *rxbuf = - (uchar *)&((cpm8xx_t *)&((immap_t *)CONFIG_SYS_IMMR)->im_cpm)->cp_dpmem - [CONFIG_SYS_SPI_INIT_OFFSET]; -static uchar *txbuf = - (uchar *)&((cpm8xx_t *)&((immap_t *)CONFIG_SYS_IMMR)->im_cpm)->cp_dpmem - [CONFIG_SYS_SPI_INIT_OFFSET+MAX_BUFFER]; - -/* ************************************************************************** - * - * Function: spi_init_f - * - * Description: Init SPI-Controller (ROM part) - * - * return: --- - * - * *********************************************************************** */ -void spi_init_f(void) -{ - immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR; - cpm8xx_t __iomem *cp = &immr->im_cpm; - spi_t __iomem *spi = (spi_t __iomem *)&cp->cp_dparam[PROFF_SPI]; - cbd_t __iomem *tbdf, *rbdf; - - /* Disable relocation */ - out_be16(&spi->spi_rpbase, 0); - -/* 1 */ - /* ------------------------------------------------ - * Initialize Port B SPI pins -> page 34-8 MPC860UM - * (we are only in Master Mode !) - * ------------------------------------------------ */ - - /* -------------------------------------------- - * GPIO or per. Function - * PBPAR[28] = 1 [0x00000008] -> PERI: (SPIMISO) - * PBPAR[29] = 1 [0x00000004] -> PERI: (SPIMOSI) - * PBPAR[30] = 1 [0x00000002] -> PERI: (SPICLK) - * PBPAR[31] = 0 [0x00000001] -> GPIO: (CS for PCUE/CCM-EEPROM) - * -------------------------------------------- */ - clrsetbits_be32(&cp->cp_pbpar, 0x00000001, 0x0000000E); /* set bits */ - - /* ---------------------------------------------- - * In/Out or per. Function 0/1 - * PBDIR[28] = 1 [0x00000008] -> PERI1: SPIMISO - * PBDIR[29] = 1 [0x00000004] -> PERI1: SPIMOSI - * PBDIR[30] = 1 [0x00000002] -> PERI1: SPICLK - * PBDIR[31] = 1 [0x00000001] -> GPIO OUT: CS for PCUE/CCM-EEPROM - * ---------------------------------------------- */ - setbits_be32(&cp->cp_pbdir, 0x0000000F); - - /* ---------------------------------------------- - * open drain or active output - * PBODR[28] = 1 [0x00000008] -> open drain: SPIMISO - * PBODR[29] = 0 [0x00000004] -> active output SPIMOSI - * PBODR[30] = 0 [0x00000002] -> active output: SPICLK - * PBODR[31] = 0 [0x00000001] -> active output GPIO OUT: CS for PCUE/CCM - * ---------------------------------------------- */ - - clrsetbits_be16(&cp->cp_pbodr, 0x00000007, 0x00000008); - - /* Initialize the parameter ram. - * We need to make sure many things are initialized to zero - */ - out_be32(&spi->spi_rstate, 0); - out_be32(&spi->spi_rdp, 0); - out_be16(&spi->spi_rbptr, 0); - out_be16(&spi->spi_rbc, 0); - out_be32(&spi->spi_rxtmp, 0); - out_be32(&spi->spi_tstate, 0); - out_be32(&spi->spi_tdp, 0); - out_be16(&spi->spi_tbptr, 0); - out_be16(&spi->spi_tbc, 0); - out_be32(&spi->spi_txtmp, 0); - -/* 3 */ - /* Set up the SPI parameters in the parameter ram */ - out_be16(&spi->spi_rbase, CPM_SPI_BASE_RX); - out_be16(&spi->spi_tbase, CPM_SPI_BASE_TX); - - /***********IMPORTANT******************/ - - /* - * Setting transmit and receive buffer descriptor pointers - * initially to rbase and tbase. Only the microcode patches - * documentation talks about initializing this pointer. This - * is missing from the sample I2C driver. If you dont - * initialize these pointers, the kernel hangs. - */ - out_be16(&spi->spi_rbptr, CPM_SPI_BASE_RX); - out_be16(&spi->spi_tbptr, CPM_SPI_BASE_TX); - -/* 4 */ - /* Init SPI Tx + Rx Parameters */ - while (in_be16(&cp->cp_cpcr) & CPM_CR_FLG) - ; - - out_be16(&cp->cp_cpcr, mk_cr_cmd(CPM_CR_CH_SPI, CPM_CR_INIT_TRX) | - CPM_CR_FLG); - while (in_be16(&cp->cp_cpcr) & CPM_CR_FLG) - ; - -/* 5 */ - /* Set SDMA configuration register */ - out_be32(&immr->im_siu_conf.sc_sdcr, 0x0001); - -/* 6 */ - /* Set to big endian. */ - out_8(&spi->spi_tfcr, SMC_EB); - out_8(&spi->spi_rfcr, SMC_EB); - -/* 7 */ - /* Set maximum receive size. */ - out_be16(&spi->spi_mrblr, MAX_BUFFER); - -/* 8 + 9 */ - /* tx and rx buffer descriptors */ - tbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_TX]; - rbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_RX]; - - clrbits_be16(&tbdf->cbd_sc, BD_SC_READY); - clrbits_be16(&rbdf->cbd_sc, BD_SC_EMPTY); - - /* Set the bd's rx and tx buffer address pointers */ - out_be32(&rbdf->cbd_bufaddr, (ulong)rxbuf); - out_be32(&tbdf->cbd_bufaddr, (ulong)txbuf); - -/* 10 + 11 */ - out_8(&cp->cp_spim, 0); /* Mask all SPI events */ - out_8(&cp->cp_spie, SPI_EMASK); /* Clear all SPI events */ - - return; -} - -/* ************************************************************************** - * - * Function: spi_init_r - * - * Description: Init SPI-Controller (RAM part) - - * The malloc engine is ready and we can move our buffers to - * normal RAM - * - * return: --- - * - * *********************************************************************** */ -void spi_init_r(void) -{ - immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR; - cpm8xx_t __iomem *cp = &immr->im_cpm; - spi_t __iomem *spi = (spi_t __iomem *)&cp->cp_dparam[PROFF_SPI]; - cbd_t __iomem *tbdf, *rbdf; - - /* Disable relocation */ - out_be16(&spi->spi_rpbase, 0); - - /* tx and rx buffer descriptors */ - tbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_TX]; - rbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_RX]; - - /* Allocate memory for RX and TX buffers */ - rxbuf = (uchar *)malloc(MAX_BUFFER); - txbuf = (uchar *)malloc(MAX_BUFFER); - - out_be32(&rbdf->cbd_bufaddr, (ulong)rxbuf); - out_be32(&tbdf->cbd_bufaddr, (ulong)txbuf); - - return; -} - -/**************************************************************************** - * Function: spi_write - **************************************************************************** */ -ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len) -{ - int i; - - memset(rxbuf, 0, MAX_BUFFER); - memset(txbuf, 0, MAX_BUFFER); - *txbuf = SPI_EEPROM_WREN; /* write enable */ - spi_xfer(1); - memcpy(txbuf, addr, alen); - *txbuf = SPI_EEPROM_WRITE; /* WRITE memory array */ - memcpy(alen + txbuf, buffer, len); - spi_xfer(alen + len); - /* ignore received data */ - for (i = 0; i < 1000; i++) { - *txbuf = SPI_EEPROM_RDSR; /* read status */ - txbuf[1] = 0; - spi_xfer(2); - if (!(rxbuf[1] & 1)) - break; - udelay(1000); - } - if (i >= 1000) - printf("*** spi_write: Time out while writing!\n"); - - return len; -} - -/**************************************************************************** - * Function: spi_read - **************************************************************************** */ -ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len) -{ - memset(rxbuf, 0, MAX_BUFFER); - memset(txbuf, 0, MAX_BUFFER); - memcpy(txbuf, addr, alen); - *txbuf = SPI_EEPROM_READ; /* READ memory array */ - - /* - * There is a bug in 860T (?) that cuts the last byte of input - * if we're reading into DPRAM. The solution we choose here is - * to always read len+1 bytes (we have one extra byte at the - * end of the buffer). - */ - spi_xfer(alen + len + 1); - memcpy(buffer, alen + rxbuf, len); - - return len; -} - -/**************************************************************************** - * Function: spi_xfer - **************************************************************************** */ -ssize_t spi_xfer(size_t count) -{ - immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR; - cpm8xx_t __iomem *cp = &immr->im_cpm; - spi_t __iomem *spi = (spi_t __iomem *)&cp->cp_dparam[PROFF_SPI]; - cbd_t __iomem *tbdf, *rbdf; - int tm; - - /* Disable relocation */ - out_be16(&spi->spi_rpbase, 0); - - tbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_TX]; - rbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_RX]; - - /* Set CS for device */ - clrbits_be32(&cp->cp_pbdat, 0x0001); - - /* Setting tx bd status and data length */ - out_be16(&tbdf->cbd_sc, BD_SC_READY | BD_SC_LAST | BD_SC_WRAP); - out_be16(&tbdf->cbd_datlen, count); - - /* Setting rx bd status and data length */ - out_be16(&rbdf->cbd_sc, BD_SC_EMPTY | BD_SC_WRAP); - out_be16(&rbdf->cbd_datlen, 0); /* rx length has no significance */ - - clrsetbits_be16(&cp->cp_spmode, ~SPMODE_LOOP, SPMODE_REV | SPMODE_MSTR | - SPMODE_EN | SPMODE_LEN(8) | SPMODE_PM(0x8)); - out_8(&cp->cp_spim, 0); /* Mask all SPI events */ - out_8(&cp->cp_spie, SPI_EMASK); /* Clear all SPI events */ - - /* start spi transfer */ - setbits_8(&cp->cp_spcom, SPI_STR); /* Start transmit */ - - /* -------------------------------- - * Wait for SPI transmit to get out - * or time out (1 second = 1000 ms) - * -------------------------------- */ - for (tm = 0; tm < 1000; ++tm) { - if (in_8(&cp->cp_spie) & SPI_TXB) /* Tx Buffer Empty */ - break; - if ((in_be16(&tbdf->cbd_sc) & BD_SC_READY) == 0) - break; - udelay(1000); - } - if (tm >= 1000) - printf("*** spi_xfer: Time out while xferring to/from SPI!\n"); - - /* Clear CS for device */ - setbits_be32(&cp->cp_pbdat, 0x0001); - - return count; -} diff --git a/include/common.h b/include/common.h index 8b9f859c07..ea92426b02 100644 --- a/include/common.h +++ b/include/common.h @@ -279,13 +279,6 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned c # define CONFIG_SYS_DEF_EEPROM_ADDR CONFIG_SYS_I2C_EEPROM_ADDR #endif -#if defined(CONFIG_MPC8XX_SPI) -extern void spi_init_f (void); -extern void spi_init_r (void); -extern ssize_t spi_read (uchar *, int, uchar *, int); -extern ssize_t spi_write (uchar *, int, uchar *, int); -#endif - /* $(BOARD)/$(BOARD).c */ int board_early_init_f (void); int board_fix_fdt (void *rw_fdt_blob); /* manipulate the U-Boot fdt before its relocation */ From patchwork Tue Nov 20 12:48:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000483 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="iyjrKvJb"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zmML0CtTz9s0n for ; Wed, 21 Nov 2018 00:12:13 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 9E53EC2206B; Tue, 20 Nov 2018 13:02:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9941BC220AA; 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bh=3+zrc8YXdu1YPs3Ta/qcyBsbCfSMa9I+/ZdZimt8nJQ=; b=pdmK1Lbp6dQUDAD53gX9AAeHbgGoffWJJxwqyjc0c/ZupZIUYBh3btC/QahBLu8lY1 E1pIFMemGQkFRo0FpCuZokSKf+UIP2g/NE1xHoULRDOItGVhJ/AK356wKtxy+VyMe1M2 KM7nusEPATjnJaroxWI27oWOmdo2s5TTsoJdarTJLS5mczxWXX7JSTJqcidPapXgM/Kv 2y1bHbed8pUqMXxr1aedcAg6DD3FUEv+C7XRu9IYHjdj6vguBuUFTUWIrYS5/fYoswq4 Pz1mam/LJPIqHD3dgx5DPp4ssAOfA6Nh/Pm+ZMp9mW2dWLIGKZrcdu0J2waDY+l7Wf2e qQ8Q== X-Gm-Message-State: AA+aEWbukthDkl+2hA8qClSndsZhnhm/GdqgvgsGiOnLpzzpkThh29oL cymCAsr/XmyMFRLQiFmAYa0Tk994IIs= X-Google-Smtp-Source: AFSGD/V42PIGar1HY5z10UPzK37xu7Jvnk61GJzq+VFolJ8XmtkB2Vw0kGyPKGyZ6+ug+nHVm0dXbw== X-Received: by 2002:a17:902:8c91:: with SMTP id t17mr2020916plo.119.1542718195053; Tue, 20 Nov 2018 04:49:55 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:54 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:10 +0530 Message-Id: <20181120124814.23293-31-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 30/34] spi: Zap mxc_spi driver-related code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Dropped - mxc_spi driver - SPI, SPI flash CONFIG-items - CMD_SPI, CMD_SF..etc Dropped becuase - no active updates - no dm conversion - no reponse for dm converted patch - driver-model migration expiry Signed-off-by: Jagan Teki --- Makefile | 2 +- drivers/spi/Makefile | 2 +- drivers/spi/mxc_spi.c | 123 ++---------------------------------------- drivers/spi/spi.c | 1 + 4 files changed, 6 insertions(+), 122 deletions(-) diff --git a/Makefile b/Makefile index 7c1d934493..3be3bb3118 100644 --- a/Makefile +++ b/Makefile @@ -920,7 +920,7 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) endif ifeq ($(CONFIG_DM_SPI),) ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) $(CONFIG_MPC8XXX_SPI) \ - $(CONFIG_TI_QSPI),y),y) + $(CONFIG_MXC_SPI) $(CONFIG_TI_QSPI),y),y) @echo "===================== WARNING ======================" @echo "This board uses SPI driver from drivers/spi/ without" @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 09e22dc233..549d104016 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -9,6 +9,7 @@ obj-y += spi-uclass.o obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o +obj-$(CONFIG_MXC_SPI) += mxc_spi.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o @@ -32,7 +33,6 @@ obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o obj-$(CONFIG_ICH_SPI) += ich.o obj-$(CONFIG_MT7621_SPI) += mt7621_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o -obj-$(CONFIG_MXC_SPI) += mxc_spi.o obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_PIC32_SPI) += pic32_spi.o diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index b2636909ce..f6c6685e7e 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -57,26 +57,6 @@ static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave) return container_of(slave, struct mxc_spi_slave, slave); } -static void mxc_spi_cs_activate(struct mxc_spi_slave *mxcs) -{ - if (CONFIG_IS_ENABLED(DM_SPI)) { - dm_gpio_set_value(&mxcs->ss, 1); - } else { - if (mxcs->gpio > 0) - gpio_set_value(mxcs->gpio, mxcs->ss_pol); - } -} - -static void mxc_spi_cs_deactivate(struct mxc_spi_slave *mxcs) -{ - if (CONFIG_IS_ENABLED(DM_SPI)) { - dm_gpio_set_value(&mxcs->ss, 0); - } else { - if (mxcs->gpio > 0) - gpio_set_value(mxcs->gpio, !(mxcs->ss_pol)); - } -} - u32 get_cspi_div(u32 div) { int i; @@ -345,7 +325,7 @@ static int mxc_spi_xfer_internal(struct mxc_spi_slave *mxcs, return -EINVAL; if (flags & SPI_XFER_BEGIN) - mxc_spi_cs_activate(mxcs); + dm_gpio_set_value(&mxcs->ss, 1); while (n_bytes > 0) { if (n_bytes < MAX_SPI_BYTES) @@ -366,9 +346,8 @@ static int mxc_spi_xfer_internal(struct mxc_spi_slave *mxcs, n_bytes -= blk_size; } - if (flags & SPI_XFER_END) { - mxc_spi_cs_deactivate(mxcs); - } + if (flags & SPI_XFER_END) + dm_gpio_set_value(&mxcs->ss, 0); return 0; } @@ -391,101 +370,6 @@ static int mxc_spi_claim_bus_internal(struct mxc_spi_slave *mxcs, int cs) return 0; } -#ifndef CONFIG_DM_SPI -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); - - return mxc_spi_xfer_internal(mxcs, bitlen, dout, din, flags); -} - -/* - * Some SPI devices require active chip-select over multiple - * transactions, we achieve this using a GPIO. Still, the SPI - * controller has to be configured to use one of its own chipselects. - * To use this feature you have to implement board_spi_cs_gpio() to assign - * a gpio value for each cs (-1 if cs doesn't need to use gpio). - * You must use some unused on this SPI controller cs between 0 and 3. - */ -static int setup_cs_gpio(struct mxc_spi_slave *mxcs, - unsigned int bus, unsigned int cs) -{ - int ret; - - mxcs->gpio = board_spi_cs_gpio(bus, cs); - if (mxcs->gpio == -1) - return 0; - - gpio_request(mxcs->gpio, "spi-cs"); - ret = gpio_direction_output(mxcs->gpio, !(mxcs->ss_pol)); - if (ret) { - printf("mxc_spi: cannot setup gpio %d\n", mxcs->gpio); - return -EINVAL; - } - - return 0; -} - -static unsigned long spi_bases[] = { - MXC_SPI_BASE_ADDRESSES -}; - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct mxc_spi_slave *mxcs; - int ret; - - if (bus >= ARRAY_SIZE(spi_bases)) - return NULL; - - if (max_hz == 0) { - printf("Error: desired clock is 0\n"); - return NULL; - } - - mxcs = spi_alloc_slave(struct mxc_spi_slave, bus, cs); - if (!mxcs) { - puts("mxc_spi: SPI Slave not allocated !\n"); - return NULL; - } - - mxcs->ss_pol = (mode & SPI_CS_HIGH) ? 1 : 0; - - ret = setup_cs_gpio(mxcs, bus, cs); - if (ret < 0) { - free(mxcs); - return NULL; - } - - mxcs->base = spi_bases[bus]; - mxcs->max_hz = max_hz; - mxcs->mode = mode; - - return &mxcs->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); - - free(mxcs); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); - - return mxc_spi_claim_bus_internal(mxcs, slave->cs); -} - -void spi_release_bus(struct spi_slave *slave) -{ - /* TODO: Shut the controller down */ -} -#else - static int mxc_spi_probe(struct udevice *bus) { struct mxc_spi_slave *plat = bus->platdata; @@ -575,4 +459,3 @@ U_BOOT_DRIVER(mxc_spi) = { .platdata_auto_alloc_size = sizeof(struct mxc_spi_slave), .probe = mxc_spi_probe, }; -#endif diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 8116193d27..5c13f85841 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -43,6 +43,7 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus, defined(CONFIG_DAVINCI_SPI) || \ defined(CONFIG_KIRKWOOD_SPI) || \ defined(CONFIG_MPC8XXX_SPI) || \ + defined(CONFIG_MXC_SPI) || \ defined(CONFIG_TI_QSPI) void spi_cs_activate(struct spi_slave *slave) { From patchwork Tue Nov 20 12:48:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000479 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; 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Tue, 20 Nov 2018 04:49:57 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:56 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:11 +0530 Message-Id: <20181120124814.23293-32-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 31/34] spi: Zap omap3_spi driver-related code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Dropped - omap3_spi driver - SPI, SPI flash CONFIG-items - CMD_SPI, CMD_SF..etc Dropped becuase - no active updates - no dm conversion - no reponse for dm converted patch - driver-model migration expiry Signed-off-by: Jagan Teki --- Makefile | 2 +- drivers/spi/Makefile | 2 +- drivers/spi/omap3_spi.c | 126 ---------------------------------------- drivers/spi/spi.c | 1 + 4 files changed, 3 insertions(+), 128 deletions(-) diff --git a/Makefile b/Makefile index 3be3bb3118..00f0117b16 100644 --- a/Makefile +++ b/Makefile @@ -920,7 +920,7 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) endif ifeq ($(CONFIG_DM_SPI),) ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) $(CONFIG_MPC8XXX_SPI) \ - $(CONFIG_MXC_SPI) $(CONFIG_TI_QSPI),y),y) + $(CONFIG_MXC_SPI) $(CONFIG_OMAP3_SPI) $(CONFIG_TI_QSPI),y),y) @echo "===================== WARNING ======================" @echo "This board uses SPI driver from drivers/spi/ without" @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 549d104016..7de209830e 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o obj-$(CONFIG_MXC_SPI) += mxc_spi.o +obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o @@ -34,7 +35,6 @@ obj-$(CONFIG_ICH_SPI) += ich.o obj-$(CONFIG_MT7621_SPI) += mt7621_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o -obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_PIC32_SPI) += pic32_spi.o obj-$(CONFIG_PL022_SPI) += pl022_spi.o obj-$(CONFIG_RENESAS_RPC_SPI) += renesas_rpc_spi.o diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index c7fcf050a5..5e267d88d7 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -108,9 +108,6 @@ struct mcspi { }; struct omap3_spi_priv { -#ifndef CONFIG_DM_SPI - struct spi_slave slave; -#endif struct mcspi *regs; unsigned int cs; unsigned int freq; @@ -454,128 +451,6 @@ static void _omap3_spi_claim_bus(struct omap3_spi_priv *priv) writel(conf, &priv->regs->modulctrl); } -#ifndef CONFIG_DM_SPI - -static inline struct omap3_spi_priv *to_omap3_spi(struct spi_slave *slave) -{ - return container_of(slave, struct omap3_spi_priv, slave); -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - free(priv); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - spi_reset(priv->regs); - - _omap3_spi_claim_bus(priv); - _omap3_spi_set_wordlen(priv); - _omap3_spi_set_mode(priv); - _omap3_spi_set_speed(priv); - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - writel(OMAP3_MCSPI_MODULCTRL_MS, &priv->regs->modulctrl); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct omap3_spi_priv *priv; - struct mcspi *regs; - - /* - * OMAP3 McSPI (MultiChannel SPI) has 4 busses (modules) - * with different number of chip selects (CS, channels): - * McSPI1 has 4 CS (bus 0, cs 0 - 3) - * McSPI2 has 2 CS (bus 1, cs 0 - 1) - * McSPI3 has 2 CS (bus 2, cs 0 - 1) - * McSPI4 has 1 CS (bus 3, cs 0) - */ - - switch (bus) { - case 0: - regs = (struct mcspi *)OMAP3_MCSPI1_BASE; - break; -#ifdef OMAP3_MCSPI2_BASE - case 1: - regs = (struct mcspi *)OMAP3_MCSPI2_BASE; - break; -#endif -#ifdef OMAP3_MCSPI3_BASE - case 2: - regs = (struct mcspi *)OMAP3_MCSPI3_BASE; - break; -#endif -#ifdef OMAP3_MCSPI4_BASE - case 3: - regs = (struct mcspi *)OMAP3_MCSPI4_BASE; - break; -#endif - default: - printf("SPI error: unsupported bus %i. Supported busses 0 - 3\n", bus); - return NULL; - } - - if (((bus == 0) && (cs > 3)) || - ((bus == 1) && (cs > 1)) || - ((bus == 2) && (cs > 1)) || - ((bus == 3) && (cs > 0))) { - printf("SPI error: unsupported chip select %i on bus %i\n", cs, bus); - return NULL; - } - - if (max_hz > OMAP3_MCSPI_MAX_FREQ) { - printf("SPI error: unsupported frequency %i Hz. Max frequency is 48 MHz\n", - max_hz); - return NULL; - } - - if (mode > SPI_MODE_3) { - printf("SPI error: unsupported SPI mode %i\n", mode); - return NULL; - } - - priv = spi_alloc_slave(struct omap3_spi_priv, bus, cs); - if (!priv) { - printf("SPI error: malloc of SPI structure failed\n"); - return NULL; - } - - priv->regs = regs; - priv->cs = cs; - priv->freq = max_hz; - priv->mode = mode; - priv->wordlen = priv->slave.wordlen; -#if 0 - /* Please migrate to DM_SPI support for this feature. */ - priv->pin_dir = MCSPI_PINDIR_D0_OUT_D1_IN; -#endif - - return &priv->slave; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - return _spi_xfer(priv, bitlen, dout, din, flags); -} - -#else - static int omap3_spi_claim_bus(struct udevice *dev) { struct udevice *bus = dev->parent; @@ -700,4 +575,3 @@ U_BOOT_DRIVER(omap3_spi) = { .ops = &omap3_spi_ops, .priv_auto_alloc_size = sizeof(struct omap3_spi_priv), }; -#endif diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 5c13f85841..7f5863f904 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -44,6 +44,7 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus, defined(CONFIG_KIRKWOOD_SPI) || \ defined(CONFIG_MPC8XXX_SPI) || \ defined(CONFIG_MXC_SPI) || \ + defined(CONFIG_OMAP3_SPI) || \ defined(CONFIG_TI_QSPI) void spi_cs_activate(struct spi_slave *slave) { From patchwork Tue Nov 20 12:48:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000462 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; 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Tue, 20 Nov 2018 04:49:59 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:49:59 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:12 +0530 Message-Id: <20181120124814.23293-33-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 32/34] spi: Zap atmel_spi driver-related code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Dropped - atmel_spi driver - SPI, SPI flash CONFIG-items - CMD_SPI, CMD_SF..etc Dropped becuase - no active updates - no dm conversion - no reponse for dm converted patch - driver-model migration expiry Signed-off-by: Jagan Teki --- Makefile | 5 +- drivers/spi/Makefile | 2 +- drivers/spi/atmel_spi.c | 198 ---------------------------------------- drivers/spi/spi.c | 1 + 4 files changed, 5 insertions(+), 201 deletions(-) diff --git a/Makefile b/Makefile index 00f0117b16..502a8e15f8 100644 --- a/Makefile +++ b/Makefile @@ -919,8 +919,9 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) @echo "====================================================" endif ifeq ($(CONFIG_DM_SPI),) -ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) $(CONFIG_MPC8XXX_SPI) \ - $(CONFIG_MXC_SPI) $(CONFIG_OMAP3_SPI) $(CONFIG_TI_QSPI),y),y) +ifeq ($(filter $(CONFIG_ATMEL_SPI) $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) \ + $(CONFIG_MPC8XXX_SPI) $(CONFIG_MXC_SPI) $(CONFIG_OMAP3_SPI) \ + $(CONFIG_TI_QSPI),y),y) @echo "===================== WARNING ======================" @echo "This board uses SPI driver from drivers/spi/ without" @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 7de209830e..1c2d8c0d15 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -6,6 +6,7 @@ # There are many options which enable SPI, so make this library available ifdef CONFIG_DM_SPI obj-y += spi-uclass.o +obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o @@ -21,7 +22,6 @@ endif obj-$(CONFIG_ALTERA_SPI) += altera_spi.o obj-$(CONFIG_ATH79_SPI) += ath79_spi.o -obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o obj-$(CONFIG_BCM63XX_HSSPI) += bcm63xx_hsspi.o obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c index cf4de9ee1a..fad67137b9 100644 --- a/drivers/spi/atmel_spi.c +++ b/drivers/spi/atmel_spi.c @@ -14,210 +14,13 @@ #include #include -#ifdef CONFIG_DM_SPI #include -#endif #ifdef CONFIG_DM_GPIO #include #endif #include "atmel_spi.h" -#ifndef CONFIG_DM_SPI - -static int spi_has_wdrbt(struct atmel_spi_slave *slave) -{ - unsigned int ver; - - ver = spi_readl(slave, VERSION); - - return (ATMEL_SPI_VERSION_REV(ver) >= 0x210); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct atmel_spi_slave *as; - unsigned int scbr; - u32 csrx; - void *regs; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - switch (bus) { - case 0: - regs = (void *)ATMEL_BASE_SPI0; - break; -#ifdef ATMEL_BASE_SPI1 - case 1: - regs = (void *)ATMEL_BASE_SPI1; - break; -#endif -#ifdef ATMEL_BASE_SPI2 - case 2: - regs = (void *)ATMEL_BASE_SPI2; - break; -#endif -#ifdef ATMEL_BASE_SPI3 - case 3: - regs = (void *)ATMEL_BASE_SPI3; - break; -#endif - default: - return NULL; - } - - - scbr = (get_spi_clk_rate(bus) + max_hz - 1) / max_hz; - if (scbr > ATMEL_SPI_CSRx_SCBR_MAX) - /* Too low max SCK rate */ - return NULL; - if (scbr < 1) - scbr = 1; - - csrx = ATMEL_SPI_CSRx_SCBR(scbr); - csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8); - if (!(mode & SPI_CPHA)) - csrx |= ATMEL_SPI_CSRx_NCPHA; - if (mode & SPI_CPOL) - csrx |= ATMEL_SPI_CSRx_CPOL; - - as = spi_alloc_slave(struct atmel_spi_slave, bus, cs); - if (!as) - return NULL; - - as->regs = regs; - as->mr = ATMEL_SPI_MR_MSTR | ATMEL_SPI_MR_MODFDIS - | ATMEL_SPI_MR_PCS(~(1 << cs) & 0xf); - if (spi_has_wdrbt(as)) - as->mr |= ATMEL_SPI_MR_WDRBT; - - spi_writel(as, CSR(cs), csrx); - - return &as->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct atmel_spi_slave *as = to_atmel_spi(slave); - - free(as); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct atmel_spi_slave *as = to_atmel_spi(slave); - - /* Enable the SPI hardware */ - spi_writel(as, CR, ATMEL_SPI_CR_SPIEN); - - /* - * Select the slave. This should set SCK to the correct - * initial state, etc. - */ - spi_writel(as, MR, as->mr); - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct atmel_spi_slave *as = to_atmel_spi(slave); - - /* Disable the SPI hardware */ - spi_writel(as, CR, ATMEL_SPI_CR_SPIDIS); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct atmel_spi_slave *as = to_atmel_spi(slave); - unsigned int len_tx; - unsigned int len_rx; - unsigned int len; - u32 status; - const u8 *txp = dout; - u8 *rxp = din; - u8 value; - - if (bitlen == 0) - /* Finish any previously submitted transfers */ - goto out; - - /* - * TODO: The controller can do non-multiple-of-8 bit - * transfers, but this driver currently doesn't support it. - * - * It's also not clear how such transfers are supposed to be - * represented as a stream of bytes...this is a limitation of - * the current SPI interface. - */ - if (bitlen % 8) { - /* Errors always terminate an ongoing transfer */ - flags |= SPI_XFER_END; - goto out; - } - - len = bitlen / 8; - - /* - * The controller can do automatic CS control, but it is - * somewhat quirky, and it doesn't really buy us much anyway - * in the context of U-Boot. - */ - if (flags & SPI_XFER_BEGIN) { - spi_cs_activate(slave); - /* - * sometimes the RDR is not empty when we get here, - * in theory that should not happen, but it DOES happen. - * Read it here to be on the safe side. - * That also clears the OVRES flag. Required if the - * following loop exits due to OVRES! - */ - spi_readl(as, RDR); - } - - for (len_tx = 0, len_rx = 0; len_rx < len; ) { - status = spi_readl(as, SR); - - if (status & ATMEL_SPI_SR_OVRES) - return -1; - - if (len_tx < len && (status & ATMEL_SPI_SR_TDRE)) { - if (txp) - value = *txp++; - else - value = 0; - spi_writel(as, TDR, value); - len_tx++; - } - if (status & ATMEL_SPI_SR_RDRF) { - value = spi_readl(as, RDR); - if (rxp) - *rxp++ = value; - len_rx++; - } - } - -out: - if (flags & SPI_XFER_END) { - /* - * Wait until the transfer is completely done before - * we deactivate CS. - */ - do { - status = spi_readl(as, SR); - } while (!(status & ATMEL_SPI_SR_TXEMPTY)); - - spi_cs_deactivate(slave); - } - - return 0; -} - -#else - #define MAX_CS_COUNT 4 struct atmel_spi_platdata { @@ -507,4 +310,3 @@ U_BOOT_DRIVER(atmel_spi) = { .priv_auto_alloc_size = sizeof(struct atmel_spi_priv), .probe = atmel_spi_probe, }; -#endif diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 7f5863f904..3fc4db1dba 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -40,6 +40,7 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus, } #if !defined(CONFIG_DM_SPI) && \ + defined(CONFIG_ATMEL_SPI) || \ defined(CONFIG_DAVINCI_SPI) || \ defined(CONFIG_KIRKWOOD_SPI) || \ defined(CONFIG_MPC8XXX_SPI) || \ From patchwork Tue Nov 20 12:48:13 2018 Content-Type: text/plain; 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Tue, 20 Nov 2018 04:50:02 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.49.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:50:01 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:13 +0530 Message-Id: <20181120124814.23293-34-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 33/34] spi: fsl_dspi: Drop non-dm code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Look like all defconfigs are using DM_SPI, but it may grow the size if enable it globally. but due to DM_SPI migration policy remove non-dm code, and will discuss footprint issues if any? Signed-off-by: Jagan Teki --- drivers/spi/fsl_dspi.c | 132 ----------------------------------------- 1 file changed, 132 deletions(-) diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c index 764c94215e..2e1cf22eb0 100644 --- a/drivers/spi/fsl_dspi.c +++ b/drivers/spi/fsl_dspi.c @@ -97,13 +97,6 @@ struct fsl_dspi_priv { struct dspi *regs; }; -#ifndef CONFIG_DM_SPI -struct fsl_dspi { - struct spi_slave slave; - struct fsl_dspi_priv priv; -}; -#endif - __weak void cpu_dspi_port_conf(void) { } @@ -389,131 +382,7 @@ static int fsl_dspi_cfg_speed(struct fsl_dspi_priv *priv, uint speed) return 0; } -#ifndef CONFIG_DM_SPI -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - if (((cs >= 0) && (cs < 8)) && ((bus >= 0) && (bus < 8))) - return 1; - else - return 0; -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct fsl_dspi *dspi; - uint mcr_cfg_val; - - dspi = spi_alloc_slave(struct fsl_dspi, bus, cs); - if (!dspi) - return NULL; - - cpu_dspi_port_conf(); - -#ifdef CONFIG_SYS_FSL_DSPI_BE - dspi->priv.flags |= DSPI_FLAG_REGMAP_ENDIAN_BIG; -#endif - - dspi->priv.regs = (struct dspi *)MMAP_DSPI; - -#ifdef CONFIG_M68K - dspi->priv.bus_clk = gd->bus_clk; -#else - dspi->priv.bus_clk = mxc_get_clock(MXC_DSPI_CLK); -#endif - dspi->priv.speed_hz = FSL_DSPI_DEFAULT_SCK_FREQ; - - /* default: all CS signals inactive state is high */ - mcr_cfg_val = DSPI_MCR_MSTR | DSPI_MCR_PCSIS_MASK | - DSPI_MCR_CRXF | DSPI_MCR_CTXF; - fsl_dspi_init_mcr(&dspi->priv, mcr_cfg_val); - - for (i = 0; i < FSL_DSPI_MAX_CHIPSELECT; i++) - dspi->priv.ctar_val[i] = DSPI_CTAR_DEFAULT_VALUE; - -#ifdef CONFIG_SYS_DSPI_CTAR0 - if (FSL_DSPI_MAX_CHIPSELECT > 0) - dspi->priv.ctar_val[0] = CONFIG_SYS_DSPI_CTAR0; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR1 - if (FSL_DSPI_MAX_CHIPSELECT > 1) - dspi->priv.ctar_val[1] = CONFIG_SYS_DSPI_CTAR1; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR2 - if (FSL_DSPI_MAX_CHIPSELECT > 2) - dspi->priv.ctar_val[2] = CONFIG_SYS_DSPI_CTAR2; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR3 - if (FSL_DSPI_MAX_CHIPSELECT > 3) - dspi->priv.ctar_val[3] = CONFIG_SYS_DSPI_CTAR3; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR4 - if (FSL_DSPI_MAX_CHIPSELECT > 4) - dspi->priv.ctar_val[4] = CONFIG_SYS_DSPI_CTAR4; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR5 - if (FSL_DSPI_MAX_CHIPSELECT > 5) - dspi->priv.ctar_val[5] = CONFIG_SYS_DSPI_CTAR5; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR6 - if (FSL_DSPI_MAX_CHIPSELECT > 6) - dspi->priv.ctar_val[6] = CONFIG_SYS_DSPI_CTAR6; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR7 - if (FSL_DSPI_MAX_CHIPSELECT > 7) - dspi->priv.ctar_val[7] = CONFIG_SYS_DSPI_CTAR7; -#endif - fsl_dspi_cfg_speed(&dspi->priv, max_hz); - - /* configure transfer mode */ - fsl_dspi_cfg_ctar_mode(&dspi->priv, cs, mode); - - /* configure active state of CSX */ - fsl_dspi_cfg_cs_active_state(&dspi->priv, cs, mode); - - return &dspi->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - free(slave); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - uint sr_val; - struct fsl_dspi *dspi = (struct fsl_dspi *)slave; - - cpu_dspi_claim_bus(slave->bus, slave->cs); - - fsl_dspi_clr_fifo(&dspi->priv); - - /* check module TX and RX status */ - sr_val = dspi_read32(dspi->priv.flags, &dspi->priv.regs->sr); - if ((sr_val & DSPI_SR_TXRXS) != DSPI_SR_TXRXS) { - debug("DSPI RX/TX not ready!\n"); - return -EIO; - } - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct fsl_dspi *dspi = (struct fsl_dspi *)slave; - - dspi_halt(&dspi->priv, 1); - cpu_dspi_release_bus(slave->bus.slave->cs); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - struct fsl_dspi *dspi = (struct fsl_dspi *)slave; - return dspi_xfer(&dspi->priv, slave->cs, bitlen, dout, din, flags); -} -#else static int fsl_dspi_child_pre_probe(struct udevice *dev) { struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); @@ -720,4 +589,3 @@ U_BOOT_DRIVER(fsl_dspi) = { .child_pre_probe = fsl_dspi_child_pre_probe, .bind = fsl_dspi_bind, }; -#endif From patchwork Tue Nov 20 12:48:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1000484 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="VsDaSDvt"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zmMr759Fz9s0n for ; Wed, 21 Nov 2018 00:12:40 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 3EDB8C220B1; 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Tue, 20 Nov 2018 04:50:04 -0800 (PST) Received: from localhost.localdomain ([115.97.190.86]) by smtp.gmail.com with ESMTPSA id b5sm34880349pfc.150.2018.11.20.04.50.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 04:50:04 -0800 (PST) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 20 Nov 2018 18:18:14 +0530 Message-Id: <20181120124814.23293-35-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181120124814.23293-1-jagan@amarulasolutions.com> References: <20181120124814.23293-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH 34/34] dm: MIGRATION: spi: Update SPI driver status X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Update the spi driver dm-conversion status. Signed-off-by: Jagan Teki --- doc/driver-model/MIGRATION.txt | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/doc/driver-model/MIGRATION.txt b/doc/driver-model/MIGRATION.txt index 5ebefd608b..cfa71cc133 100644 --- a/doc/driver-model/MIGRATION.txt +++ b/doc/driver-model/MIGRATION.txt @@ -30,25 +30,10 @@ Status: In progress Deadline: 2018.09 No dm conversion yet: - drivers/spi/cf_spi.c drivers/spi/fsl_espi.c - drivers/spi/lpc32xx_ssp.c - drivers/spi/mpc8xx_spi.c - drivers/spi/mpc8xxx_spi.c - drivers/spi/mxs_spi.c - drivers/spi/sh_qspi.c - drivers/spi/sh_spi.c - drivers/spi/soft_spi_legacy.c Partially converted: - drivers/spi/atcspi200_spi.c - drivers/spi/davinci_spi.c - drivers/spi/fsl_dspi.c - drivers/spi/fsl_qspi.c - drivers/spi/kirkwood_spi.c - drivers/spi/mxc_spi.c - drivers/spi/omap3_spi.c - drivers/spi/ti_qspi.c + drivers/spi/sh_qspi.c -- Jagan Teki