From patchwork Wed Oct 11 07:00:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Yan X-Patchwork-Id: 824258 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3yBlHx0qj3z9t39 for ; Wed, 11 Oct 2017 18:01:00 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id A9BCFC21E3D; Wed, 11 Oct 2017 07:00:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.6 required=5.0 tests=RCVD_IN_SORBS_WEB autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 14A09C21D76; Wed, 11 Oct 2017 07:00:52 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2366CC21E68; Wed, 11 Oct 2017 07:00:41 +0000 (UTC) Received: from regular1.263xmail.com (regular1.263xmail.com [211.150.99.132]) by lists.denx.de (Postfix) with ESMTPS id 1C7BBC21E9C for ; Wed, 11 Oct 2017 07:00:39 +0000 (UTC) Received: from andy.yan?rock-chips.com (unknown [192.168.167.171]) by regular1.263xmail.com (Postfix) with ESMTP id 9320094EB for ; Wed, 11 Oct 2017 15:00:31 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id 6457E3DC; Wed, 11 Oct 2017 15:00:31 +0800 (CST) X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: sjg@chromium.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: yxj@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 26665UHHYHJ; Wed, 11 Oct 2017 15:00:32 +0800 (CST) From: Andy Yan To: sjg@chromium.org, philipp.tomsich@theobroma-systems.com Date: Wed, 11 Oct 2017 15:00:16 +0800 Message-Id: <1507705216-10673-1-git-send-email-andy.yan@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507705170-10619-1-git-send-email-andy.yan@rock-chips.com> References: <1507705170-10619-1-git-send-email-andy.yan@rock-chips.com> Cc: u-boot@lists.denx.de, Andy Yan , david.wu@rock-chips.com Subject: [U-Boot] [PATCH v3 1/3] rockchip: make boot_mode related codes reused across all platforms X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" setup_boot_mode function use the same logic but different mode register address across all the rockchip platforms, so it's better to make this function reused across all the platforms, and let the mode register address setting from the config file. Signed-off-by: Andy Yan Reviewed-by: Simon Glass Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- Changes in v3: - add support for rk3188 Changes in v2: - correct the rk322x boot mode register address - make the help text more clear arch/arm/include/asm/arch-rockchip/boot_mode.h | 2 ++ arch/arm/mach-rockchip/Kconfig | 15 ++++++++++++ arch/arm/mach-rockchip/Makefile | 6 +++++ arch/arm/mach-rockchip/boot_mode.c | 33 ++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3036-board.c | 24 ------------------- arch/arm/mach-rockchip/rk3188-board.c | 1 + arch/arm/mach-rockchip/rk322x-board.c | 24 ------------------- arch/arm/mach-rockchip/rk3288-board.c | 25 ------------------- arch/arm/mach-rockchip/rk3399-board.c | 14 +++++++++++ 9 files changed, 71 insertions(+), 73 deletions(-) create mode 100644 arch/arm/mach-rockchip/boot_mode.c create mode 100644 arch/arm/mach-rockchip/rk3399-board.c diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h index bd65f60..163b2e7 100644 --- a/arch/arm/include/asm/arch-rockchip/boot_mode.h +++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h @@ -16,4 +16,6 @@ /* enter usb mass storage mode */ #define BOOT_UMS (REBOOT_FLAG + 12) +int setup_boot_mode(void); + #endif diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 36df484..6144057 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -117,6 +117,7 @@ config ROCKCHIP_RK3399 select SPL_SERIAL_SUPPORT select SPL_DRIVERS_MISC_SUPPORT select DEBUG_UART_BOARD_INIT + select BOARD_LATE_INIT help The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 and quad-core Cortex-A53. @@ -152,6 +153,20 @@ config TPL_ROCKCHIP_BACK_TO_BROM SPL will return to the boot rom, which will then load the U-Boot binary to keep going on. +config ROCKCHIP_BOOT_MODE_REG + hex "Rockchip boot mode flag register address" + default 0x200081c8 if ROCKCHIP_RK3036 + default 0x20004040 if ROCKCHIP_RK3188 + default 0x110005c8 if ROCKCHIP_RK322X + default 0xff730094 if ROCKCHIP_RK3288 + default 0xff738200 if ROCKCHIP_RK3368 + default 0xff320300 if ROCKCHIP_RK3399 + default 0x10300580 if ROCKCHIP_RV1108 + default 0 + help + The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h) + according to the value from this register. + config ROCKCHIP_SPL_RESERVE_IRAM hex "Size of IRAM reserved in SPL" default 0x4000 diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index c15e9bf..2127f2b 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -22,10 +22,16 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) + +ifneq ($(CONFIG_ROCKCHIP_BOOT_MODE_REG),0) +obj-y += boot_mode.o +endif + obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o +obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board.o endif obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c new file mode 100644 index 0000000..4652490 --- /dev/null +++ b/arch/arm/mach-rockchip/boot_mode.c @@ -0,0 +1,33 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +int setup_boot_mode(void) +{ + void *reg = (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG; + int boot_mode = readl(reg); + + debug("boot mode %x.\n", boot_mode); + + /* Clear boot mode */ + writel(BOOT_NORMAL, reg); + + switch (boot_mode) { + case BOOT_FASTBOOT: + printf("enter fastboot!\n"); + env_set("preboot", "setenv preboot; fastboot usb0"); + break; + case BOOT_UMS: + printf("enter UMS!\n"); + env_set("preboot", "setenv preboot; ums mmc 0"); + break; + } + + return 0; +} diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c index a3457f3..a5d2571 100644 --- a/arch/arm/mach-rockchip/rk3036-board.c +++ b/arch/arm/mach-rockchip/rk3036-board.c @@ -19,30 +19,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define GRF_BASE 0x20008000 - -static void setup_boot_mode(void) -{ - struct rk3036_grf *const grf = (void *)GRF_BASE; - int boot_mode = readl(&grf->os_reg[4]); - - debug("boot mode %x.\n", boot_mode); - - /* Clear boot mode */ - writel(BOOT_NORMAL, &grf->os_reg[4]); - - switch (boot_mode) { - case BOOT_FASTBOOT: - printf("enter fastboot!\n"); - env_set("preboot", "setenv preboot; fastboot usb0"); - break; - case BOOT_UMS: - printf("enter UMS!\n"); - env_set("preboot", "setenv preboot; ums mmc 0"); - break; - } -} - __weak int rk_board_late_init(void) { return 0; diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c index 96859a5..916d18f 100644 --- a/arch/arm/mach-rockchip/rk3188-board.c +++ b/arch/arm/mach-rockchip/rk3188-board.c @@ -24,6 +24,7 @@ int board_late_init(void) { struct rk3188_grf *grf; + setup_boot_mode(); grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); if (IS_ERR(grf)) { pr_err("grf syscon returned %ld\n", PTR_ERR(grf)); diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c index d443114..e71847d 100644 --- a/arch/arm/mach-rockchip/rk322x-board.c +++ b/arch/arm/mach-rockchip/rk322x-board.c @@ -16,30 +16,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define GRF_BASE 0x11000000 - -static void setup_boot_mode(void) -{ - struct rk322x_grf *const grf = (void *)GRF_BASE; - int boot_mode = readl(&grf->os_reg[0]); - - debug("boot mode %x.\n", boot_mode); - - /* Clear boot mode */ - writel(BOOT_NORMAL, &grf->os_reg[0]); - - switch (boot_mode) { - case BOOT_FASTBOOT: - printf("enter fastboot!\n"); - env_set("preboot", "setenv preboot; fastboot usb0"); - break; - case BOOT_UMS: - printf("enter UMS!\n"); - env_set("preboot", "setenv preboot; ums mmc 0"); - break; - } -} - __weak int rk_board_late_init(void) { return 0; diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c index 278bb40..1c53cca 100644 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -23,31 +23,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define PMU_BASE 0xff730000 - -static void setup_boot_mode(void) -{ - struct rk3288_pmu *const pmu = (void *)PMU_BASE; - int boot_mode = readl(&pmu->sys_reg[0]); - - debug("boot mode %x.\n", boot_mode); - - /* Clear boot mode */ - writel(BOOT_NORMAL, &pmu->sys_reg[0]); - - switch (boot_mode) { - case BOOT_FASTBOOT: - printf("enter fastboot!\n"); - env_set("preboot", "setenv preboot; fastboot usb0"); - break; - case BOOT_UMS: - printf("enter UMS!\n"); - env_set("preboot", "setenv preboot; if mmc dev 0;" - "then ums mmc 0; else ums mmc 1;fi"); - break; - } -} - __weak int rk_board_late_init(void) { return 0; diff --git a/arch/arm/mach-rockchip/rk3399-board.c b/arch/arm/mach-rockchip/rk3399-board.c new file mode 100644 index 0000000..9293843 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3399-board.c @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2017 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +int board_late_init(void) +{ + setup_boot_mode(); + return 0; +} From patchwork Wed Oct 11 07:00:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Yan X-Patchwork-Id: 824259 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3yBlJj2ZX1z9t39 for ; Wed, 11 Oct 2017 18:01:41 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id CA920C21E70; Wed, 11 Oct 2017 07:01:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.6 required=5.0 tests=RCVD_IN_SORBS_WEB autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id ECB4BC21D76; Wed, 11 Oct 2017 07:01:28 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id D7568C21E3D; Wed, 11 Oct 2017 07:01:20 +0000 (UTC) Received: from regular1.263xmail.com (regular1.263xmail.com [211.150.99.140]) by lists.denx.de (Postfix) with ESMTPS id 1FBD0C21E52 for ; Wed, 11 Oct 2017 07:01:17 +0000 (UTC) Received: from andy.yan?rock-chips.com (unknown [192.168.167.171]) by regular1.263xmail.com (Postfix) with ESMTP id 24DB34A7D for ; Wed, 11 Oct 2017 15:01:11 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id 808C4323; Wed, 11 Oct 2017 15:01:03 +0800 (CST) X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: sjg@chromium.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: <328aed870637fc2f0435b51a65edeb5d> X-ATTACHMENT-NUM: 0 X-SENDER: yxj@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 265158GADDM; Wed, 11 Oct 2017 15:01:09 +0800 (CST) From: Andy Yan To: sjg@chromium.org, philipp.tomsich@theobroma-systems.com Date: Wed, 11 Oct 2017 15:00:49 +0800 Message-Id: <1507705249-10726-1-git-send-email-andy.yan@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507705170-10619-1-git-send-email-andy.yan@rock-chips.com> References: <1507705170-10619-1-git-send-email-andy.yan@rock-chips.com> Cc: u-boot@lists.denx.de, Andy Yan , david.wu@rock-chips.com Subject: [U-Boot] [PATCH v3 2/3] rockchip: add support for enter to bootrom download mode X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Rockchip bootrom will enter download mode if it returns from spl/tpl with a non-zero value and couldn't find a valid image in the backup partition. This patch provide a method to instruct the system to back to bootrom download mode by checking the BROM_DOWNLOAD_FLAG register. As the bootrom download function relys on some modules such as interrupts, so we need to back to bootrom as early as possbile before the tpl/spl code override the interrupt configurations. Signed-off-by: Andy Yan Reviewed-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- Changes in v3: - rebase on Dr. Philipp's series Changes in v2: - implement the back to bootrom download mode check in c, thanks for Dr. Philipp Tomsich's suggestion. arch/arm/include/asm/arch-rockchip/boot_mode.h | 4 +++ arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/bootrom.c | 47 ++++++++++++++++++++++++-- 3 files changed, 50 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h index 163b2e7..6b2a610 100644 --- a/arch/arm/include/asm/arch-rockchip/boot_mode.h +++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h @@ -15,7 +15,11 @@ #define BOOT_CHARGING (REBOOT_FLAG + 11) /* enter usb mass storage mode */ #define BOOT_UMS (REBOOT_FLAG + 12) +/* enter bootrom download mode */ +#define BOOT_BROM_DOWNLOAD 0xEF08A53C +#ifndef __ASSEMBLY__ int setup_boot_mode(void); +#endif #endif diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 6144057..a26736a 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -118,6 +118,7 @@ config ROCKCHIP_RK3399 select SPL_DRIVERS_MISC_SUPPORT select DEBUG_UART_BOARD_INIT select BOARD_LATE_INIT + select ROCKCHIP_BROM_HELPER help The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 and quad-core Cortex-A53. diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c index e369fdc..bef2a90 100644 --- a/arch/arm/mach-rockchip/bootrom.c +++ b/arch/arm/mach-rockchip/bootrom.c @@ -6,6 +6,8 @@ #include #include +#include +#include #include #include @@ -15,12 +17,45 @@ */ static jmp_buf brom_ctx __section(".data"); +static void _back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd) +{ + longjmp(brom_ctx, brom_cmd); +} + void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd) { #if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT) puts("Returning to boot ROM...\n"); #endif - longjmp(brom_ctx, brom_cmd); + _back_to_bootrom(brom_cmd); +} + +/* + * we back to bootrom download mode if get a + * BOOT_BROM_DOWNLOAD flag in boot mode register + * + * note: the boot mode register is configured by + * application(next stage bootloader, kernel, etc), + * and the bootrom never check this register, so we need + * to check it and back to bootrom at very early bootstage(before + * some basic configurations(such as interrupts) been + * changed by TPL/SPL, as the bootrom download operation + * relys on many default settings(such as interrupts) by + * it's self. + */ +static bool check_back_to_brom_dnl_flag(void) +{ + u32 boot_mode; + + if (CONFIG_ROCKCHIP_BOOT_MODE_REG) { + boot_mode = readl(CONFIG_ROCKCHIP_BOOT_MODE_REG); + if (boot_mode == BOOT_BROM_DOWNLOAD) { + writel(0, CONFIG_ROCKCHIP_BOOT_MODE_REG); + return true; + } + } + + return false; } /* @@ -34,6 +69,8 @@ int save_boot_params(void) switch (ret) { case 0: + if (check_back_to_brom_dnl_flag()) + _back_to_bootrom(BROM_BOOT_ENTER_DNL); /* * This is the initial pass through this function * (i.e. saving the context), setjmp just setup up the @@ -54,7 +91,13 @@ int save_boot_params(void) */ ret = 0; break; - + case BROM_BOOT_ENTER_DNL: + /* + * A non-zero return value will instruct the BROM enter + * download mode. + */ + ret = 1; + break; default: #if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT) puts("FATAL: unexpected command to back_to_bootrom()\n"); From patchwork Wed Oct 11 07:01:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Yan X-Patchwork-Id: 824260 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3yBlKG5sjPz9t39 for ; Wed, 11 Oct 2017 18:02:10 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 9BE0AC21E73; Wed, 11 Oct 2017 07:02:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.6 required=5.0 tests=RCVD_IN_SORBS_WEB autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A6766C21E4E; Wed, 11 Oct 2017 07:01:59 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id EDEC6C21E55; Wed, 11 Oct 2017 07:01:56 +0000 (UTC) Received: from regular1.263xmail.com (regular1.263xmail.com [211.150.99.131]) by lists.denx.de (Postfix) with ESMTPS id 4DB39C21E5B for ; Wed, 11 Oct 2017 07:01:52 +0000 (UTC) Received: from andy.yan?rock-chips.com (unknown [192.168.167.171]) by regular1.263xmail.com (Postfix) with ESMTP id 3A0CD6227 for ; Wed, 11 Oct 2017 15:01:46 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id E30B53A7; Wed, 11 Oct 2017 15:01:43 +0800 (CST) X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: sjg@chromium.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: yxj@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 266656C9Y6R; Wed, 11 Oct 2017 15:01:45 +0800 (CST) From: Andy Yan To: sjg@chromium.org, philipp.tomsich@theobroma-systems.com Date: Wed, 11 Oct 2017 15:01:31 +0800 Message-Id: <1507705291-10777-1-git-send-email-andy.yan@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507705170-10619-1-git-send-email-andy.yan@rock-chips.com> References: <1507705170-10619-1-git-send-email-andy.yan@rock-chips.com> Cc: u-boot@lists.denx.de, Andy Yan , david.wu@rock-chips.com Subject: [U-Boot] [PATCH v3 3/3] rockchip: check download key before bootup X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enter download mode if the download key pressed. Signed-off-by: Andy Yan Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- Changes in v3: None Changes in v2: - more document - move adc key detect as the default arch/arm/mach-rockchip/boot_mode.c | 43 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c index 4652490..bf0a410 100644 --- a/arch/arm/mach-rockchip/boot_mode.c +++ b/arch/arm/mach-rockchip/boot_mode.c @@ -5,14 +5,57 @@ */ #include +#include #include #include +void set_back_to_bootrom_dnl_flag(void) +{ + writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG); +} + +/* + * detect download key status by adc, most rockchip + * based boards use adc sample the download key status, + * but there are also some use gpio. So it's better to + * make this a weak function that can be override by + * some special boards. + */ +#define KEY_DOWN_MIN_VAL 0 +#define KEY_DOWN_MAX_VAL 30 + +__weak int rockchip_dnl_key_pressed(void) +{ + unsigned int val; + + if (adc_channel_single_shot("saradc", 1, &val)) { + printf("%s adc_channel_single_shot fail!\n", __func__); + return false; + } + + if ((val >= KEY_DOWN_MIN_VAL) && (val <= KEY_DOWN_MAX_VAL)) + return true; + else + return false; +} + +void rockchip_dnl_mode_check(void) +{ + if (rockchip_dnl_key_pressed()) { + printf("download key pressed, entering download mode..."); + set_back_to_bootrom_dnl_flag(); + do_reset(NULL, 0, 0, NULL); + } +} + int setup_boot_mode(void) { void *reg = (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG; int boot_mode = readl(reg); + rockchip_dnl_mode_check(); + + boot_mode = readl(reg); debug("boot mode %x.\n", boot_mode); /* Clear boot mode */