From patchwork Fri Nov 9 11:38:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoph Muellner X-Patchwork-Id: 995462 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-489504-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=theobroma-systems.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="WVfhqjtY"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42ryqK3WJDz9sC7 for ; Fri, 9 Nov 2018 22:39:25 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id; q=dns; s=default; b=aNFSQ+JZOnM8 5vM2qh1UHeoZOCoHbFX60mg1GXnyLg0TDwXuSQVIfWka5S31LuwHmL9lbgxQkwo9 AKs11RifinkgE72FtEBmyKk2Bvusq962C5t1ra6xHAw5Mk+GvJn00gapkD4VCGo1 FSPELb8ZDmLJwX6Yml0Fv7l5UMxYHcw= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id; s=default; bh=qgZ6LTgSibeEb1VXay bkeVBx2Ho=; b=WVfhqjtYFJaBMavlE2Pw1wafd1nxRr9yNmYS19tdYfjtTLaZxP GogMD1jYh7O6D8PTF6Vkg9CXcl0tbG7QHlb1cvGMSck96sdJOsirEZlQ5JKdiO1K zPBB/nxHaDLzS36a1SIK0VwJ7F6KWqeNXT/XSOChGVf/uHvvpl94pNqIo= Received: (qmail 107162 invoked by alias); 9 Nov 2018 11:39:18 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 107142 invoked by uid 89); 9 Nov 2018 11:39:17 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.1 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_NEUTRAL autolearn=ham version=3.3.2 spammy= X-HELO: mail.theobroma-systems.com Received: from vegas.theobroma-systems.com (HELO mail.theobroma-systems.com) (144.76.126.164) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 09 Nov 2018 11:39:14 +0000 Received: from [86.59.122.178] (port=49900 helo=osprey2.lan) by mail.theobroma-systems.com with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1gL581-0000mt-Kg; Fri, 09 Nov 2018 12:39:09 +0100 From: christoph.muellner@theobroma-systems.com To: Kyrill Tkachov , Philipp Tomsich , Richard Earnshaw , James Greenhalgh , Marcus Shawcroft Cc: gcc-patches@gcc.gnu.org, Christoph Muellner Subject: [PATCH v2] [aarch64] Correct the maximum shift amount for shifted operands. Date: Fri, 9 Nov 2018 12:38:24 +0100 Message-Id: <20181109113824.2923-1-christoph.muellner@theobroma-systems.com> From: Christoph Muellner The aarch64 ISA specification allows a left shift amount to be applied after extension in the range of 0 to 4 (encoded in the imm3 field). This is true for at least the following instructions: * ADD (extend register) * ADDS (extended register) * SUB (extended register) The result of this patch can be seen, when compiling the following code: uint64_t myadd(uint64_t a, uint64_t b) { return a+(((uint8_t)b)<<4); } Without the patch the following sequence will be generated: 0000000000000000 : 0: d37c1c21 ubfiz x1, x1, #4, #8 4: 8b000020 add x0, x1, x0 8: d65f03c0 ret With the patch the ubfiz will be merged into the add instruction: 0000000000000000 : 0: 8b211000 add x0, x0, w1, uxtb #4 4: d65f03c0 ret Tested with "make check" and no regressions found. *** gcc/ChangeLog *** 2018-xx-xx Christoph Muellner Philipp Tomsich * config/aarch64/aarch64.c (aarch64_uxt_size): Correct the maximum shift amount for shifted operands. *** gcc/testsuite/ChangeLog *** 2018-xx-xx Christoph Muellner Philipp Tomsich * gcc.target/aarch64/extend.c: Adjust the testcases to cover the changed shift amount. --- gcc/config/aarch64/aarch64.c | 2 +- gcc/testsuite/gcc.target/aarch64/extend.c | 16 ++++++++-------- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index c82c7b6..c85988a 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -8190,7 +8190,7 @@ aarch64_output_casesi (rtx *operands) int aarch64_uxt_size (int shift, HOST_WIDE_INT mask) { - if (shift >= 0 && shift <= 3) + if (shift >= 0 && shift <= 4) { int size; for (size = 8; size <= 32; size *= 2) diff --git a/gcc/testsuite/gcc.target/aarch64/extend.c b/gcc/testsuite/gcc.target/aarch64/extend.c index f399e55..7986c5b 100644 --- a/gcc/testsuite/gcc.target/aarch64/extend.c +++ b/gcc/testsuite/gcc.target/aarch64/extend.c @@ -32,8 +32,8 @@ ldr_sxtw0 (char *arr, int i) unsigned long long adddi_uxtw (unsigned long long a, unsigned int i) { - /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*uxtw #?3" } } */ - return a + ((unsigned long long)i << 3); + /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*uxtw #?4" } } */ + return a + ((unsigned long long)i << 4); } unsigned long long @@ -46,8 +46,8 @@ adddi_uxtw0 (unsigned long long a, unsigned int i) long long adddi_sxtw (long long a, int i) { - /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*sxtw #?3" } } */ - return a + ((long long)i << 3); + /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*sxtw #?4" } } */ + return a + ((long long)i << 4); } long long @@ -60,8 +60,8 @@ adddi_sxtw0 (long long a, int i) unsigned long long subdi_uxtw (unsigned long long a, unsigned int i) { - /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*uxtw #?3" } } */ - return a - ((unsigned long long)i << 3); + /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*uxtw #?4" } } */ + return a - ((unsigned long long)i << 4); } unsigned long long @@ -74,8 +74,8 @@ subdi_uxtw0 (unsigned long long a, unsigned int i) long long subdi_sxtw (long long a, int i) { - /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*sxtw #?3" } } */ - return a - ((long long)i << 3); + /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*sxtw #?4" } } */ + return a - ((long long)i << 4); } long long