From patchwork Wed Oct 24 15:33:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 988702 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="hIIByTTz"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42gDnN4G79z9sN9 for ; Thu, 25 Oct 2018 02:34:00 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726797AbeJYACb (ORCPT ); Wed, 24 Oct 2018 20:02:31 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:46177 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726800AbeJYACa (ORCPT ); Wed, 24 Oct 2018 20:02:30 -0400 Received: by mail-wr1-f66.google.com with SMTP id i4-v6so6055652wrr.13 for ; Wed, 24 Oct 2018 08:33:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=v1q+YJp1kCZnufzFfhSZp3A8QAgSLFb50URMcFb+vE0=; b=hIIByTTzgpNXZkqqc6WQrQscnp57fOBNBXIJsGdb4vSQINR0qWmMlcxKOPbOyGIt8A K6ouKkeKcVYUziHtfF/vK1iuSxCMgl3JArNpcZYPT0Ul9431rYYJA45B6mozEv4goGs6 p7MVfV1VrwqpSDXdD25xlaj343jIwY3xOAjvci5fQ8JnueDSzYUTfqkFpFIJOhjUJ7/R ljMKdAvR4gLb9c4/30ZTlA8IrvYBeKwdJSduirH+haM19KpQhCT4WGht5duCUBjAOJiR 30jno7cD58Vw7533Gko1Vj3fpEl+wPLC42ETjSzCMzoZDgRydJoLT3C7rs43KyPFsvmZ GRLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=v1q+YJp1kCZnufzFfhSZp3A8QAgSLFb50URMcFb+vE0=; b=cN72RTuSvzbGiZXVRFb1WoOnb4Ho62hJSmely/2KP0VBL5UuZlu2hvUbjr7k0Gv8AL 4uiAi/W0QtaaC+0me+O+kfRPyfHSuMLl/2gxRWWdEfsg49eAhxyM8tRShj+5YfK0gLtx JNPJp6qJHX57d2aUfZeYkAG7CJpbFRj/fjqjFkyvY/xpD3p/K+WpZ9bEchxQEexWnps6 Ur7eyLxcsN306iYvEN4qSwZwzXMYAr6skDBOqucoEkxpbk/zDg/STrdkIe0B1M+XWzQy 1mvPQNt6QcCmFgqSJr8sQ8m+p5ZMM1yvDSLPImFp/Hz2QAs7DMb4p0ezsRgdcIA1J9Fp RYYQ== X-Gm-Message-State: AGRZ1gJrBOHh1pj6fswbVTQUcDOviDeYYKEmaYKssLvAxiI0HMV7XjDH uNWro6qFYZHdpGsjwPbDct8= X-Google-Smtp-Source: AJdET5d1iPlH8+Fg8yxO7UpY8/K0rFqVd6TQLp2aHY0OPUKzKKXSu3JTz/hnLMk+lDygaOJO3hOsBg== X-Received: by 2002:adf:9021:: with SMTP id h30-v6mr276316wrh.248.1540395235677; Wed, 24 Oct 2018 08:33:55 -0700 (PDT) Received: from localhost (pD9E511F8.dip0.t-ipconnect.de. [217.229.17.248]) by smtp.gmail.com with ESMTPSA id v1-v6sm7419305wrd.24.2018.10.24.08.33.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 24 Oct 2018 08:33:55 -0700 (PDT) From: Thierry Reding To: Thierry Reding Cc: Jonathan Hunter , Mikko Perttunen , Timo Alho , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/2] arm64: tegra: Add PWM controllers on Tegra194 Date: Wed, 24 Oct 2018 17:33:52 +0200 Message-Id: <20181024153353.15745-1-thierry.reding@gmail.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding Tegra194 has eight single-channel PWM controllers, one of them in the AON partition. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 96 ++++++++++++++++++++++++ 1 file changed, 96 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 9fc14bb9a0af..c2091bb16546 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -209,6 +209,90 @@ status = "disabled"; }; + pwm1: pwm@3280000 { + compatible = "nvidia,tegra194-pwm", + "nvidia,tegra186-pwm"; + reg = <0x3280000 0x10000>; + clocks = <&bpmp TEGRA194_CLK_PWM1>; + clock-names = "pwm"; + resets = <&bpmp TEGRA194_RESET_PWM1>; + reset-names = "pwm"; + status = "disabled"; + #pwm-cells = <2>; + }; + + pwm2: pwm@3290000 { + compatible = "nvidia,tegra194-pwm", + "nvidia,tegra186-pwm"; + reg = <0x3290000 0x10000>; + clocks = <&bpmp TEGRA194_CLK_PWM2>; + clock-names = "pwm"; + resets = <&bpmp TEGRA194_RESET_PWM2>; + reset-names = "pwm"; + status = "disabled"; + #pwm-cells = <2>; + }; + + pwm3: pwm@32a0000 { + compatible = "nvidia,tegra194-pwm", + "nvidia,tegra186-pwm"; + reg = <0x32a0000 0x10000>; + clocks = <&bpmp TEGRA194_CLK_PWM3>; + clock-names = "pwm"; + resets = <&bpmp TEGRA194_RESET_PWM3>; + reset-names = "pwm"; + status = "disabled"; + #pwm-cells = <2>; + }; + + pwm5: pwm@32c0000 { + compatible = "nvidia,tegra194-pwm", + "nvidia,tegra186-pwm"; + reg = <0x32c0000 0x10000>; + clocks = <&bpmp TEGRA194_CLK_PWM5>; + clock-names = "pwm"; + resets = <&bpmp TEGRA194_RESET_PWM5>; + reset-names = "pwm"; + status = "disabled"; + #pwm-cells = <2>; + }; + + pwm6: pwm@32d0000 { + compatible = "nvidia,tegra194-pwm", + "nvidia,tegra186-pwm"; + reg = <0x32d0000 0x10000>; + clocks = <&bpmp TEGRA194_CLK_PWM6>; + clock-names = "pwm"; + resets = <&bpmp TEGRA194_RESET_PWM6>; + reset-names = "pwm"; + status = "disabled"; + #pwm-cells = <2>; + }; + + pwm7: pwm@32e0000 { + compatible = "nvidia,tegra194-pwm", + "nvidia,tegra186-pwm"; + reg = <0x32e0000 0x10000>; + clocks = <&bpmp TEGRA194_CLK_PWM7>; + clock-names = "pwm"; + resets = <&bpmp TEGRA194_RESET_PWM7>; + reset-names = "pwm"; + status = "disabled"; + #pwm-cells = <2>; + }; + + pwm8: pwm@32f0000 { + compatible = "nvidia,tegra194-pwm", + "nvidia,tegra186-pwm"; + reg = <0x32f0000 0x10000>; + clocks = <&bpmp TEGRA194_CLK_PWM8>; + clock-names = "pwm"; + resets = <&bpmp TEGRA194_RESET_PWM8>; + reset-names = "pwm"; + status = "disabled"; + #pwm-cells = <2>; + }; + sdmmc1: sdhci@3400000 { compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci"; reg = <0x03400000 0x10000>; @@ -313,6 +397,18 @@ status = "disabled"; }; + pwm4: pwm@c340000 { + compatible = "nvidia,tegra194-pwm", + "nvidia,tegra186-pwm"; + reg = <0xc340000 0x10000>; + clocks = <&bpmp TEGRA194_CLK_PWM4>; + clock-names = "pwm"; + resets = <&bpmp TEGRA194_RESET_PWM4>; + reset-names = "pwm"; + status = "disabled"; + #pwm-cells = <2>; + }; + pmc@c360000 { compatible = "nvidia,tegra194-pmc"; reg = <0x0c360000 0x10000>, From patchwork Wed Oct 24 15:33:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 988703 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="HM7r2LNk"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42gDnP6YrGz9sNF for ; Thu, 25 Oct 2018 02:34:01 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726800AbeJYACc (ORCPT ); Wed, 24 Oct 2018 20:02:32 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:36159 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726449AbeJYACb (ORCPT ); Wed, 24 Oct 2018 20:02:31 -0400 Received: by mail-wr1-f67.google.com with SMTP id y16so6110135wrw.3 for ; Wed, 24 Oct 2018 08:33:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bYnbdwuMVuDeZUHnuxzjLWL8OcPKP+HP6ijzcuvaagE=; b=HM7r2LNkdL97e0tcJu2LB7RgcanH0MygsYI6MyuN1POR6lH4Q5tuscn5Gm5daOzCRk P0OyU17UKKDuT//EzMYb0s7RVNjBGfRxPt3lvJ5AkeQojPQ/Mp7zOnjBlV7cDVmrgtI+ ftvXaSd6+FTOXuCQHtY5adu3Y4jtusbFg9HBUqfzlWKQbczDO3Ru1BoD3t1AZd4wWLEJ vR1ynk0bdlToZAaTkZIzDX7IFwOOLBrvJ+4NRrgcupkek9FsK+QB4ZYefixiazoK1oOq 92DjVjgOKFLqGF58wKGfBJ4Vxc6rSZSvjASZV79tYtpfcVk5pwNzAfXCmOSuiY7ae4AJ hPpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bYnbdwuMVuDeZUHnuxzjLWL8OcPKP+HP6ijzcuvaagE=; b=sfPplys1C7fRVMMmbgkP2RtbsccQyOA49muhsnsDsx6o68XQT2lOexwf7YvM7b16Fl 5t6rTRFUHtINcsfwr3TxEWGinnCpNp5ckMXofbLJQCGTybUiMHCdoAhgWJjrVQhyJRix 8JLRMeZidbkfzixmtwi2vVq36QVUu1vN7Ha/ZFnCCI29lwn/ToLnIiVNGjsLJaOFffYT 22mM2ka+mBRMwYqTR24lQEGqb0Sx2ujBUZKzFlTJlSv9YxvQNH6vLswXz9ahMEVfZvvH CEcRRnRytJOys0MEhc4LU1upp9JvcOqbBMbwf3KXY5VyXgj3KsawSUN51bitBfLnZ1A/ 8ZVw== X-Gm-Message-State: AGRZ1gIy86UOjumDjJfHzerkeu6C2DsZhmZBf052fPBvmdpRImgAaCxj R4IKdIiOv5MiUFr+sMZ4AJs= X-Google-Smtp-Source: AJdET5fY3ytrfpcAKt5F4mpZgqxbdIT/+ADaSNE7/vjMMsO79eKvMcM4vy7aRDqNviYgYFmq3wdpNA== X-Received: by 2002:adf:bf10:: with SMTP id p16-v6mr217900wrh.235.1540395237157; Wed, 24 Oct 2018 08:33:57 -0700 (PDT) Received: from localhost (pD9E511F8.dip0.t-ipconnect.de. [217.229.17.248]) by smtp.gmail.com with ESMTPSA id l195-v6sm6640018wmd.37.2018.10.24.08.33.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 24 Oct 2018 08:33:56 -0700 (PDT) From: Thierry Reding To: Thierry Reding Cc: Jonathan Hunter , Mikko Perttunen , Timo Alho , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/2] arm64: tegra: Add PWM fan support on Jetson Xavier Date: Wed, 24 Oct 2018 17:33:53 +0200 Message-Id: <20181024153353.15745-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181024153353.15745-1-thierry.reding@gmail.com> References: <20181024153353.15745-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding Enable PWM4 in device tree and use it to drive the PWM fan on the Jetson Xavier. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts index 9ff3c18280c4..86f05504ca38 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts @@ -12,5 +12,14 @@ sdhci@3400000 { status = "okay"; }; + + pwm@c340000 { + status = "okay"; + }; + }; + + fan { + compatible = "pwm-fan"; + pwms = <&pwm4 0 45334>; }; };