From patchwork Wed Aug 30 23:06:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Br=C3=BCns?= X-Patchwork-Id: 807974 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133; helo=bombadil.infradead.org; envelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="dXRzpCIW"; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xjLkK00ZMz9s7C for ; Thu, 31 Aug 2017 09:07:20 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=YsxsyqIyCrxAm69oOXoNW7dMZXe3LwbXzGIHKewvoM0=; b=dXRzpCIW+S+OWO Ra1MmLWnu/VAmxCAzvvinNujG5Fi+3oHnCvb/HCghX4iJ9dDk9pS18SudyGTImdSNlQD3qHoq8bhQ WnzpHKrl6Stv6BHmJ+O9bzm75zlMX7ke2RdHKb3w4sXzs0x+eDufyT+btvd0oN40th1i51U8pEKKF NA4kcFpkfu2UGWagIyyJlRyuG5aQ1g4UUGj40t0xi/yekf0I0Qz49k0p7nBsEjM0nNUVlH43OwOc8 yOzXzyj/ix0d7YnDEzO3U4I2WHaiLbxFNC9Fe94SjwT0S6yd/27V3S9BcMkjcR5c6xMoyi/q3k9NE B84xwvx1G97Argcs956g==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dnC4r-00045M-RR; Wed, 30 Aug 2017 23:07:17 +0000 Received: from mail-out-1.itc.rwth-aachen.de ([134.130.5.46]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dnC4n-00043U-LA for linux-arm-kernel@lists.infradead.org; Wed, 30 Aug 2017 23:07:16 +0000 X-IronPort-AV: E=Sophos;i="5.41,450,1498514400"; d="scan'208";a="11025412" Received: from rwthex-w2-b.rwth-ad.de ([134.130.26.159]) by mail-in-1.itc.rwth-aachen.de with ESMTP; 31 Aug 2017 01:06:44 +0200 Received: from pebbles.fritz.box (77.182.248.91) by rwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f) with Microsoft SMTP Server (TLS) id 15.0.1320.4; Thu, 31 Aug 2017 01:06:43 +0200 From: =?utf-8?q?Stefan_Br=C3=BCns?= To: Subject: [PATCH v2] arm64: allwinner: a64: add SPI nodes Date: Thu, 31 Aug 2017 01:06:37 +0200 Message-ID: <20170830230637.13010-1-stefan.bruens@rwth-aachen.de> X-Mailer: git-send-email 2.14.1 MIME-Version: 1.0 X-Originating-IP: [77.182.248.91] X-ClientProxiedBy: rwthex-s1-a.rwth-ad.de (2002:8682:1a98::8682:1a98) To rwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170830_160714_000410_3C786755 X-CRM114-Status: UNSURE ( 6.07 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [134.130.5.46 listed in list.dnswl.org] -0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , Maxime Ripard , Chen-Yu Tsai , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org The A64 SPI controllers are register compatible to the h3/h5 SPI controllers. The A64 has two SPI controllers, each with a single chip select. The handles for the DMA channels (23/24 for SPI0/SPI1) are omitted, as the A64 DMA support is currently missing. Signed-off-by: Stefan Brüns --- v2: - order nodes by memory address - drop enabling of spi nodes for Pine64, spi pins are on external connector and some other function might be used arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 40 +++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index bd0f33b77f57..7be9eb2ad83c 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -325,6 +325,16 @@ drive-strength = <40>; }; + spi0_pins: spi0 { + pins = "PC0", "PC1", "PC2", "PC3"; + function = "spi0"; + }; + + spi1_pins: spi1 { + pins = "PD0", "PD1", "PD2", "PD3"; + function = "spi1"; + }; + uart0_pins_a: uart0@0 { pins = "PB8", "PB9"; function = "uart0"; @@ -469,6 +479,36 @@ }; }; + spi0: spi@01c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; + clock-names = "ahb", "mod"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>; + resets = <&ccu RST_BUS_SPI0>; + status = "disabled"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi1: spi@01c69000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c69000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; + clock-names = "ahb", "mod"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; + resets = <&ccu RST_BUS_SPI1>; + status = "disabled"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + gic: interrupt-controller@1c81000 { compatible = "arm,gic-400"; reg = <0x01c81000 0x1000>,