From patchwork Sat Oct 7 12:08:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bodo-Merle Sandor X-Patchwork-Id: 822917 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="GpSLWRH+"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3y8QLQ14hjz9t5C for ; Sat, 7 Oct 2017 23:10:06 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751441AbdJGMKE (ORCPT ); Sat, 7 Oct 2017 08:10:04 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:35487 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751027AbdJGMKD (ORCPT ); Sat, 7 Oct 2017 08:10:03 -0400 Received: by mail-wm0-f68.google.com with SMTP id b189so14085120wmd.2; Sat, 07 Oct 2017 05:10:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=XhS+YrNY64wHoCZkUn3vIDEdosUM0KJFvqTZ34Pc01k=; b=GpSLWRH+EL2x7fxC8eotIaS2qb1+F6zzvTu+BZrTWy9oE/omM10znZcoVJNpv6d/w3 oC5hdujuCwAyN2gDaDJE3hFKRrrM3JuNNGnWkJxTZEUqM1XhPv5v2vGbmVRANsE4sWrS WxR/zQPmyPHoG5rsvLx5oszvzvtSplS90WKgTkbwrE7L3l47iBRsuWOMlHBi9pl/NyvW p2X+7rKgQxgSbKL855wXOWlF/RehV1tybI23LZAbiE1ogUI+Uaobnskj07g+4HWZPe5V /3RwNRv3X8CwXQGqmRRiQ4vgfHZg+3B/M2sXsrth/czbb5kHrmKwYg6ibTsb+1hz1fIX rkEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=XhS+YrNY64wHoCZkUn3vIDEdosUM0KJFvqTZ34Pc01k=; b=cyye+XJBc5seOFVXvZzq1sY9mbYfLuRhzpAe3dfFCp3wbsTZSnT1pgxQK52Bgh8W/J W/KVr+vVwUABE8hp0XxyB28Q+XafNoLeL0y+R+d8h++/syO957O1QFCNxKysgBGlSkzT vgKyRiyu6snSEn6tfLprMQm8zpwQTpN2EuMeYibpZgRQeUOuBBRjPuIHvZB2qPteIw01 X4obVObgGiX5hYsn7jb5P8OD5S7jfvj0b0UU6gra7ZQ9FtCAxMJbOg+hBcJK0HcRmahg RU8vH9jz877bCNhPhFwKggrGwoxe/gMKRDNLzf4f/dp1sY21CntYanWmO8qVTWFkjej5 I2pQ== X-Gm-Message-State: AMCzsaXzNchxyy9/LT0mSW0Ip7JnnLxyVEUYtI9yth3e+5UkbFEHQK32 z8tIZ4MLYaTzEa+2Eur1qrk57zRm X-Google-Smtp-Source: AOwi7QCWoYtChvRkpA/pp0tMuBqnQH9rfS7oLZAvGXeLVgovRUSIIN8BMb86Yq4x9O+n2fRprDjaCA== X-Received: by 10.223.159.77 with SMTP id f13mr4942047wrg.154.1507378201723; Sat, 07 Oct 2017 05:10:01 -0700 (PDT) Received: from localhost.localdomain (catv-89-133-43-45.catv.broadband.hu. [89.133.43.45]) by smtp.gmail.com with ESMTPSA id r63sm4464770wmg.13.2017.10.07.05.10.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 07 Oct 2017 05:10:00 -0700 (PDT) From: Bodo-Merle Sandor X-Google-Original-From: Bodo-Merle Sandor To: linux-pci@vger.kernel.org Cc: Sandor Bodo-Merle , Bjorn Helgaas , Ray Jui , Scott Branden , Jon Mason , bcm-kernel-feedback-list@broadcom.com, Shawn Lin , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] PCI: iproc: Allow allocation of multiple MSIs Date: Sat, 7 Oct 2017 14:08:44 +0200 Message-Id: <20171007120851.20230-1-sbodomerle@gmail.com> X-Mailer: git-send-email 2.14.2 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Sandor Bodo-Merle Add support for allocating multiple MSIs at the same time, so that the MSI_FLAG_MULTI_PCI_MSI flag can be added to the msi_domain_info structure. Avoid storing the hwirq in the low 5 bits of the message data, as it is used by the device. Also fix an endianness problem by using readl(). Signed-off-by: Sandor Bodo-Merle Reviewed-by: Ray Jui --- drivers/pci/host/pcie-iproc-msi.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/pci/host/pcie-iproc-msi.c b/drivers/pci/host/pcie-iproc-msi.c index 2d0f535a2f69..990fc906d73d 100644 --- a/drivers/pci/host/pcie-iproc-msi.c +++ b/drivers/pci/host/pcie-iproc-msi.c @@ -179,7 +179,7 @@ static struct irq_chip iproc_msi_irq_chip = { static struct msi_domain_info iproc_msi_domain_info = { .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_PCI_MSIX, + MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX, .chip = &iproc_msi_irq_chip, }; @@ -237,7 +237,7 @@ static void iproc_msi_irq_compose_msi_msg(struct irq_data *data, addr = msi->msi_addr + iproc_msi_addr_offset(msi, data->hwirq); msg->address_lo = lower_32_bits(addr); msg->address_hi = upper_32_bits(addr); - msg->data = data->hwirq; + msg->data = data->hwirq << 5; } static struct irq_chip iproc_msi_bottom_irq_chip = { @@ -251,7 +251,7 @@ static int iproc_msi_irq_domain_alloc(struct irq_domain *domain, void *args) { struct iproc_msi *msi = domain->host_data; - int hwirq; + int hwirq, i; mutex_lock(&msi->bitmap_lock); @@ -267,10 +267,14 @@ static int iproc_msi_irq_domain_alloc(struct irq_domain *domain, mutex_unlock(&msi->bitmap_lock); - irq_domain_set_info(domain, virq, hwirq, &iproc_msi_bottom_irq_chip, - domain->host_data, handle_simple_irq, NULL, NULL); + for (i = 0; i < nr_irqs; i++) { + irq_domain_set_info(domain, virq + i, hwirq + i, + &iproc_msi_bottom_irq_chip, + domain->host_data, handle_simple_irq, + NULL, NULL); + } - return 0; + return hwirq; } static void iproc_msi_irq_domain_free(struct irq_domain *domain, @@ -302,7 +306,8 @@ static inline u32 decode_msi_hwirq(struct iproc_msi *msi, u32 eq, u32 head) offs = iproc_msi_eq_offset(msi, eq) + head * sizeof(u32); msg = (u32 *)(msi->eq_cpu + offs); - hwirq = *msg & IPROC_MSI_EQ_MASK; + hwirq = readl(msg); + hwirq = (hwirq >> 5) + (hwirq & 0x1f); /* * Since we have multiple hwirq mapped to a single MSI vector,