From patchwork Tue Oct 2 08:27:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ricardo Ribalda Delgado X-Patchwork-Id: 977680 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="gqZbFTAD"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42PXMY1VPJz9sj6 for ; Tue, 2 Oct 2018 18:27:37 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727285AbeJBPJl (ORCPT ); Tue, 2 Oct 2018 11:09:41 -0400 Received: from mail-lf1-f65.google.com ([209.85.167.65]:36289 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727006AbeJBPJk (ORCPT ); Tue, 2 Oct 2018 11:09:40 -0400 Received: by mail-lf1-f65.google.com with SMTP id d4-v6so780912lfa.3; Tue, 02 Oct 2018 01:27:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=DAh2lGFM/YZYv7K7xmYxg/bmzfyJfL49NJ9CLn66MIA=; b=gqZbFTAD4iVUHsbJQJ19At9LFZ8wBnG1d7OtK2Ve6qoV8mcOL9BOApdXatfGVkzBbU T0LWW5q4TuviCVeGb3TDumGAH3T+azR7Dhoikm3Svq53S7DFPHqv6Gi9nn/N9vb7pumv FWiOGwkgG84phd56/+2IamAAky/p4zSWjUUjtvWdidmV6QSNRWV6Wt+AVAcNXEjK2kGf 5c2FrL4cd5Qrw+7D6efZ7Q7tGs+e5XQWaXBFVlOResQkoB/Nw6Jz7hJ5XaHsbkLJ5ib4 +eH7fS2lm643oWSb2pa7p0+Tk7oxNuWueOxzLmXH057uDcTNpBpIJmA+9NUQ/Ayzaqhz 7evA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=DAh2lGFM/YZYv7K7xmYxg/bmzfyJfL49NJ9CLn66MIA=; b=b5W+egX8EbQaCgw3zGD2dGYJTZeecWgY3+ko4XmHLz84h5Hwb10PLVOLB0qsmaCd/W gAiFlio6PRGmSDbKl3DVxTauqn2EiEMK+HKaZwJTl9szomDo3ibG8ABT4coeVsanQp1D 0fsAJhEdOYAumS4I41Zay39F+RSR+5r6so7mnxXskCyiGm9xB2d6U3uTDzv/XLtAr/hO GCkobjwbissV+f07CFbgx83OZfF3wguPzRbUlE6B39YlurjJVdAg7xJge1dcAEDSDG41 MnqcGY+bw5fOd3RwdIdZhSh7Wvqc9dBXHAiviCyEwovsX3/+t5BDylSAS5RDk3aKqmsi 2qRw== X-Gm-Message-State: ABuFfog41DgydBInMgnSuy/TZ/MMLccdYC9Ox6jWTLdbtsCmiQBLsby9 ck/ExSM5Z6DyURfyCv/3Qdo= X-Google-Smtp-Source: ACcGV60mjG/W1kFIRJozONeiwSpxi1lPP9tm3mFDoLtdfQwUoaTeQNAVBwh+wHMyShQvyqWkAAWTdQ== X-Received: by 2002:a19:541d:: with SMTP id i29-v6mr8245572lfb.30.1538468854056; Tue, 02 Oct 2018 01:27:34 -0700 (PDT) Received: from neopili.qtec.com (cpe.xe-3-0-1-778.vbrnqe10.dk.customer.tdc.net. [80.197.57.18]) by smtp.gmail.com with ESMTPSA id p11-v6sm1493531lji.87.2018.10.02.01.27.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 02 Oct 2018 01:27:32 -0700 (PDT) From: Ricardo Ribalda Delgado To: Linus Walleij , Timur Tabi , swboyd@chromium.org, linux-gpio@vger.kernel.org, LKML , Jeffrey Hugo Cc: Ricardo Ribalda Delgado Subject: [PATCH v3 1/3] gpiolib: Add init_valid_mask exported function Date: Tue, 2 Oct 2018 10:27:29 +0200 Message-Id: <20181002082731.20141-1-ricardo.ribalda@gmail.com> X-Mailer: git-send-email 2.19.0 MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add a function that allows initializing the valid_mask from gpiochip_add_data. This prevents race conditions during gpiochip initialization. If the function is not exported, then the old behaviour is respected, this is, set all gpios as valid. Signed-off-by: Ricardo Ribalda Delgado --- drivers/gpio/gpiolib.c | 3 +++ include/linux/gpio/driver.h | 7 ++++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index e8f8a1999393..6925196136ce 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -377,6 +377,9 @@ static int gpiochip_init_valid_mask(struct gpio_chip *gpiochip) if (!gpiochip->valid_mask) return -ENOMEM; + if (gpiochip->init_valid_mask) + return gpiochip->init_valid_mask(gpiochip); + return 0; } diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 0ea328e71ec9..df09749269ff 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -256,6 +256,9 @@ struct gpio_chip { void (*dbg_show)(struct seq_file *s, struct gpio_chip *chip); + + int (*init_valid_mask)(struct gpio_chip *chip); + int base; u16 ngpio; const char *const *names; @@ -294,7 +297,9 @@ struct gpio_chip { /** * @need_valid_mask: * - * If set core allocates @valid_mask with all bits set to one. + * If set core allocates @valid_mask with all its values initialized + * with init_valid_mask() or set to one if init_valid_mask() is not + * defined */ bool need_valid_mask; From patchwork Tue Oct 2 08:27:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ricardo Ribalda Delgado X-Patchwork-Id: 977682 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="XbXr9E95"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42PXMq0cvhz9sj6 for ; Tue, 2 Oct 2018 18:27:51 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727396AbeJBPJo (ORCPT ); Tue, 2 Oct 2018 11:09:44 -0400 Received: from mail-lf1-f66.google.com ([209.85.167.66]:35427 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727006AbeJBPJn (ORCPT ); Tue, 2 Oct 2018 11:09:43 -0400 Received: by mail-lf1-f66.google.com with SMTP id r191-v6so783779lff.2; Tue, 02 Oct 2018 01:27:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Vur/nZx57X35xCVeK+GvGWS7rgTTqrCBUYltbYz91FM=; b=XbXr9E95kd+StqYEioLGstUrfM0Do5qLwR6m7SSdTQgjp+ip0LE/cqnqq7Hm0T8Z8a 87+12Xmwl8539NPdKQmZ9adYHFiGqehZgHLubys4NDo8MsGcvgKI7RTD+pTCruRnr4yS ydujA7o8KZtXQlH8oX9iYq1VHrJFEn4L4E3xkVpvoOqJPBM14/RpitMaUGwCSJVttS/a CphvN05bCk/Cbc9iNnd4BdgRpsY8xiLMVjU3PXsKNVwNlTFjRowSDFz3UGYxOsZfM4Kl wUG3I0AISpeuyKP7P0XsUSBfij0EuZPUoUU0UehlcXJKNPSa8nfhkJVZe8BaDI2ZS4iy 7asg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Vur/nZx57X35xCVeK+GvGWS7rgTTqrCBUYltbYz91FM=; b=SEBYXnRnYn3ZTRVK28tpNMyfiIvlhBCu+J85q5OtHBi7Z4l07YvsgMX9NMdQm8Cnin SwzHSB7mD6yc6UUXucYWXtQT8KTSdnWDZ1ttg2HO0f5hn4PvrYfeez11ouZ0MijF0/kA UrtwLBTtQ7NKpqSrW1OO5qBODAXYnyHrnN5kWo4HSmhDrGlD30ZAhUNk+SXYQv39Fu+r ziPbR0Ysk7k665SrSobuLRMaZnwAjxhFrVf4HnYcm1hp2eVYCrcl/rry+W9ZLFUYTWeN 3rGhArw5IGRoA11lQRHhgQdztEXvCsaWsRbcfim+/nvhL+Ymu1EHNCIBCphkcrOumCFL 83cA== X-Gm-Message-State: ABuFfoj4x6p+wklsVlrLqKdOg1CNaWZyrAD1oM1+51VUeTH5tSXF9SbW qrVZw42VAmTsTfGTbM9t0As= X-Google-Smtp-Source: ACcGV62Fua0sTnDbp25rLcaUy+ljwXApJOvPVWPSXYObHI/OX8TLkQSXJ6IRnahd28fZw7wOqd3KHA== X-Received: by 2002:a19:d906:: with SMTP id q6-v6mr7488442lfg.62.1538468856559; Tue, 02 Oct 2018 01:27:36 -0700 (PDT) Received: from neopili.qtec.com (cpe.xe-3-0-1-778.vbrnqe10.dk.customer.tdc.net. [80.197.57.18]) by smtp.gmail.com with ESMTPSA id p11-v6sm1493531lji.87.2018.10.02.01.27.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 02 Oct 2018 01:27:34 -0700 (PDT) From: Ricardo Ribalda Delgado To: Linus Walleij , Timur Tabi , swboyd@chromium.org, linux-gpio@vger.kernel.org, LKML , Jeffrey Hugo Cc: Ricardo Ribalda Delgado Subject: [PATCH v3 2/3] pinctrl: msm: Use init_valid_mask exported function Date: Tue, 2 Oct 2018 10:27:30 +0200 Message-Id: <20181002082731.20141-2-ricardo.ribalda@gmail.com> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20181002082731.20141-1-ricardo.ribalda@gmail.com> References: <20181002082731.20141-1-ricardo.ribalda@gmail.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The current code produces XPU violation if get_direction is called just after the initialization. Signed-off-by: Ricardo Ribalda Delgado --- drivers/pinctrl/qcom/pinctrl-msm.c | 79 ++++++++++++++---------------- 1 file changed, 37 insertions(+), 42 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 5d72ffad32c2..ce1ade47ea37 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -566,6 +566,42 @@ static void msm_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) #define msm_gpio_dbg_show NULL #endif +static int msm_gpio_init_valid_mask(struct gpio_chip *chip) +{ + struct msm_pinctrl *pctrl = gpiochip_get_data(chip); + int ret; + unsigned int len, i; + unsigned int max_gpios = pctrl->soc->ngpios; + u16 *tmp; + + /* The number of GPIOs in the ACPI tables */ + len = ret = device_property_read_u16_array(pctrl->dev, "gpios", NULL, + 0); + if (ret < 0) + return 0; + + if (ret > max_gpios) + return -EINVAL; + + tmp = kmalloc_array(len, sizeof(*tmp), GFP_KERNEL); + if (!tmp) + return -ENOMEM; + + ret = device_property_read_u16_array(pctrl->dev, "gpios", tmp, len); + if (ret < 0) { + dev_err(pctrl->dev, "could not read list of GPIOs\n"); + goto out; + } + + bitmap_zero(chip->valid_mask, max_gpios); + for (i = 0; i < len; i++) + set_bit(tmp[i], chip->valid_mask); + +out: + kfree(tmp); + return ret; +} + static const struct gpio_chip msm_gpio_template = { .direction_input = msm_gpio_direction_input, .direction_output = msm_gpio_direction_output, @@ -575,6 +611,7 @@ static const struct gpio_chip msm_gpio_template = { .request = gpiochip_generic_request, .free = gpiochip_generic_free, .dbg_show = msm_gpio_dbg_show, + .init_valid_mask = msm_gpio_init_valid_mask, }; /* For dual-edge interrupts in software, since some hardware has no @@ -855,41 +892,6 @@ static void msm_gpio_irq_handler(struct irq_desc *desc) chained_irq_exit(chip, desc); } -static int msm_gpio_init_valid_mask(struct gpio_chip *chip, - struct msm_pinctrl *pctrl) -{ - int ret; - unsigned int len, i; - unsigned int max_gpios = pctrl->soc->ngpios; - u16 *tmp; - - /* The number of GPIOs in the ACPI tables */ - len = ret = device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0); - if (ret < 0) - return 0; - - if (ret > max_gpios) - return -EINVAL; - - tmp = kmalloc_array(len, sizeof(*tmp), GFP_KERNEL); - if (!tmp) - return -ENOMEM; - - ret = device_property_read_u16_array(pctrl->dev, "gpios", tmp, len); - if (ret < 0) { - dev_err(pctrl->dev, "could not read list of GPIOs\n"); - goto out; - } - - bitmap_zero(chip->valid_mask, max_gpios); - for (i = 0; i < len; i++) - set_bit(tmp[i], chip->valid_mask); - -out: - kfree(tmp); - return ret; -} - static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl) { return device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0) > 0; @@ -926,13 +928,6 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) return ret; } - ret = msm_gpio_init_valid_mask(chip, pctrl); - if (ret) { - dev_err(pctrl->dev, "Failed to setup irq valid bits\n"); - gpiochip_remove(&pctrl->chip); - return ret; - } - /* * For DeviceTree-supported systems, the gpio core checks the * pinctrl's device node for the "gpio-ranges" property. From patchwork Tue Oct 2 08:27:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ricardo Ribalda Delgado X-Patchwork-Id: 977681 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="qNo6/epD"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42PXMg3stqz9sjB for ; Tue, 2 Oct 2018 18:27:43 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727635AbeJBPJp (ORCPT ); Tue, 2 Oct 2018 11:09:45 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:33447 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727383AbeJBPJp (ORCPT ); Tue, 2 Oct 2018 11:09:45 -0400 Received: by mail-lj1-f195.google.com with SMTP id z21-v6so975190ljz.0; Tue, 02 Oct 2018 01:27:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mDcT737/quUU7Lv5/p9BcXm7XROdXOvHTo1MWEuta7M=; b=qNo6/epD9zhT9i7eFl392ifXVFVIgpDQ3gEaS0KRaTKwRHDZX4EmYmRNOPcZZ5m8xK DKc+GmXVTnD3wnkuzXvQXILLrHh54aDMXOqtlqZg/BgRep7sno7JiynAvegud7NmobV/ HwgP+Y5xXcy/AK6GBVxtXUaCy1vsSLQzMrObVZNrvvL1Urhb1aGbLyV7LLbooI7wTjSJ P6p6Y9P0vo5whlzP1cFntFyYpZ2rklcUjPBf1LjbWRu5bnZJfl3Ow2QX1VeIt7Ebf+0S FNhughZh+SAYJe0rYNodiYnJ5w2QwhBdDWStIjsZ2PMBJPyXp1+o8LotaXibJoMaVTS+ Nq5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mDcT737/quUU7Lv5/p9BcXm7XROdXOvHTo1MWEuta7M=; b=pv6NYUnJmCdzsQrmJF95lJetrjlfl+/YcvB9gm+5oKhZz0im333ce435YgZTd7YTDv 74oC4otZphlzUubaFS0Q0+HMshBPuY68l9c5bswBNTBQ/BE33RnjFbMLtPRq125MLdAC byT492pT6vqZ7EopjbJ/voA7OlDeaLzAixUwhQmnusq6j107mF+lV2JB5TdLXdx63IfG 6riVRInyVBQndjCw9aO/GBqYDfJUCEPrHF3v+TctA0w2Svd07CFaP2YuYWKE8TdiumDK C9ughxxZ2ixaWICNIgHZmULq8rm0pps2A8niWpmNXnO3p1E1AtsWDVargcKc29mzocUc BgwQ== X-Gm-Message-State: ABuFfohBbhBp77XThqZ1gdbIAXgCQz8uUyBoXsWh3rN/RBLhKiANuga4 MkAj9sdtwLaVw94vicY3Pdk= X-Google-Smtp-Source: ACcGV63bNydptegBMlTLCfRHlza2rLgeH7lmgrrH6O5gMeDN7D6ynlNS3V/LZUI1NRwfReIyv/sDTA== X-Received: by 2002:a2e:6f0c:: with SMTP id k12-v6mr8918282ljc.66.1538468858362; Tue, 02 Oct 2018 01:27:38 -0700 (PDT) Received: from neopili.qtec.com (cpe.xe-3-0-1-778.vbrnqe10.dk.customer.tdc.net. [80.197.57.18]) by smtp.gmail.com with ESMTPSA id p11-v6sm1493531lji.87.2018.10.02.01.27.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 02 Oct 2018 01:27:37 -0700 (PDT) From: Ricardo Ribalda Delgado To: Linus Walleij , Timur Tabi , swboyd@chromium.org, linux-gpio@vger.kernel.org, LKML , Jeffrey Hugo Cc: Ricardo Ribalda Delgado Subject: [PATCH v3 3/3] gpiolib: Show correct direction from the beginning Date: Tue, 2 Oct 2018 10:27:31 +0200 Message-Id: <20181002082731.20141-3-ricardo.ribalda@gmail.com> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20181002082731.20141-1-ricardo.ribalda@gmail.com> References: <20181002082731.20141-1-ricardo.ribalda@gmail.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Current code assumes that the direction is input if direction_input function is set. This might not be the case on GPIOs with programmable direction. Signed-off-by: Ricardo Ribalda Delgado --- drivers/gpio/gpiolib.c | 33 +++++++++++++++++++-------------- 1 file changed, 19 insertions(+), 14 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 6925196136ce..eaadbcb5c0f8 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1344,20 +1344,6 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data, spin_unlock_irqrestore(&gpio_lock, flags); - for (i = 0; i < chip->ngpio; i++) { - struct gpio_desc *desc = &gdev->descs[i]; - - desc->gdev = gdev; - - /* REVISIT: most hardware initializes GPIOs as inputs (often - * with pullups enabled) so power usage is minimized. Linux - * code should set the gpio direction first thing; but until - * it does, and in case chip->get_direction is not set, we may - * expose the wrong direction in sysfs. - */ - desc->flags = !chip->direction_input ? (1 << FLAG_IS_OUT) : 0; - } - #ifdef CONFIG_PINCTRL INIT_LIST_HEAD(&gdev->pin_ranges); #endif @@ -1374,6 +1360,25 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data, if (status) goto err_remove_irqchip_mask; + for (i = 0; i < chip->ngpio; i++) { + struct gpio_desc *desc = &gdev->descs[i]; + + desc->gdev = gdev; + + /* REVISIT: most hardware initializes GPIOs as inputs (often + * with pullups enabled) so power usage is minimized. Linux + * code should set the gpio direction first thing; but until + * it does, and in case chip->get_direction is not set, we may + * expose the wrong direction in sysfs. + */ + if (chip->get_direction && gpiochip_line_is_valid(chip, i)) + desc->flags = !chip->get_direction(chip, i) ? + (1 << FLAG_IS_OUT) : 0; + else + desc->flags = !chip->direction_input ? + (1 << FLAG_IS_OUT) : 0; + } + status = gpiochip_add_irqchip(chip, lock_key, request_key); if (status) goto err_remove_chip;