From patchwork Wed Sep 26 21:23:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Mack X-Patchwork-Id: 975406 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=zonque.org Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="gfIdxFRX"; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:e::133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42L9wW4J5Hz9s3l for ; Thu, 27 Sep 2018 07:26:00 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=LrmcAZLbQh5HJ0plCiLfxvwQnG6CZeLmGO8Al0pypGo=; b=gfI dxFRX1Z+LkAXbL021X2u/NbsIo2lFPC3q+yXt4TBaRIyOdmnQnL/g1W9uBzWkTlg/ZisGvgla0279 C4I1GDDir3A7TQzK33fv5coFqDFR42AAM6Hxz+RkupLke8omJ6KFjp5cmNiR1D/a7m0oR5akcJNaC NZF6NgndmNXM+C63rfYy0t4kGMtvIBagGjHGuPffDhLD5MsgpWLGqT49Oj4mr0AgO5TaY03pKdRNW +B2w1zC2WqHDHcd+ynix0D5Z2JLPlUBplcMqCMpKvnGrSkhZZYx4xZcVIYg3CaoLnkc7hO7gQW+dD 8KRKlwlS64m+zPRM0B9hG26IV7P9ctQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g5HJY-0004Dk-O4; Wed, 26 Sep 2018 21:25:44 +0000 Received: from mail.bugwerft.de ([46.23.86.59]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g5HIU-0004BZ-TR for linux-mtd@lists.infradead.org; Wed, 26 Sep 2018 21:24:40 +0000 Received: from localhost.localdomain (pD95EF84C.dip0.t-ipconnect.de [217.94.248.76]) by mail.bugwerft.de (Postfix) with ESMTPSA id 2378729E8D5; Wed, 26 Sep 2018 21:22:33 +0000 (UTC) From: Daniel Mack To: miquel.raynal@bootlin.com, boris.brezillon@bootlin.com Subject: [PATCH] mtd: rawnand: marvell: check for RDY bits after enabling the IRQ Date: Wed, 26 Sep 2018 23:23:53 +0200 Message-Id: <20180926212353.13399-1-daniel@zonque.org> X-Mailer: git-send-email 2.17.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180926_142439_099316_C3DCAA49 X-CRM114-Status: GOOD ( 12.24 ) X-Spam-Score: -0.0 (/) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: chris.packham@alliedtelesis.co.nz, linux-mtd@lists.infradead.org, stable@vger.kernel.org, Daniel Mack MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org At least on PXA3xx platforms, enabling RDY interrupts in the NDCR register will only cause the IRQ to latch when the RDY lanes are changing, and not in case they are already asserted. This means that if the controller finished the command in flight before marvell_nfc_wait_op() is called, that function will wait for a change in the bit that can't ever happen as it is already set. To mitigate this race, check for the RDY bits after the IRQ was enabled, and only sleep on the condition if the controller isn't ready yet. This fixes a bug that was observed with a NAND chip that holds a UBIFS parition on which file system stress tests were executed. When marvell_nfc_wait_op() reports an error, UBI/UBIFS will eventually mount the filesystem read-only, reporting lots of warnings along the way. Fixes: 02f26ecf8c77 mtd: nand: add reworked Marvell NAND controller driver Cc: stable@vger.kernel.org Signed-off-by: Daniel Mack Tested-by: Chris Packham --- drivers/mtd/nand/raw/marvell_nand.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c index 666f34b58dec..e96ec7b9a152 100644 --- a/drivers/mtd/nand/raw/marvell_nand.c +++ b/drivers/mtd/nand/raw/marvell_nand.c @@ -613,7 +613,8 @@ static int marvell_nfc_wait_cmdd(struct nand_chip *chip) static int marvell_nfc_wait_op(struct nand_chip *chip, unsigned int timeout_ms) { struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); - int ret; + int ret = -EALREADY; + u32 st; /* Timeout is expressed in ms */ if (!timeout_ms) @@ -622,8 +623,15 @@ static int marvell_nfc_wait_op(struct nand_chip *chip, unsigned int timeout_ms) init_completion(&nfc->complete); marvell_nfc_enable_int(nfc, NDCR_RDYM); - ret = wait_for_completion_timeout(&nfc->complete, - msecs_to_jiffies(timeout_ms)); + + /* + * Check if the NDSR_RDY bits have already been set before the + * interrupt was enabled. + */ + st = readl_relaxed(nfc->regs + NDSR); + if (!(st & (NDSR_RDY(0) | NDSR_RDY(1)))) + ret = wait_for_completion_timeout(&nfc->complete, + msecs_to_jiffies(timeout_ms)); marvell_nfc_disable_int(nfc, NDCR_RDYM); marvell_nfc_clear_int(nfc, NDSR_RDY(0) | NDSR_RDY(1)); if (!ret) {